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1b4406d2a8
Use the raw instruction code and macros to identify memory instructions, extract register fields and also offset. The implementation addresses the D-form, X-form, DS-form instructions. Adds "mem_ref" field to check whether source/target has memory reference. Add function "get_powerpc_regs" which will set these fields: reg1, reg2, offset depending of where it is source or target ops. Update "parse" callback for "struct ins_ops" to also pass "struct disasm_line" as argument. This is needed in parse functions where opcode is used to determine whether to set multi_regs and other fields Reviewed-by: Kajol Jain <kjain@linux.ibm.com> Reviewed-by: Namhyung Kim <namhyung@kernel.org> Signed-off-by: Athira Rajeev <atrajeev@linux.vnet.ibm.com> Tested-by: Kajol Jain <kjain@linux.ibm.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Akanksha J N <akanksha@linux.ibm.com> Cc: Christophe Leroy <christophe.leroy@csgroup.eu> Cc: Disha Goel <disgoel@linux.vnet.ibm.com> Cc: Hari Bathini <hbathini@linux.ibm.com> Cc: Ian Rogers <irogers@google.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: Madhavan Srinivasan <maddy@linux.ibm.com> Cc: Segher Boessenkool <segher@kernel.crashing.org> Link: https://lore.kernel.org/lkml/20240718084358.72242-7-atrajeev@linux.vnet.ibm.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
154 lines
3.9 KiB
C
154 lines
3.9 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Mapping of DWARF debug register numbers into register names.
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*
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* Copyright (C) 2010 Ian Munsie, IBM Corporation.
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*/
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#include <stddef.h>
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#include <errno.h>
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#include <string.h>
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#include <dwarf-regs.h>
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#include <linux/ptrace.h>
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#include <linux/kernel.h>
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#include <linux/stringify.h>
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struct pt_regs_dwarfnum {
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const char *name;
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unsigned int dwarfnum;
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unsigned int ptregs_offset;
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};
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#define REG_DWARFNUM_NAME(r, num) \
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{.name = __stringify(%)__stringify(r), .dwarfnum = num, \
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.ptregs_offset = offsetof(struct pt_regs, r)}
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#define GPR_DWARFNUM_NAME(num) \
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{.name = __stringify(%gpr##num), .dwarfnum = num, \
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.ptregs_offset = offsetof(struct pt_regs, gpr[num])}
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#define REG_DWARFNUM_END {.name = NULL, .dwarfnum = 0, .ptregs_offset = 0}
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/*
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* Reference:
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* http://refspecs.linuxfoundation.org/ELF/ppc64/PPC-elf64abi-1.9.html
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*/
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static const struct pt_regs_dwarfnum regdwarfnum_table[] = {
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GPR_DWARFNUM_NAME(0),
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GPR_DWARFNUM_NAME(1),
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GPR_DWARFNUM_NAME(2),
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GPR_DWARFNUM_NAME(3),
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GPR_DWARFNUM_NAME(4),
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GPR_DWARFNUM_NAME(5),
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GPR_DWARFNUM_NAME(6),
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GPR_DWARFNUM_NAME(7),
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GPR_DWARFNUM_NAME(8),
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GPR_DWARFNUM_NAME(9),
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GPR_DWARFNUM_NAME(10),
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GPR_DWARFNUM_NAME(11),
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GPR_DWARFNUM_NAME(12),
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GPR_DWARFNUM_NAME(13),
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GPR_DWARFNUM_NAME(14),
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GPR_DWARFNUM_NAME(15),
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GPR_DWARFNUM_NAME(16),
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GPR_DWARFNUM_NAME(17),
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GPR_DWARFNUM_NAME(18),
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GPR_DWARFNUM_NAME(19),
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GPR_DWARFNUM_NAME(20),
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GPR_DWARFNUM_NAME(21),
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GPR_DWARFNUM_NAME(22),
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GPR_DWARFNUM_NAME(23),
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GPR_DWARFNUM_NAME(24),
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GPR_DWARFNUM_NAME(25),
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GPR_DWARFNUM_NAME(26),
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GPR_DWARFNUM_NAME(27),
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GPR_DWARFNUM_NAME(28),
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GPR_DWARFNUM_NAME(29),
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GPR_DWARFNUM_NAME(30),
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GPR_DWARFNUM_NAME(31),
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REG_DWARFNUM_NAME(msr, 66),
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REG_DWARFNUM_NAME(ctr, 109),
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REG_DWARFNUM_NAME(link, 108),
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REG_DWARFNUM_NAME(xer, 101),
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REG_DWARFNUM_NAME(dar, 119),
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REG_DWARFNUM_NAME(dsisr, 118),
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REG_DWARFNUM_END,
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};
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/**
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* get_arch_regstr() - lookup register name from it's DWARF register number
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* @n: the DWARF register number
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*
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* get_arch_regstr() returns the name of the register in struct
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* regdwarfnum_table from it's DWARF register number. If the register is not
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* found in the table, this returns NULL;
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*/
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const char *get_arch_regstr(unsigned int n)
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{
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const struct pt_regs_dwarfnum *roff;
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for (roff = regdwarfnum_table; roff->name != NULL; roff++)
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if (roff->dwarfnum == n)
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return roff->name;
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return NULL;
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}
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int regs_query_register_offset(const char *name)
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{
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const struct pt_regs_dwarfnum *roff;
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for (roff = regdwarfnum_table; roff->name != NULL; roff++)
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if (!strcmp(roff->name, name))
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return roff->ptregs_offset;
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return -EINVAL;
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}
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#define PPC_OP(op) (((op) >> 26) & 0x3F)
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#define PPC_RA(a) (((a) >> 16) & 0x1f)
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#define PPC_RT(t) (((t) >> 21) & 0x1f)
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#define PPC_RB(b) (((b) >> 11) & 0x1f)
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#define PPC_D(D) ((D) & 0xfffe)
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#define PPC_DS(DS) ((DS) & 0xfffc)
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#define OP_LD 58
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#define OP_STD 62
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static int get_source_reg(u32 raw_insn)
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{
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return PPC_RA(raw_insn);
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}
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static int get_target_reg(u32 raw_insn)
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{
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return PPC_RT(raw_insn);
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}
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static int get_offset_opcode(u32 raw_insn)
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{
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int opcode = PPC_OP(raw_insn);
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/* DS- form */
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if ((opcode == OP_LD) || (opcode == OP_STD))
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return PPC_DS(raw_insn);
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else
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return PPC_D(raw_insn);
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}
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/*
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* Fills the required fields for op_loc depending on if it
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* is a source or target.
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* D form: ins RT,D(RA) -> src_reg1 = RA, offset = D, dst_reg1 = RT
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* DS form: ins RT,DS(RA) -> src_reg1 = RA, offset = DS, dst_reg1 = RT
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* X form: ins RT,RA,RB -> src_reg1 = RA, src_reg2 = RB, dst_reg1 = RT
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*/
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void get_powerpc_regs(u32 raw_insn, int is_source,
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struct annotated_op_loc *op_loc)
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{
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if (is_source)
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op_loc->reg1 = get_source_reg(raw_insn);
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else
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op_loc->reg1 = get_target_reg(raw_insn);
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if (op_loc->multi_regs)
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op_loc->reg2 = PPC_RB(raw_insn);
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/* TODO: Implement offset handling for X Form */
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if ((op_loc->mem_ref) && (PPC_OP(raw_insn) != 31))
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op_loc->offset = get_offset_opcode(raw_insn);
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}
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