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Add counter information necessary for optimizing event grouping the
perf tool.
The most recent RFC patch set using this information:
https://lore.kernel.org/lkml/20240412210756.309828-1-weilin.wang@intel.com/
The information was added in:
475892a969
and later patches.
Co-authored-by: Weilin Wang <weilin.wang@intel.com>
Co-authored-by: Caleb Biggers <caleb.biggers@intel.com>
Signed-off-by: Ian Rogers <irogers@google.com>
Reviewed-by: Kan Liang <kan.liang@linux.intel.com>
Cc: Alexandre Torgue <alexandre.torgue@foss.st.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Signed-off-by: Namhyung Kim <namhyung@kernel.org>
Link: https://lore.kernel.org/r/20240620181752.3945845-11-irogers@google.com
31 lines
1.2 KiB
JSON
31 lines
1.2 KiB
JSON
[
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{
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"BriefDescription": "Cycles the FP divide unit is busy",
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"Counter": "0,1,2,3",
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"EventCode": "0xCD",
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"EventName": "CYCLES_DIV_BUSY.FPDIV",
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"PublicDescription": "Counts core cycles the floating point divide unit is busy.",
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"SampleAfterValue": "200003",
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"UMask": "0x2"
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},
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{
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"BriefDescription": "Machine clears due to FP assists",
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"Counter": "0,1,2,3",
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"EventCode": "0xC3",
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"EventName": "MACHINE_CLEARS.FP_ASSIST",
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"PublicDescription": "Counts machine clears due to floating point (FP) operations needing assists. For instance, if the result was a floating point denormal, the hardware clears the pipeline and reissues uops to produce the correct IEEE compliant denormal result.",
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"SampleAfterValue": "200003",
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"UMask": "0x4"
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},
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{
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"BriefDescription": "Floating point divide uops retired. (Precise Event Capable)",
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"Counter": "0,1,2,3",
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"EventCode": "0xC2",
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"EventName": "UOPS_RETIRED.FPDIV",
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"PEBS": "2",
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"PublicDescription": "Counts the number of floating point divide uops retired.",
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"SampleAfterValue": "2000003",
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"UMask": "0x8"
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}
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]
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