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Lu Baolu says: ==================== This series implements the functionality of delivering IO page faults to user space through the IOMMUFD framework. One feasible use case is the nested translation. Nested translation is a hardware feature that supports two-stage translation tables for IOMMU. The second-stage translation table is managed by the host VMM, while the first-stage translation table is owned by user space. This allows user space to control the IOMMU mappings for its devices. When an IO page fault occurs on the first-stage translation table, the IOMMU hardware can deliver the page fault to user space through the IOMMUFD framework. User space can then handle the page fault and respond to the device top-down through the IOMMUFD. This allows user space to implement its own IO page fault handling policies. User space application that is capable of handling IO page faults should allocate a fault object, and bind the fault object to any domain that it is willing to handle the fault generatd for them. On a successful return of fault object allocation, the user can retrieve and respond to page faults by reading or writing to the file descriptor (FD) returned. The iommu selftest framework has been updated to test the IO page fault delivery and response functionality. ==================== * iommufd_pri: iommufd/selftest: Add coverage for IOPF test iommufd/selftest: Add IOPF support for mock device iommufd: Associate fault object with iommufd_hw_pgtable iommufd: Fault-capable hwpt attach/detach/replace iommufd: Add iommufd fault object iommufd: Add fault and response message definitions iommu: Extend domain attach group with handle support iommu: Add attach handle to struct iopf_group iommu: Remove sva handle list iommu: Introduce domain attachment handle Link: https://lore.kernel.org/all/20240702063444.105814-1-baolu.lu@linux.intel.com Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
765 lines
24 KiB
C
765 lines
24 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/* Copyright (c) 2021-2022, NVIDIA CORPORATION & AFFILIATES */
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#ifndef __SELFTEST_IOMMUFD_UTILS
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#define __SELFTEST_IOMMUFD_UTILS
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#include <unistd.h>
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#include <stddef.h>
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#include <sys/fcntl.h>
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#include <sys/ioctl.h>
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#include <stdint.h>
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#include <assert.h>
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#include "../kselftest_harness.h"
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#include "../../../../drivers/iommu/iommufd/iommufd_test.h"
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/* Hack to make assertions more readable */
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#define _IOMMU_TEST_CMD(x) IOMMU_TEST_CMD
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/* Imported from include/asm-generic/bitops/generic-non-atomic.h */
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#define BITS_PER_BYTE 8
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#define BITS_PER_LONG __BITS_PER_LONG
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#define BIT_MASK(nr) (1UL << ((nr) % __BITS_PER_LONG))
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#define BIT_WORD(nr) ((nr) / __BITS_PER_LONG)
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#define DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d))
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static inline void set_bit(unsigned int nr, unsigned long *addr)
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{
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unsigned long mask = BIT_MASK(nr);
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unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
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*p |= mask;
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}
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static inline bool test_bit(unsigned int nr, unsigned long *addr)
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{
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return 1UL & (addr[BIT_WORD(nr)] >> (nr & (BITS_PER_LONG - 1)));
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}
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static void *buffer;
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static unsigned long BUFFER_SIZE;
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static unsigned long PAGE_SIZE;
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#define sizeof_field(TYPE, MEMBER) sizeof((((TYPE *)0)->MEMBER))
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#define offsetofend(TYPE, MEMBER) \
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(offsetof(TYPE, MEMBER) + sizeof_field(TYPE, MEMBER))
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/*
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* Have the kernel check the refcount on pages. I don't know why a freshly
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* mmap'd anon non-compound page starts out with a ref of 3
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*/
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#define check_refs(_ptr, _length, _refs) \
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({ \
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struct iommu_test_cmd test_cmd = { \
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.size = sizeof(test_cmd), \
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.op = IOMMU_TEST_OP_MD_CHECK_REFS, \
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.check_refs = { .length = _length, \
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.uptr = (uintptr_t)(_ptr), \
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.refs = _refs }, \
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}; \
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ASSERT_EQ(0, \
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ioctl(self->fd, \
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_IOMMU_TEST_CMD(IOMMU_TEST_OP_MD_CHECK_REFS), \
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&test_cmd)); \
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})
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static int _test_cmd_mock_domain(int fd, unsigned int ioas_id, __u32 *stdev_id,
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__u32 *hwpt_id, __u32 *idev_id)
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{
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struct iommu_test_cmd cmd = {
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.size = sizeof(cmd),
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.op = IOMMU_TEST_OP_MOCK_DOMAIN,
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.id = ioas_id,
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.mock_domain = {},
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};
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int ret;
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ret = ioctl(fd, IOMMU_TEST_CMD, &cmd);
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if (ret)
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return ret;
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if (stdev_id)
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*stdev_id = cmd.mock_domain.out_stdev_id;
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assert(cmd.id != 0);
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if (hwpt_id)
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*hwpt_id = cmd.mock_domain.out_hwpt_id;
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if (idev_id)
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*idev_id = cmd.mock_domain.out_idev_id;
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return 0;
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}
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#define test_cmd_mock_domain(ioas_id, stdev_id, hwpt_id, idev_id) \
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ASSERT_EQ(0, _test_cmd_mock_domain(self->fd, ioas_id, stdev_id, \
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hwpt_id, idev_id))
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#define test_err_mock_domain(_errno, ioas_id, stdev_id, hwpt_id) \
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EXPECT_ERRNO(_errno, _test_cmd_mock_domain(self->fd, ioas_id, \
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stdev_id, hwpt_id, NULL))
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static int _test_cmd_mock_domain_flags(int fd, unsigned int ioas_id,
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__u32 stdev_flags, __u32 *stdev_id,
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__u32 *hwpt_id, __u32 *idev_id)
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{
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struct iommu_test_cmd cmd = {
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.size = sizeof(cmd),
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.op = IOMMU_TEST_OP_MOCK_DOMAIN_FLAGS,
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.id = ioas_id,
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.mock_domain_flags = { .dev_flags = stdev_flags },
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};
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int ret;
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ret = ioctl(fd, IOMMU_TEST_CMD, &cmd);
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if (ret)
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return ret;
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if (stdev_id)
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*stdev_id = cmd.mock_domain_flags.out_stdev_id;
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assert(cmd.id != 0);
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if (hwpt_id)
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*hwpt_id = cmd.mock_domain_flags.out_hwpt_id;
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if (idev_id)
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*idev_id = cmd.mock_domain_flags.out_idev_id;
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return 0;
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}
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#define test_cmd_mock_domain_flags(ioas_id, flags, stdev_id, hwpt_id, idev_id) \
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ASSERT_EQ(0, _test_cmd_mock_domain_flags(self->fd, ioas_id, flags, \
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stdev_id, hwpt_id, idev_id))
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#define test_err_mock_domain_flags(_errno, ioas_id, flags, stdev_id, hwpt_id) \
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EXPECT_ERRNO(_errno, \
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_test_cmd_mock_domain_flags(self->fd, ioas_id, flags, \
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stdev_id, hwpt_id, NULL))
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static int _test_cmd_mock_domain_replace(int fd, __u32 stdev_id, __u32 pt_id,
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__u32 *hwpt_id)
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{
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struct iommu_test_cmd cmd = {
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.size = sizeof(cmd),
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.op = IOMMU_TEST_OP_MOCK_DOMAIN_REPLACE,
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.id = stdev_id,
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.mock_domain_replace = {
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.pt_id = pt_id,
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},
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};
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int ret;
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ret = ioctl(fd, IOMMU_TEST_CMD, &cmd);
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if (ret)
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return ret;
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if (hwpt_id)
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*hwpt_id = cmd.mock_domain_replace.pt_id;
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return 0;
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}
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#define test_cmd_mock_domain_replace(stdev_id, pt_id) \
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ASSERT_EQ(0, _test_cmd_mock_domain_replace(self->fd, stdev_id, pt_id, \
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NULL))
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#define test_err_mock_domain_replace(_errno, stdev_id, pt_id) \
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EXPECT_ERRNO(_errno, _test_cmd_mock_domain_replace(self->fd, stdev_id, \
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pt_id, NULL))
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static int _test_cmd_hwpt_alloc(int fd, __u32 device_id, __u32 pt_id, __u32 ft_id,
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__u32 flags, __u32 *hwpt_id, __u32 data_type,
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void *data, size_t data_len)
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{
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struct iommu_hwpt_alloc cmd = {
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.size = sizeof(cmd),
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.flags = flags,
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.dev_id = device_id,
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.pt_id = pt_id,
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.data_type = data_type,
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.data_len = data_len,
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.data_uptr = (uint64_t)data,
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.fault_id = ft_id,
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};
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int ret;
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ret = ioctl(fd, IOMMU_HWPT_ALLOC, &cmd);
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if (ret)
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return ret;
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if (hwpt_id)
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*hwpt_id = cmd.out_hwpt_id;
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return 0;
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}
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#define test_cmd_hwpt_alloc(device_id, pt_id, flags, hwpt_id) \
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ASSERT_EQ(0, _test_cmd_hwpt_alloc(self->fd, device_id, pt_id, 0, flags, \
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hwpt_id, IOMMU_HWPT_DATA_NONE, NULL, \
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0))
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#define test_err_hwpt_alloc(_errno, device_id, pt_id, flags, hwpt_id) \
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EXPECT_ERRNO(_errno, _test_cmd_hwpt_alloc( \
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self->fd, device_id, pt_id, 0, flags, \
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hwpt_id, IOMMU_HWPT_DATA_NONE, NULL, 0))
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#define test_cmd_hwpt_alloc_nested(device_id, pt_id, flags, hwpt_id, \
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data_type, data, data_len) \
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ASSERT_EQ(0, _test_cmd_hwpt_alloc(self->fd, device_id, pt_id, 0, flags, \
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hwpt_id, data_type, data, data_len))
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#define test_err_hwpt_alloc_nested(_errno, device_id, pt_id, flags, hwpt_id, \
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data_type, data, data_len) \
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EXPECT_ERRNO(_errno, \
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_test_cmd_hwpt_alloc(self->fd, device_id, pt_id, 0, flags, \
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hwpt_id, data_type, data, data_len))
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#define test_cmd_hwpt_alloc_iopf(device_id, pt_id, fault_id, flags, hwpt_id, \
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data_type, data, data_len) \
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ASSERT_EQ(0, _test_cmd_hwpt_alloc(self->fd, device_id, pt_id, fault_id, \
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flags, hwpt_id, data_type, data, \
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data_len))
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#define test_err_hwpt_alloc_iopf(_errno, device_id, pt_id, fault_id, flags, \
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hwpt_id, data_type, data, data_len) \
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EXPECT_ERRNO(_errno, \
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_test_cmd_hwpt_alloc(self->fd, device_id, pt_id, fault_id, \
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flags, hwpt_id, data_type, data, \
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data_len))
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#define test_cmd_hwpt_check_iotlb(hwpt_id, iotlb_id, expected) \
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({ \
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struct iommu_test_cmd test_cmd = { \
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.size = sizeof(test_cmd), \
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.op = IOMMU_TEST_OP_MD_CHECK_IOTLB, \
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.id = hwpt_id, \
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.check_iotlb = { \
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.id = iotlb_id, \
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.iotlb = expected, \
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}, \
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}; \
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ASSERT_EQ(0, \
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ioctl(self->fd, \
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_IOMMU_TEST_CMD(IOMMU_TEST_OP_MD_CHECK_IOTLB), \
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&test_cmd)); \
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})
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#define test_cmd_hwpt_check_iotlb_all(hwpt_id, expected) \
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({ \
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int i; \
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for (i = 0; i < MOCK_NESTED_DOMAIN_IOTLB_NUM; i++) \
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test_cmd_hwpt_check_iotlb(hwpt_id, i, expected); \
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})
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static int _test_cmd_hwpt_invalidate(int fd, __u32 hwpt_id, void *reqs,
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uint32_t data_type, uint32_t lreq,
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uint32_t *nreqs)
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{
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struct iommu_hwpt_invalidate cmd = {
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.size = sizeof(cmd),
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.hwpt_id = hwpt_id,
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.data_type = data_type,
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.data_uptr = (uint64_t)reqs,
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.entry_len = lreq,
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.entry_num = *nreqs,
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};
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int rc = ioctl(fd, IOMMU_HWPT_INVALIDATE, &cmd);
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*nreqs = cmd.entry_num;
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return rc;
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}
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#define test_cmd_hwpt_invalidate(hwpt_id, reqs, data_type, lreq, nreqs) \
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({ \
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ASSERT_EQ(0, \
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_test_cmd_hwpt_invalidate(self->fd, hwpt_id, reqs, \
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data_type, lreq, nreqs)); \
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})
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#define test_err_hwpt_invalidate(_errno, hwpt_id, reqs, data_type, lreq, \
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nreqs) \
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({ \
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EXPECT_ERRNO(_errno, _test_cmd_hwpt_invalidate( \
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self->fd, hwpt_id, reqs, \
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data_type, lreq, nreqs)); \
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})
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static int _test_cmd_access_replace_ioas(int fd, __u32 access_id,
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unsigned int ioas_id)
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{
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struct iommu_test_cmd cmd = {
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.size = sizeof(cmd),
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.op = IOMMU_TEST_OP_ACCESS_REPLACE_IOAS,
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.id = access_id,
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.access_replace_ioas = { .ioas_id = ioas_id },
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};
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int ret;
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ret = ioctl(fd, IOMMU_TEST_CMD, &cmd);
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if (ret)
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return ret;
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return 0;
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}
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#define test_cmd_access_replace_ioas(access_id, ioas_id) \
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ASSERT_EQ(0, _test_cmd_access_replace_ioas(self->fd, access_id, ioas_id))
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static int _test_cmd_set_dirty_tracking(int fd, __u32 hwpt_id, bool enabled)
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{
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struct iommu_hwpt_set_dirty_tracking cmd = {
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.size = sizeof(cmd),
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.flags = enabled ? IOMMU_HWPT_DIRTY_TRACKING_ENABLE : 0,
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.hwpt_id = hwpt_id,
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};
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int ret;
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ret = ioctl(fd, IOMMU_HWPT_SET_DIRTY_TRACKING, &cmd);
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if (ret)
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return -errno;
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return 0;
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}
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#define test_cmd_set_dirty_tracking(hwpt_id, enabled) \
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ASSERT_EQ(0, _test_cmd_set_dirty_tracking(self->fd, hwpt_id, enabled))
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static int _test_cmd_get_dirty_bitmap(int fd, __u32 hwpt_id, size_t length,
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__u64 iova, size_t page_size,
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__u64 *bitmap, __u32 flags)
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{
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struct iommu_hwpt_get_dirty_bitmap cmd = {
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.size = sizeof(cmd),
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.hwpt_id = hwpt_id,
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.flags = flags,
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.iova = iova,
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.length = length,
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.page_size = page_size,
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.data = (uintptr_t)bitmap,
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};
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int ret;
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ret = ioctl(fd, IOMMU_HWPT_GET_DIRTY_BITMAP, &cmd);
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if (ret)
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return ret;
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return 0;
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}
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#define test_cmd_get_dirty_bitmap(fd, hwpt_id, length, iova, page_size, \
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bitmap, flags) \
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ASSERT_EQ(0, _test_cmd_get_dirty_bitmap(fd, hwpt_id, length, iova, \
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page_size, bitmap, flags))
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static int _test_cmd_mock_domain_set_dirty(int fd, __u32 hwpt_id, size_t length,
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__u64 iova, size_t page_size,
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__u64 *bitmap, __u64 *dirty)
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{
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struct iommu_test_cmd cmd = {
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.size = sizeof(cmd),
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.op = IOMMU_TEST_OP_DIRTY,
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.id = hwpt_id,
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.dirty = {
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.iova = iova,
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.length = length,
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.page_size = page_size,
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.uptr = (uintptr_t)bitmap,
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}
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};
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int ret;
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ret = ioctl(fd, _IOMMU_TEST_CMD(IOMMU_TEST_OP_DIRTY), &cmd);
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if (ret)
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return -ret;
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if (dirty)
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*dirty = cmd.dirty.out_nr_dirty;
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return 0;
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}
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#define test_cmd_mock_domain_set_dirty(fd, hwpt_id, length, iova, page_size, \
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bitmap, nr) \
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ASSERT_EQ(0, \
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_test_cmd_mock_domain_set_dirty(fd, hwpt_id, length, iova, \
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page_size, bitmap, nr))
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static int _test_mock_dirty_bitmaps(int fd, __u32 hwpt_id, size_t length,
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__u64 iova, size_t page_size,
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size_t pte_page_size, __u64 *bitmap,
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__u64 nbits, __u32 flags,
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struct __test_metadata *_metadata)
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{
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unsigned long npte = pte_page_size / page_size, pteset = 2 * npte;
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unsigned long j, i, nr = nbits / pteset ?: 1;
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unsigned long bitmap_size = DIV_ROUND_UP(nbits, BITS_PER_BYTE);
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__u64 out_dirty = 0;
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/* Mark all even bits as dirty in the mock domain */
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memset(bitmap, 0, bitmap_size);
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for (i = 0; i < nbits; i += pteset)
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set_bit(i, (unsigned long *)bitmap);
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test_cmd_mock_domain_set_dirty(fd, hwpt_id, length, iova, page_size,
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bitmap, &out_dirty);
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ASSERT_EQ(nr, out_dirty);
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/* Expect all even bits as dirty in the user bitmap */
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memset(bitmap, 0, bitmap_size);
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test_cmd_get_dirty_bitmap(fd, hwpt_id, length, iova, page_size, bitmap,
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flags);
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/* Beware ASSERT_EQ() is two statements -- braces are not redundant! */
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for (i = 0; i < nbits; i += pteset) {
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for (j = 0; j < pteset; j++) {
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ASSERT_EQ(j < npte,
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test_bit(i + j, (unsigned long *)bitmap));
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}
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ASSERT_EQ(!(i % pteset), test_bit(i, (unsigned long *)bitmap));
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}
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memset(bitmap, 0, bitmap_size);
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test_cmd_get_dirty_bitmap(fd, hwpt_id, length, iova, page_size, bitmap,
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flags);
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/* It as read already -- expect all zeroes */
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for (i = 0; i < nbits; i += pteset) {
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for (j = 0; j < pteset; j++) {
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ASSERT_EQ(
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(j < npte) &&
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(flags &
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IOMMU_HWPT_GET_DIRTY_BITMAP_NO_CLEAR),
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test_bit(i + j, (unsigned long *)bitmap));
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}
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}
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return 0;
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}
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#define test_mock_dirty_bitmaps(hwpt_id, length, iova, page_size, pte_size,\
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|
bitmap, bitmap_size, flags, _metadata) \
|
|
ASSERT_EQ(0, _test_mock_dirty_bitmaps(self->fd, hwpt_id, length, iova, \
|
|
page_size, pte_size, bitmap, \
|
|
bitmap_size, flags, _metadata))
|
|
|
|
static int _test_cmd_create_access(int fd, unsigned int ioas_id,
|
|
__u32 *access_id, unsigned int flags)
|
|
{
|
|
struct iommu_test_cmd cmd = {
|
|
.size = sizeof(cmd),
|
|
.op = IOMMU_TEST_OP_CREATE_ACCESS,
|
|
.id = ioas_id,
|
|
.create_access = { .flags = flags },
|
|
};
|
|
int ret;
|
|
|
|
ret = ioctl(fd, IOMMU_TEST_CMD, &cmd);
|
|
if (ret)
|
|
return ret;
|
|
*access_id = cmd.create_access.out_access_fd;
|
|
return 0;
|
|
}
|
|
#define test_cmd_create_access(ioas_id, access_id, flags) \
|
|
ASSERT_EQ(0, _test_cmd_create_access(self->fd, ioas_id, access_id, \
|
|
flags))
|
|
|
|
static int _test_cmd_destroy_access(unsigned int access_id)
|
|
{
|
|
return close(access_id);
|
|
}
|
|
#define test_cmd_destroy_access(access_id) \
|
|
ASSERT_EQ(0, _test_cmd_destroy_access(access_id))
|
|
|
|
static int _test_cmd_destroy_access_pages(int fd, unsigned int access_id,
|
|
unsigned int access_pages_id)
|
|
{
|
|
struct iommu_test_cmd cmd = {
|
|
.size = sizeof(cmd),
|
|
.op = IOMMU_TEST_OP_DESTROY_ACCESS_PAGES,
|
|
.id = access_id,
|
|
.destroy_access_pages = { .access_pages_id = access_pages_id },
|
|
};
|
|
return ioctl(fd, IOMMU_TEST_CMD, &cmd);
|
|
}
|
|
#define test_cmd_destroy_access_pages(access_id, access_pages_id) \
|
|
ASSERT_EQ(0, _test_cmd_destroy_access_pages(self->fd, access_id, \
|
|
access_pages_id))
|
|
#define test_err_destroy_access_pages(_errno, access_id, access_pages_id) \
|
|
EXPECT_ERRNO(_errno, _test_cmd_destroy_access_pages( \
|
|
self->fd, access_id, access_pages_id))
|
|
|
|
static int _test_ioctl_destroy(int fd, unsigned int id)
|
|
{
|
|
struct iommu_destroy cmd = {
|
|
.size = sizeof(cmd),
|
|
.id = id,
|
|
};
|
|
return ioctl(fd, IOMMU_DESTROY, &cmd);
|
|
}
|
|
#define test_ioctl_destroy(id) ASSERT_EQ(0, _test_ioctl_destroy(self->fd, id))
|
|
|
|
static int _test_ioctl_ioas_alloc(int fd, __u32 *id)
|
|
{
|
|
struct iommu_ioas_alloc cmd = {
|
|
.size = sizeof(cmd),
|
|
};
|
|
int ret;
|
|
|
|
ret = ioctl(fd, IOMMU_IOAS_ALLOC, &cmd);
|
|
if (ret)
|
|
return ret;
|
|
*id = cmd.out_ioas_id;
|
|
return 0;
|
|
}
|
|
#define test_ioctl_ioas_alloc(id) \
|
|
({ \
|
|
ASSERT_EQ(0, _test_ioctl_ioas_alloc(self->fd, id)); \
|
|
ASSERT_NE(0, *(id)); \
|
|
})
|
|
|
|
static int _test_ioctl_ioas_map(int fd, unsigned int ioas_id, void *buffer,
|
|
size_t length, __u64 *iova, unsigned int flags)
|
|
{
|
|
struct iommu_ioas_map cmd = {
|
|
.size = sizeof(cmd),
|
|
.flags = flags,
|
|
.ioas_id = ioas_id,
|
|
.user_va = (uintptr_t)buffer,
|
|
.length = length,
|
|
};
|
|
int ret;
|
|
|
|
if (flags & IOMMU_IOAS_MAP_FIXED_IOVA)
|
|
cmd.iova = *iova;
|
|
|
|
ret = ioctl(fd, IOMMU_IOAS_MAP, &cmd);
|
|
*iova = cmd.iova;
|
|
return ret;
|
|
}
|
|
#define test_ioctl_ioas_map(buffer, length, iova_p) \
|
|
ASSERT_EQ(0, _test_ioctl_ioas_map(self->fd, self->ioas_id, buffer, \
|
|
length, iova_p, \
|
|
IOMMU_IOAS_MAP_WRITEABLE | \
|
|
IOMMU_IOAS_MAP_READABLE))
|
|
|
|
#define test_err_ioctl_ioas_map(_errno, buffer, length, iova_p) \
|
|
EXPECT_ERRNO(_errno, \
|
|
_test_ioctl_ioas_map(self->fd, self->ioas_id, buffer, \
|
|
length, iova_p, \
|
|
IOMMU_IOAS_MAP_WRITEABLE | \
|
|
IOMMU_IOAS_MAP_READABLE))
|
|
|
|
#define test_ioctl_ioas_map_id(ioas_id, buffer, length, iova_p) \
|
|
ASSERT_EQ(0, _test_ioctl_ioas_map(self->fd, ioas_id, buffer, length, \
|
|
iova_p, \
|
|
IOMMU_IOAS_MAP_WRITEABLE | \
|
|
IOMMU_IOAS_MAP_READABLE))
|
|
|
|
#define test_ioctl_ioas_map_fixed(buffer, length, iova) \
|
|
({ \
|
|
__u64 __iova = iova; \
|
|
ASSERT_EQ(0, _test_ioctl_ioas_map( \
|
|
self->fd, self->ioas_id, buffer, length, \
|
|
&__iova, \
|
|
IOMMU_IOAS_MAP_FIXED_IOVA | \
|
|
IOMMU_IOAS_MAP_WRITEABLE | \
|
|
IOMMU_IOAS_MAP_READABLE)); \
|
|
})
|
|
|
|
#define test_ioctl_ioas_map_fixed_id(ioas_id, buffer, length, iova) \
|
|
({ \
|
|
__u64 __iova = iova; \
|
|
ASSERT_EQ(0, \
|
|
_test_ioctl_ioas_map( \
|
|
self->fd, ioas_id, buffer, length, &__iova, \
|
|
IOMMU_IOAS_MAP_FIXED_IOVA | \
|
|
IOMMU_IOAS_MAP_WRITEABLE | \
|
|
IOMMU_IOAS_MAP_READABLE)); \
|
|
})
|
|
|
|
#define test_err_ioctl_ioas_map_fixed(_errno, buffer, length, iova) \
|
|
({ \
|
|
__u64 __iova = iova; \
|
|
EXPECT_ERRNO(_errno, \
|
|
_test_ioctl_ioas_map( \
|
|
self->fd, self->ioas_id, buffer, length, \
|
|
&__iova, \
|
|
IOMMU_IOAS_MAP_FIXED_IOVA | \
|
|
IOMMU_IOAS_MAP_WRITEABLE | \
|
|
IOMMU_IOAS_MAP_READABLE)); \
|
|
})
|
|
|
|
static int _test_ioctl_ioas_unmap(int fd, unsigned int ioas_id, uint64_t iova,
|
|
size_t length, uint64_t *out_len)
|
|
{
|
|
struct iommu_ioas_unmap cmd = {
|
|
.size = sizeof(cmd),
|
|
.ioas_id = ioas_id,
|
|
.iova = iova,
|
|
.length = length,
|
|
};
|
|
int ret;
|
|
|
|
ret = ioctl(fd, IOMMU_IOAS_UNMAP, &cmd);
|
|
if (out_len)
|
|
*out_len = cmd.length;
|
|
return ret;
|
|
}
|
|
#define test_ioctl_ioas_unmap(iova, length) \
|
|
ASSERT_EQ(0, _test_ioctl_ioas_unmap(self->fd, self->ioas_id, iova, \
|
|
length, NULL))
|
|
|
|
#define test_ioctl_ioas_unmap_id(ioas_id, iova, length) \
|
|
ASSERT_EQ(0, _test_ioctl_ioas_unmap(self->fd, ioas_id, iova, length, \
|
|
NULL))
|
|
|
|
#define test_err_ioctl_ioas_unmap(_errno, iova, length) \
|
|
EXPECT_ERRNO(_errno, _test_ioctl_ioas_unmap(self->fd, self->ioas_id, \
|
|
iova, length, NULL))
|
|
|
|
static int _test_ioctl_set_temp_memory_limit(int fd, unsigned int limit)
|
|
{
|
|
struct iommu_test_cmd memlimit_cmd = {
|
|
.size = sizeof(memlimit_cmd),
|
|
.op = IOMMU_TEST_OP_SET_TEMP_MEMORY_LIMIT,
|
|
.memory_limit = { .limit = limit },
|
|
};
|
|
|
|
return ioctl(fd, _IOMMU_TEST_CMD(IOMMU_TEST_OP_SET_TEMP_MEMORY_LIMIT),
|
|
&memlimit_cmd);
|
|
}
|
|
|
|
#define test_ioctl_set_temp_memory_limit(limit) \
|
|
ASSERT_EQ(0, _test_ioctl_set_temp_memory_limit(self->fd, limit))
|
|
|
|
#define test_ioctl_set_default_memory_limit() \
|
|
test_ioctl_set_temp_memory_limit(65536)
|
|
|
|
static void teardown_iommufd(int fd, struct __test_metadata *_metadata)
|
|
{
|
|
struct iommu_test_cmd test_cmd = {
|
|
.size = sizeof(test_cmd),
|
|
.op = IOMMU_TEST_OP_MD_CHECK_REFS,
|
|
.check_refs = { .length = BUFFER_SIZE,
|
|
.uptr = (uintptr_t)buffer },
|
|
};
|
|
|
|
if (fd == -1)
|
|
return;
|
|
|
|
EXPECT_EQ(0, close(fd));
|
|
|
|
fd = open("/dev/iommu", O_RDWR);
|
|
EXPECT_NE(-1, fd);
|
|
EXPECT_EQ(0, ioctl(fd, _IOMMU_TEST_CMD(IOMMU_TEST_OP_MD_CHECK_REFS),
|
|
&test_cmd));
|
|
EXPECT_EQ(0, close(fd));
|
|
}
|
|
|
|
#define EXPECT_ERRNO(expected_errno, cmd) \
|
|
({ \
|
|
ASSERT_EQ(-1, cmd); \
|
|
EXPECT_EQ(expected_errno, errno); \
|
|
})
|
|
|
|
#endif
|
|
|
|
/* @data can be NULL */
|
|
static int _test_cmd_get_hw_info(int fd, __u32 device_id, void *data,
|
|
size_t data_len, uint32_t *capabilities)
|
|
{
|
|
struct iommu_test_hw_info *info = (struct iommu_test_hw_info *)data;
|
|
struct iommu_hw_info cmd = {
|
|
.size = sizeof(cmd),
|
|
.dev_id = device_id,
|
|
.data_len = data_len,
|
|
.data_uptr = (uint64_t)data,
|
|
.out_capabilities = 0,
|
|
};
|
|
int ret;
|
|
|
|
ret = ioctl(fd, IOMMU_GET_HW_INFO, &cmd);
|
|
if (ret)
|
|
return ret;
|
|
|
|
assert(cmd.out_data_type == IOMMU_HW_INFO_TYPE_SELFTEST);
|
|
|
|
/*
|
|
* The struct iommu_test_hw_info should be the one defined
|
|
* by the current kernel.
|
|
*/
|
|
assert(cmd.data_len == sizeof(struct iommu_test_hw_info));
|
|
|
|
/*
|
|
* Trailing bytes should be 0 if user buffer is larger than
|
|
* the data that kernel reports.
|
|
*/
|
|
if (data_len > cmd.data_len) {
|
|
char *ptr = (char *)(data + cmd.data_len);
|
|
int idx = 0;
|
|
|
|
while (idx < data_len - cmd.data_len) {
|
|
assert(!*(ptr + idx));
|
|
idx++;
|
|
}
|
|
}
|
|
|
|
if (info) {
|
|
if (data_len >= offsetofend(struct iommu_test_hw_info, test_reg))
|
|
assert(info->test_reg == IOMMU_HW_INFO_SELFTEST_REGVAL);
|
|
if (data_len >= offsetofend(struct iommu_test_hw_info, flags))
|
|
assert(!info->flags);
|
|
}
|
|
|
|
if (capabilities)
|
|
*capabilities = cmd.out_capabilities;
|
|
|
|
return 0;
|
|
}
|
|
|
|
#define test_cmd_get_hw_info(device_id, data, data_len) \
|
|
ASSERT_EQ(0, _test_cmd_get_hw_info(self->fd, device_id, data, \
|
|
data_len, NULL))
|
|
|
|
#define test_err_get_hw_info(_errno, device_id, data, data_len) \
|
|
EXPECT_ERRNO(_errno, _test_cmd_get_hw_info(self->fd, device_id, data, \
|
|
data_len, NULL))
|
|
|
|
#define test_cmd_get_hw_capabilities(device_id, caps, mask) \
|
|
ASSERT_EQ(0, _test_cmd_get_hw_info(self->fd, device_id, NULL, 0, &caps))
|
|
|
|
static int _test_ioctl_fault_alloc(int fd, __u32 *fault_id, __u32 *fault_fd)
|
|
{
|
|
struct iommu_fault_alloc cmd = {
|
|
.size = sizeof(cmd),
|
|
};
|
|
int ret;
|
|
|
|
ret = ioctl(fd, IOMMU_FAULT_QUEUE_ALLOC, &cmd);
|
|
if (ret)
|
|
return ret;
|
|
*fault_id = cmd.out_fault_id;
|
|
*fault_fd = cmd.out_fault_fd;
|
|
return 0;
|
|
}
|
|
|
|
#define test_ioctl_fault_alloc(fault_id, fault_fd) \
|
|
({ \
|
|
ASSERT_EQ(0, _test_ioctl_fault_alloc(self->fd, fault_id, \
|
|
fault_fd)); \
|
|
ASSERT_NE(0, *(fault_id)); \
|
|
ASSERT_NE(0, *(fault_fd)); \
|
|
})
|
|
|
|
static int _test_cmd_trigger_iopf(int fd, __u32 device_id, __u32 fault_fd)
|
|
{
|
|
struct iommu_test_cmd trigger_iopf_cmd = {
|
|
.size = sizeof(trigger_iopf_cmd),
|
|
.op = IOMMU_TEST_OP_TRIGGER_IOPF,
|
|
.trigger_iopf = {
|
|
.dev_id = device_id,
|
|
.pasid = 0x1,
|
|
.grpid = 0x2,
|
|
.perm = IOMMU_PGFAULT_PERM_READ | IOMMU_PGFAULT_PERM_WRITE,
|
|
.addr = 0xdeadbeaf,
|
|
},
|
|
};
|
|
struct iommu_hwpt_page_response response = {
|
|
.code = IOMMUFD_PAGE_RESP_SUCCESS,
|
|
};
|
|
struct iommu_hwpt_pgfault fault = {};
|
|
ssize_t bytes;
|
|
int ret;
|
|
|
|
ret = ioctl(fd, _IOMMU_TEST_CMD(IOMMU_TEST_OP_TRIGGER_IOPF), &trigger_iopf_cmd);
|
|
if (ret)
|
|
return ret;
|
|
|
|
bytes = read(fault_fd, &fault, sizeof(fault));
|
|
if (bytes <= 0)
|
|
return -EIO;
|
|
|
|
response.cookie = fault.cookie;
|
|
|
|
bytes = write(fault_fd, &response, sizeof(response));
|
|
if (bytes <= 0)
|
|
return -EIO;
|
|
|
|
return 0;
|
|
}
|
|
|
|
#define test_cmd_trigger_iopf(device_id, fault_fd) \
|
|
ASSERT_EQ(0, _test_cmd_trigger_iopf(self->fd, device_id, fault_fd))
|