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git://git.yoctoproject.org/linux-yocto.git
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5a4332062e
* arm64/for-next/perf:
perf: Switch back to struct platform_driver::remove()
perf: arm_pmuv3: Add support for Samsung Mongoose PMU
dt-bindings: arm: pmu: Add Samsung Mongoose core compatible
perf/dwc_pcie: Fix typos in event names
perf/dwc_pcie: Add support for Ampere SoCs
ARM: pmuv3: Add missing write_pmuacr()
perf/marvell: Marvell PEM performance monitor support
perf/arm_pmuv3: Add PMUv3.9 per counter EL0 access control
perf/dwc_pcie: Convert the events with mixed case to lowercase
perf/cxlpmu: Support missing events in 3.1 spec
perf: imx_perf: add support for i.MX91 platform
dt-bindings: perf: fsl-imx-ddr: Add i.MX91 compatible
drivers perf: remove unused field pmu_node
* for-next/gcs: (42 commits)
: arm64 Guarded Control Stack user-space support
kselftest/arm64: Fix missing printf() argument in gcs/gcs-stress.c
arm64/gcs: Fix outdated ptrace documentation
kselftest/arm64: Ensure stable names for GCS stress test results
kselftest/arm64: Validate that GCS push and write permissions work
kselftest/arm64: Enable GCS for the FP stress tests
kselftest/arm64: Add a GCS stress test
kselftest/arm64: Add GCS signal tests
kselftest/arm64: Add test coverage for GCS mode locking
kselftest/arm64: Add a GCS test program built with the system libc
kselftest/arm64: Add very basic GCS test program
kselftest/arm64: Always run signals tests with GCS enabled
kselftest/arm64: Allow signals tests to specify an expected si_code
kselftest/arm64: Add framework support for GCS to signal handling tests
kselftest/arm64: Add GCS as a detected feature in the signal tests
kselftest/arm64: Verify the GCS hwcap
arm64: Add Kconfig for Guarded Control Stack (GCS)
arm64/ptrace: Expose GCS via ptrace and core files
arm64/signal: Expose GCS state in signal frames
arm64/signal: Set up and restore the GCS context for signal handlers
arm64/mm: Implement map_shadow_stack()
...
* for-next/probes:
: Various arm64 uprobes/kprobes cleanups
arm64: insn: Simulate nop instruction for better uprobe performance
arm64: probes: Remove probe_opcode_t
arm64: probes: Cleanup kprobes endianness conversions
arm64: probes: Move kprobes-specific fields
arm64: probes: Fix uprobes for big-endian kernels
arm64: probes: Fix simulate_ldr*_literal()
arm64: probes: Remove broken LDR (literal) uprobe support
* for-next/asm-offsets:
: arm64 asm-offsets.c cleanup (remove unused offsets)
arm64: asm-offsets: remove PREEMPT_DISABLE_OFFSET
arm64: asm-offsets: remove DMA_{TO,FROM}_DEVICE
arm64: asm-offsets: remove VM_EXEC and PAGE_SZ
arm64: asm-offsets: remove MM_CONTEXT_ID
arm64: asm-offsets: remove COMPAT_{RT_,SIGFRAME_REGS_OFFSET
arm64: asm-offsets: remove VMA_VM_*
arm64: asm-offsets: remove TSK_ACTIVE_MM
* for-next/tlb:
: TLB flushing optimisations
arm64: optimize flush tlb kernel range
arm64: tlbflush: add __flush_tlb_range_limit_excess()
* for-next/misc:
: Miscellaneous patches
arm64: tls: Fix context-switching of tpidrro_el0 when kpti is enabled
arm64/ptrace: Clarify documentation of VL configuration via ptrace
acpi/arm64: remove unnecessary cast
arm64/mm: Change protval as 'pteval_t' in map_range()
arm64: uprobes: Optimize cache flushes for xol slot
acpi/arm64: Adjust error handling procedure in gtdt_parse_timer_block()
arm64: fix .data.rel.ro size assertion when CONFIG_LTO_CLANG
arm64/ptdump: Test both PTE_TABLE_BIT and PTE_VALID for block mappings
arm64/mm: Sanity check PTE address before runtime P4D/PUD folding
arm64/mm: Drop setting PTE_TYPE_PAGE in pte_mkcont()
ACPI: GTDT: Tighten the check for the array of platform timer structures
arm64/fpsimd: Fix a typo
arm64: Expose ID_AA64ISAR1_EL1.XS to sanitised feature consumers
arm64: Return early when break handler is found on linked-list
arm64/mm: Re-organize arch_make_huge_pte()
arm64/mm: Drop _PROT_SECT_DEFAULT
arm64: Add command-line override for ID_AA64MMFR0_EL1.ECV
arm64: head: Drop SWAPPER_TABLE_SHIFT
arm64: cpufeature: add POE to cpucap_is_possible()
arm64/mm: Change pgattr_change_is_safe() arguments as pteval_t
* for-next/mte:
: Various MTE improvements
selftests: arm64: add hugetlb mte tests
hugetlb: arm64: add mte support
* for-next/sysreg:
: arm64 sysreg updates
arm64/sysreg: Update ID_AA64MMFR1_EL1 to DDI0601 2024-09
* for-next/stacktrace:
: arm64 stacktrace improvements
arm64: preserve pt_regs::stackframe during exec*()
arm64: stacktrace: unwind exception boundaries
arm64: stacktrace: split unwind_consume_stack()
arm64: stacktrace: report recovered PCs
arm64: stacktrace: report source of unwind data
arm64: stacktrace: move dump_backtrace() to kunwind_stack_walk()
arm64: use a common struct frame_record
arm64: pt_regs: swap 'unused' and 'pmr' fields
arm64: pt_regs: rename "pmr_save" -> "pmr"
arm64: pt_regs: remove stale big-endian layout
arm64: pt_regs: assert pt_regs is a multiple of 16 bytes
* for-next/hwcap3:
: Add AT_HWCAP3 support for arm64 (also wire up AT_HWCAP4)
arm64: Support AT_HWCAP3
binfmt_elf: Wire up AT_HWCAP3 at AT_HWCAP4
* for-next/kselftest: (30 commits)
: arm64 kselftest fixes/cleanups
kselftest/arm64: Try harder to generate different keys during PAC tests
kselftest/arm64: Don't leak pipe fds in pac.exec_sign_all()
kselftest/arm64: Corrupt P0 in the irritator when testing SSVE
kselftest/arm64: Add FPMR coverage to fp-ptrace
kselftest/arm64: Expand the set of ZA writes fp-ptrace does
kselftets/arm64: Use flag bits for features in fp-ptrace assembler code
kselftest/arm64: Enable build of PAC tests with LLVM=1
kselftest/arm64: Check that SVCR is 0 in signal handlers
kselftest/arm64: Fix printf() compiler warnings in the arm64 syscall-abi.c tests
kselftest/arm64: Fix printf() warning in the arm64 MTE prctl() test
kselftest/arm64: Fix printf() compiler warnings in the arm64 fp tests
kselftest/arm64: Fix build with stricter assemblers
kselftest/arm64: Test signal handler state modification in fp-stress
kselftest/arm64: Provide a SIGUSR1 handler in the kernel mode FP stress test
kselftest/arm64: Implement irritators for ZA and ZT
kselftest/arm64: Remove unused ADRs from irritator handlers
kselftest/arm64: Correct misleading comments on fp-stress irritators
kselftest/arm64: Poll less often while waiting for fp-stress children
kselftest/arm64: Increase frequency of signal delivery in fp-stress
kselftest/arm64: Fix encoding for SVE B16B16 test
...
* for-next/crc32:
: Optimise CRC32 using PMULL instructions
arm64/crc32: Implement 4-way interleave using PMULL
arm64/crc32: Reorganize bit/byte ordering macros
arm64/lib: Handle CRC-32 alternative in C code
* for-next/guest-cca:
: Support for running Linux as a guest in Arm CCA
arm64: Document Arm Confidential Compute
virt: arm-cca-guest: TSM_REPORT support for realms
arm64: Enable memory encrypt for Realms
arm64: mm: Avoid TLBI when marking pages as valid
arm64: Enforce bounce buffers for realm DMA
efi: arm64: Map Device with Prot Shared
arm64: rsi: Map unprotected MMIO as decrypted
arm64: rsi: Add support for checking whether an MMIO is protected
arm64: realm: Query IPA size from the RMM
arm64: Detect if in a realm and set RIPAS RAM
arm64: rsi: Add RSI definitions
* for-next/haft:
: Support for arm64 FEAT_HAFT
arm64: pgtable: Warn unexpected pmdp_test_and_clear_young()
arm64: Enable ARCH_HAS_NONLEAF_PMD_YOUNG
arm64: Add support for FEAT_HAFT
arm64: setup: name 'tcr2' register
arm64/sysreg: Update ID_AA64MMFR1_EL1 register
* for-next/scs:
: Dynamic shadow call stack fixes
arm64/scs: Drop unused prototype __pi_scs_patch_vmlinux()
arm64/scs: Deal with 64-bit relative offsets in FDE frames
arm64/scs: Fix handling of DWARF augmentation data in CIE/FDE frames
187 lines
8.0 KiB
C
187 lines
8.0 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2016 ARM Ltd.
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*/
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#ifndef __ASM_PGTABLE_PROT_H
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#define __ASM_PGTABLE_PROT_H
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#include <asm/memory.h>
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#include <asm/pgtable-hwdef.h>
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#include <linux/const.h>
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/*
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* Software defined PTE bits definition.
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*/
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#define PTE_WRITE (PTE_DBM) /* same as DBM (51) */
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#define PTE_SWP_EXCLUSIVE (_AT(pteval_t, 1) << 2) /* only for swp ptes */
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#define PTE_DIRTY (_AT(pteval_t, 1) << 55)
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#define PTE_SPECIAL (_AT(pteval_t, 1) << 56)
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#define PTE_DEVMAP (_AT(pteval_t, 1) << 57)
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/*
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* PTE_PRESENT_INVALID=1 & PTE_VALID=0 indicates that the pte's fields should be
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* interpreted according to the HW layout by SW but any attempted HW access to
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* the address will result in a fault. pte_present() returns true.
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*/
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#define PTE_PRESENT_INVALID (PTE_NG) /* only when !PTE_VALID */
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#ifdef CONFIG_HAVE_ARCH_USERFAULTFD_WP
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#define PTE_UFFD_WP (_AT(pteval_t, 1) << 58) /* uffd-wp tracking */
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#define PTE_SWP_UFFD_WP (_AT(pteval_t, 1) << 3) /* only for swp ptes */
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#else
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#define PTE_UFFD_WP (_AT(pteval_t, 0))
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#define PTE_SWP_UFFD_WP (_AT(pteval_t, 0))
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#endif /* CONFIG_HAVE_ARCH_USERFAULTFD_WP */
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#define _PROT_DEFAULT (PTE_TYPE_PAGE | PTE_AF | PTE_SHARED)
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#define PROT_DEFAULT (PTE_TYPE_PAGE | PTE_MAYBE_NG | PTE_MAYBE_SHARED | PTE_AF)
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#define PROT_SECT_DEFAULT (PMD_TYPE_SECT | PMD_MAYBE_NG | PMD_MAYBE_SHARED | PMD_SECT_AF)
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#define PROT_DEVICE_nGnRnE (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_WRITE | PTE_ATTRINDX(MT_DEVICE_nGnRnE))
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#define PROT_DEVICE_nGnRE (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_WRITE | PTE_ATTRINDX(MT_DEVICE_nGnRE))
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#define PROT_NORMAL_NC (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_WRITE | PTE_ATTRINDX(MT_NORMAL_NC))
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#define PROT_NORMAL (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_WRITE | PTE_ATTRINDX(MT_NORMAL))
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#define PROT_NORMAL_TAGGED (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_WRITE | PTE_ATTRINDX(MT_NORMAL_TAGGED))
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#define PROT_SECT_DEVICE_nGnRE (PROT_SECT_DEFAULT | PMD_SECT_PXN | PMD_SECT_UXN | PMD_ATTRINDX(MT_DEVICE_nGnRE))
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#define PROT_SECT_NORMAL (PROT_SECT_DEFAULT | PMD_SECT_PXN | PMD_SECT_UXN | PTE_WRITE | PMD_ATTRINDX(MT_NORMAL))
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#define PROT_SECT_NORMAL_EXEC (PROT_SECT_DEFAULT | PMD_SECT_UXN | PMD_ATTRINDX(MT_NORMAL))
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#define _PAGE_DEFAULT (_PROT_DEFAULT | PTE_ATTRINDX(MT_NORMAL))
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#define _PAGE_KERNEL (PROT_NORMAL)
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#define _PAGE_KERNEL_RO ((PROT_NORMAL & ~PTE_WRITE) | PTE_RDONLY)
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#define _PAGE_KERNEL_ROX ((PROT_NORMAL & ~(PTE_WRITE | PTE_PXN)) | PTE_RDONLY)
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#define _PAGE_KERNEL_EXEC (PROT_NORMAL & ~PTE_PXN)
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#define _PAGE_KERNEL_EXEC_CONT ((PROT_NORMAL & ~PTE_PXN) | PTE_CONT)
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#define _PAGE_SHARED (_PAGE_DEFAULT | PTE_USER | PTE_RDONLY | PTE_NG | PTE_PXN | PTE_UXN | PTE_WRITE)
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#define _PAGE_SHARED_EXEC (_PAGE_DEFAULT | PTE_USER | PTE_RDONLY | PTE_NG | PTE_PXN | PTE_WRITE)
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#define _PAGE_READONLY (_PAGE_DEFAULT | PTE_USER | PTE_RDONLY | PTE_NG | PTE_PXN | PTE_UXN)
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#define _PAGE_READONLY_EXEC (_PAGE_DEFAULT | PTE_USER | PTE_RDONLY | PTE_NG | PTE_PXN)
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#define _PAGE_EXECONLY (_PAGE_DEFAULT | PTE_RDONLY | PTE_NG | PTE_PXN)
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#ifndef __ASSEMBLY__
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#include <asm/cpufeature.h>
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#include <asm/pgtable-types.h>
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#include <asm/rsi.h>
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extern bool arm64_use_ng_mappings;
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extern unsigned long prot_ns_shared;
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#define PROT_NS_SHARED (is_realm_world() ? prot_ns_shared : 0)
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#define PTE_MAYBE_NG (arm64_use_ng_mappings ? PTE_NG : 0)
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#define PMD_MAYBE_NG (arm64_use_ng_mappings ? PMD_SECT_NG : 0)
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#ifndef CONFIG_ARM64_LPA2
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#define lpa2_is_enabled() false
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#define PTE_MAYBE_SHARED PTE_SHARED
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#define PMD_MAYBE_SHARED PMD_SECT_S
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#else
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static inline bool __pure lpa2_is_enabled(void)
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{
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return read_tcr() & TCR_DS;
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}
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#define PTE_MAYBE_SHARED (lpa2_is_enabled() ? 0 : PTE_SHARED)
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#define PMD_MAYBE_SHARED (lpa2_is_enabled() ? 0 : PMD_SECT_S)
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#endif
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/*
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* If we have userspace only BTI we don't want to mark kernel pages
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* guarded even if the system does support BTI.
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*/
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#define PTE_MAYBE_GP (system_supports_bti_kernel() ? PTE_GP : 0)
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#define PAGE_KERNEL __pgprot(_PAGE_KERNEL)
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#define PAGE_KERNEL_RO __pgprot(_PAGE_KERNEL_RO)
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#define PAGE_KERNEL_ROX __pgprot(_PAGE_KERNEL_ROX)
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#define PAGE_KERNEL_EXEC __pgprot(_PAGE_KERNEL_EXEC)
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#define PAGE_KERNEL_EXEC_CONT __pgprot(_PAGE_KERNEL_EXEC_CONT)
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#define PAGE_S2_MEMATTR(attr, has_fwb) \
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({ \
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u64 __val; \
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if (has_fwb) \
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__val = PTE_S2_MEMATTR(MT_S2_FWB_ ## attr); \
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else \
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__val = PTE_S2_MEMATTR(MT_S2_ ## attr); \
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__val; \
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})
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#define PAGE_NONE __pgprot(((_PAGE_DEFAULT) & ~PTE_VALID) | PTE_PRESENT_INVALID | PTE_RDONLY | PTE_NG | PTE_PXN | PTE_UXN)
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/* shared+writable pages are clean by default, hence PTE_RDONLY|PTE_WRITE */
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#define PAGE_SHARED __pgprot(_PAGE_SHARED)
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#define PAGE_SHARED_EXEC __pgprot(_PAGE_SHARED_EXEC)
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#define PAGE_READONLY __pgprot(_PAGE_READONLY)
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#define PAGE_READONLY_EXEC __pgprot(_PAGE_READONLY_EXEC)
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#define PAGE_EXECONLY __pgprot(_PAGE_EXECONLY)
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#endif /* __ASSEMBLY__ */
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#define pte_pi_index(pte) ( \
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((pte & BIT(PTE_PI_IDX_3)) >> (PTE_PI_IDX_3 - 3)) | \
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((pte & BIT(PTE_PI_IDX_2)) >> (PTE_PI_IDX_2 - 2)) | \
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((pte & BIT(PTE_PI_IDX_1)) >> (PTE_PI_IDX_1 - 1)) | \
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((pte & BIT(PTE_PI_IDX_0)) >> (PTE_PI_IDX_0 - 0)))
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/*
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* Page types used via Permission Indirection Extension (PIE). PIE uses
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* the USER, DBM, PXN and UXN bits to to generate an index which is used
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* to look up the actual permission in PIR_ELx and PIRE0_EL1. We define
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* combinations we use on non-PIE systems with the same encoding, for
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* convenience these are listed here as comments as are the unallocated
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* encodings.
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*/
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/* 0: PAGE_DEFAULT */
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/* 1: PTE_USER */
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/* 2: PTE_WRITE */
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/* 3: PTE_WRITE | PTE_USER */
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/* 4: PAGE_EXECONLY PTE_PXN */
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/* 5: PAGE_READONLY_EXEC PTE_PXN | PTE_USER */
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/* 6: PTE_PXN | PTE_WRITE */
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/* 7: PAGE_SHARED_EXEC PTE_PXN | PTE_WRITE | PTE_USER */
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/* 8: PAGE_KERNEL_ROX PTE_UXN */
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/* 9: PAGE_GCS_RO PTE_UXN | PTE_USER */
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/* a: PAGE_KERNEL_EXEC PTE_UXN | PTE_WRITE */
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/* b: PAGE_GCS PTE_UXN | PTE_WRITE | PTE_USER */
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/* c: PAGE_KERNEL_RO PTE_UXN | PTE_PXN */
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/* d: PAGE_READONLY PTE_UXN | PTE_PXN | PTE_USER */
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/* e: PAGE_KERNEL PTE_UXN | PTE_PXN | PTE_WRITE */
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/* f: PAGE_SHARED PTE_UXN | PTE_PXN | PTE_WRITE | PTE_USER */
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#define _PAGE_GCS (_PAGE_DEFAULT | PTE_NG | PTE_UXN | PTE_WRITE | PTE_USER)
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#define _PAGE_GCS_RO (_PAGE_DEFAULT | PTE_NG | PTE_UXN | PTE_USER)
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#define PAGE_GCS __pgprot(_PAGE_GCS)
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#define PAGE_GCS_RO __pgprot(_PAGE_GCS_RO)
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#define PIE_E0 ( \
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PIRx_ELx_PERM(pte_pi_index(_PAGE_GCS), PIE_GCS) | \
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PIRx_ELx_PERM(pte_pi_index(_PAGE_GCS_RO), PIE_R) | \
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PIRx_ELx_PERM(pte_pi_index(_PAGE_EXECONLY), PIE_X_O) | \
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PIRx_ELx_PERM(pte_pi_index(_PAGE_READONLY_EXEC), PIE_RX_O) | \
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PIRx_ELx_PERM(pte_pi_index(_PAGE_SHARED_EXEC), PIE_RWX_O) | \
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PIRx_ELx_PERM(pte_pi_index(_PAGE_READONLY), PIE_R_O) | \
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PIRx_ELx_PERM(pte_pi_index(_PAGE_SHARED), PIE_RW_O))
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#define PIE_E1 ( \
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PIRx_ELx_PERM(pte_pi_index(_PAGE_GCS), PIE_NONE_O) | \
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PIRx_ELx_PERM(pte_pi_index(_PAGE_GCS_RO), PIE_NONE_O) | \
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PIRx_ELx_PERM(pte_pi_index(_PAGE_EXECONLY), PIE_NONE_O) | \
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PIRx_ELx_PERM(pte_pi_index(_PAGE_READONLY_EXEC), PIE_R) | \
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PIRx_ELx_PERM(pte_pi_index(_PAGE_SHARED_EXEC), PIE_RW) | \
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PIRx_ELx_PERM(pte_pi_index(_PAGE_READONLY), PIE_R) | \
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PIRx_ELx_PERM(pte_pi_index(_PAGE_SHARED), PIE_RW) | \
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PIRx_ELx_PERM(pte_pi_index(_PAGE_KERNEL_ROX), PIE_RX) | \
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PIRx_ELx_PERM(pte_pi_index(_PAGE_KERNEL_EXEC), PIE_RWX) | \
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PIRx_ELx_PERM(pte_pi_index(_PAGE_KERNEL_RO), PIE_R) | \
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PIRx_ELx_PERM(pte_pi_index(_PAGE_KERNEL), PIE_RW))
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#endif /* __ASM_PGTABLE_PROT_H */
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