linux-yocto/tools/testing/selftests/kvm/include/s390x/facility.h
Hariharan Mari 2688d68141 KVM: s390: selftests: Add regression tests for SORTL and DFLTCC CPU subfunctions
Introduce new regression tests to verify the ASM inline block in the SORTL
and DFLTCC CPU subfunctions for the s390x architecture. These tests ensure
that future changes to the ASM code are properly validated.

The test procedure:

1. Create a VM and request the KVM_S390_VM_CPU_MACHINE_SUBFUNC attribute
   from the KVM_S390_VM_CPU_MODEL group for this VM. This SUBFUNC attribute
   contains the results of all CPU subfunction instructions.
2. For each tested subfunction (SORTL and DFLTCC), execute the
   corresponding ASM instruction and capture the result array.
3. Perform a memory comparison between the results stored in the SUBFUNC
   attribute (obtained in step 1) and the ASM instruction results (obtained
   in step 2) for each tested subfunction.

This process ensures that the KVM implementation accurately reflects the
behavior of the actual CPU instructions for the tested subfunctions.

Suggested-by: Janosch Frank <frankja@linux.ibm.com>
Signed-off-by: Hariharan Mari <hari55@linux.ibm.com>
Reviewed-by: Janosch Frank <frankja@linux.ibm.com>
Reviewed-by: Christoph Schlameuss <schlameuss@linux.ibm.com>
Link: https://lore.kernel.org/r/20240823130947.38323-2-hari55@linux.ibm.com
Signed-off-by: Janosch Frank <frankja@linux.ibm.com>
Message-ID: <20240823130947.38323-2-hari55@linux.ibm.com>
2024-10-07 08:53:55 +00:00

51 lines
1.0 KiB
C

/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright IBM Corp. 2024
*
* Authors:
* Hariharan Mari <hari55@linux.ibm.com>
*
* Get the facility bits with the STFLE instruction
*/
#ifndef SELFTEST_KVM_FACILITY_H
#define SELFTEST_KVM_FACILITY_H
#include <linux/bitops.h>
/* alt_stfle_fac_list[16] + stfle_fac_list[16] */
#define NB_STFL_DOUBLEWORDS 32
extern uint64_t stfl_doublewords[NB_STFL_DOUBLEWORDS];
extern bool stfle_flag;
static inline bool test_bit_inv(unsigned long nr, const unsigned long *ptr)
{
return test_bit(nr ^ (BITS_PER_LONG - 1), ptr);
}
static inline void stfle(uint64_t *fac, unsigned int nb_doublewords)
{
register unsigned long r0 asm("0") = nb_doublewords - 1;
asm volatile(" .insn s,0xb2b00000,0(%1)\n"
: "+d" (r0)
: "a" (fac)
: "memory", "cc");
}
static inline void setup_facilities(void)
{
stfle(stfl_doublewords, NB_STFL_DOUBLEWORDS);
stfle_flag = true;
}
static inline bool test_facility(int nr)
{
if (!stfle_flag)
setup_facilities();
return test_bit_inv(nr, stfl_doublewords);
}
#endif