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c6e56cf6b2
Move the integrity information into the queue limits so that it can be set atomically with other queue limits, and that the sysfs changes to the read_verify and write_generate flags are properly synchronized. This also allows to provide a more useful helper to stack the integrity fields, although it still is separate from the main stacking function as not all stackable devices want to inherit the integrity settings. Even with that it greatly simplifies the code in md and dm. Note that the integrity field is moved as-is into the queue limits. While there are good arguments for removing the separate blk_integrity structure, this would cause a lot of churn and might better be done at a later time if desired. However the integrity field in the queue_limits structure is now unconditional so that various ifdefs can be avoided or replaced with IS_ENABLED(). Given that tiny size of it that seems like a worthwhile trade off. Signed-off-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Hannes Reinecke <hare@suse.de> Reviewed-by: Martin K. Petersen <martin.petersen@oracle.com> Link: https://lore.kernel.org/r/20240613084839.1044015-13-hch@lst.de Signed-off-by: Jens Axboe <axboe@kernel.dk>
70 lines
1.6 KiB
C
70 lines
1.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _LINUX_T10_PI_H
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#define _LINUX_T10_PI_H
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#include <linux/types.h>
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#include <linux/blk-mq.h>
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/*
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* A T10 PI-capable target device can be formatted with different
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* protection schemes. Currently 0 through 3 are defined:
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*
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* Type 0 is regular (unprotected) I/O
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*
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* Type 1 defines the contents of the guard and reference tags
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*
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* Type 2 defines the contents of the guard and reference tags and
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* uses 32-byte commands to seed the latter
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*
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* Type 3 defines the contents of the guard tag only
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*/
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enum t10_dif_type {
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T10_PI_TYPE0_PROTECTION = 0x0,
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T10_PI_TYPE1_PROTECTION = 0x1,
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T10_PI_TYPE2_PROTECTION = 0x2,
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T10_PI_TYPE3_PROTECTION = 0x3,
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};
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/*
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* T10 Protection Information tuple.
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*/
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struct t10_pi_tuple {
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__be16 guard_tag; /* Checksum */
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__be16 app_tag; /* Opaque storage */
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__be32 ref_tag; /* Target LBA or indirect LBA */
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};
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#define T10_PI_APP_ESCAPE cpu_to_be16(0xffff)
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#define T10_PI_REF_ESCAPE cpu_to_be32(0xffffffff)
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static inline u32 t10_pi_ref_tag(struct request *rq)
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{
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unsigned int shift = rq->q->limits.integrity.interval_exp;
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return blk_rq_pos(rq) >> (shift - SECTOR_SHIFT) & 0xffffffff;
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}
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struct crc64_pi_tuple {
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__be64 guard_tag;
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__be16 app_tag;
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__u8 ref_tag[6];
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};
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/**
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* lower_48_bits() - return bits 0-47 of a number
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* @n: the number we're accessing
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*/
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static inline u64 lower_48_bits(u64 n)
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{
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return n & ((1ull << 48) - 1);
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}
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static inline u64 ext_pi_ref_tag(struct request *rq)
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{
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unsigned int shift = rq->q->limits.integrity.interval_exp;
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return lower_48_bits(blk_rq_pos(rq) >> (shift - SECTOR_SHIFT));
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}
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#endif
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