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c6c973dbfa
The minimum supported GCC version is 8.1, which supports flag output operands and always defines __GCC_ASM_FLAG_OUTPUTS__ macro. Remove code depending on __GCC_ASM_FLAG_OUTPUTS__ and use the "=@ccCOND" flag output operand directly. Use the equivalent "=@ccz" instead of "=@cce" flag output operand for CMPXCHG8B and CMPXCHG16B instructions. These instructions set a single flag bit - the Zero flag - and "=@ccz" is used to distinguish the CC user from comparison instructions, where set ZERO flag indeed means that the values are equal. Signed-off-by: Uros Bizjak <ubizjak@gmail.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Link: https://lore.kernel.org/r/20250905121723.GCaLrU04lP2A50PT-B@fat_crate.local
44 lines
1.3 KiB
C
44 lines
1.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_X86_RMWcc
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#define _ASM_X86_RMWcc
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#include <linux/args.h>
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#define __CLOBBERS_MEM(clb...) "memory", ## clb
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#define __GEN_RMWcc(fullop, _var, cc, clobbers, ...) \
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({ \
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bool c; \
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asm_inline volatile (fullop \
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: [var] "+m" (_var), "=@cc" #cc (c) \
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: __VA_ARGS__ : clobbers); \
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c; \
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})
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#define GEN_UNARY_RMWcc_4(op, var, cc, arg0) \
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__GEN_RMWcc(op " " arg0, var, cc, __CLOBBERS_MEM())
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#define GEN_UNARY_RMWcc_3(op, var, cc) \
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GEN_UNARY_RMWcc_4(op, var, cc, "%[var]")
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#define GEN_UNARY_RMWcc(X...) CONCATENATE(GEN_UNARY_RMWcc_, COUNT_ARGS(X))(X)
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#define GEN_BINARY_RMWcc_6(op, var, cc, vcon, _val, arg0) \
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__GEN_RMWcc(op " %[val], " arg0, var, cc, \
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__CLOBBERS_MEM(), [val] vcon (_val))
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#define GEN_BINARY_RMWcc_5(op, var, cc, vcon, val) \
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GEN_BINARY_RMWcc_6(op, var, cc, vcon, val, "%[var]")
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#define GEN_BINARY_RMWcc(X...) CONCATENATE(GEN_BINARY_RMWcc_, COUNT_ARGS(X))(X)
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#define GEN_UNARY_SUFFIXED_RMWcc(op, suffix, var, cc, clobbers...) \
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__GEN_RMWcc(op " %[var]\n\t" suffix, var, cc, \
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__CLOBBERS_MEM(clobbers))
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#define GEN_BINARY_SUFFIXED_RMWcc(op, suffix, var, cc, vcon, _val, clobbers...)\
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__GEN_RMWcc(op " %[val], %[var]\n\t" suffix, var, cc, \
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__CLOBBERS_MEM(clobbers), [val] vcon (_val))
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#endif /* _ASM_X86_RMWcc */
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