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874c90221e
t6020-dart is compatible to t8110-dart and annotated as such in Apple's device tree. Add its per-SoC compatible in case t6020 specific handling becomes necessary. The dart instances on M2 Pro/Max/Ultra based SoCs differ in one aspect from the M2 based ones. They indicate an IAS of 42 requiring implementing support for a fouth page table level in the dart driver and its io-pgtable [1]. [1]: https://lore.kernel.org/asahi/20250821-apple-dart-4levels-v2-0-e39af79daa37@jannau.net/ Reviewed-by: Neal Gompa <neal@gompa.dev> Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Janne Grunau <j@jannau.net>
93 lines
2.0 KiB
YAML
93 lines
2.0 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/iommu/apple,dart.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Apple DART IOMMU
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maintainers:
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- Sven Peter <sven@svenpeter.dev>
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description: |+
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Apple SoCs may contain an implementation of their Device Address
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Resolution Table which provides a mandatory layer of address
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translations for various masters.
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Each DART instance is capable of handling up to 16 different streams
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with individual pagetables and page-level read/write protection flags.
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This DART IOMMU also raises interrupts in response to various
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fault conditions.
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properties:
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compatible:
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oneOf:
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- enum:
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- apple,t8103-dart
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- apple,t8103-usb4-dart
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- apple,t8110-dart
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- apple,t6000-dart
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- items:
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- const: apple,t6020-dart
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- const: apple,t8110-dart
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clocks:
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description:
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Reference to the gate clock phandle if required for this IOMMU.
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Optional since not all IOMMUs are attached to a clock gate.
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'#iommu-cells':
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const: 1
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description:
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Has to be one. The single cell describes the stream id emitted by
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a master to the IOMMU.
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power-domains:
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maxItems: 1
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required:
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- compatible
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- reg
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- '#iommu-cells'
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- interrupts
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additionalProperties: false
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examples:
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- |+
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dart1: iommu@82f80000 {
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compatible = "apple,t8103-dart";
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reg = <0x82f80000 0x4000>;
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interrupts = <1 781 4>;
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#iommu-cells = <1>;
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};
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master1 {
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iommus = <&dart1 0>;
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};
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- |+
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dart2a: iommu@82f00000 {
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compatible = "apple,t8103-dart";
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reg = <0x82f00000 0x4000>;
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interrupts = <1 781 4>;
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#iommu-cells = <1>;
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};
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dart2b: iommu@82f80000 {
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compatible = "apple,t8103-dart";
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reg = <0x82f80000 0x4000>;
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interrupts = <1 781 4>;
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#iommu-cells = <1>;
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};
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master2 {
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iommus = <&dart2a 0>, <&dart2b 1>;
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};
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