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468d8b462a
To prepare for the IDC upgrade to support different CORE PCI drivers, rename header file from iidc.h to iidc_rdma.h since this files functionality is specifically for RDMA support. Use net/dscp.h include in irdma osdep.h and DSCP_MAX type.h, instead of iidc header and define. Reviewed-by: Przemek Kitszel <przemyslaw.kitszel@intel.com> Signed-off-by: Dave Ertman <david.m.ertman@intel.com> Signed-off-by: Tatyana Nikolova <tatyana.e.nikolova@intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
110 lines
3.0 KiB
C
110 lines
3.0 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/* Copyright (C) 2021, Intel Corporation. */
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#ifndef _IIDC_RDMA_H_
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#define _IIDC_RDMA_H_
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#include <linux/auxiliary_bus.h>
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#include <linux/dcbnl.h>
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#include <linux/device.h>
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#include <linux/if_ether.h>
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#include <linux/kernel.h>
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#include <linux/netdevice.h>
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enum iidc_event_type {
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IIDC_EVENT_BEFORE_MTU_CHANGE,
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IIDC_EVENT_AFTER_MTU_CHANGE,
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IIDC_EVENT_BEFORE_TC_CHANGE,
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IIDC_EVENT_AFTER_TC_CHANGE,
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IIDC_EVENT_CRIT_ERR,
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IIDC_EVENT_NBITS /* must be last */
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};
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enum iidc_reset_type {
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IIDC_PFR,
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IIDC_CORER,
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IIDC_GLOBR,
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};
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enum iidc_rdma_protocol {
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IIDC_RDMA_PROTOCOL_IWARP = BIT(0),
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IIDC_RDMA_PROTOCOL_ROCEV2 = BIT(1),
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};
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#define IIDC_MAX_USER_PRIORITY 8
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#define IIDC_MAX_DSCP_MAPPING 64
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#define IIDC_DSCP_PFC_MODE 0x1
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/* Struct to hold per RDMA Qset info */
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struct iidc_rdma_qset_params {
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/* Qset TEID returned to the RDMA driver in
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* ice_add_rdma_qset and used by RDMA driver
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* for calls to ice_del_rdma_qset
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*/
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u32 teid; /* Qset TEID */
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u16 qs_handle; /* RDMA driver provides this */
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u16 vport_id; /* VSI index */
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u8 tc; /* TC branch the Qset should belong to */
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};
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struct iidc_qos_info {
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u64 tc_ctx;
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u8 rel_bw;
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u8 prio_type;
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u8 egress_virt_up;
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u8 ingress_virt_up;
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};
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/* Struct to pass QoS info */
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struct iidc_qos_params {
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struct iidc_qos_info tc_info[IEEE_8021QAZ_MAX_TCS];
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u8 up2tc[IIDC_MAX_USER_PRIORITY];
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u8 vport_relative_bw;
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u8 vport_priority_type;
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u8 num_tc;
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u8 pfc_mode;
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u8 dscp_map[IIDC_MAX_DSCP_MAPPING];
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};
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struct iidc_event {
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DECLARE_BITMAP(type, IIDC_EVENT_NBITS);
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u32 reg;
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};
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struct ice_pf;
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int ice_add_rdma_qset(struct ice_pf *pf, struct iidc_rdma_qset_params *qset);
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int ice_del_rdma_qset(struct ice_pf *pf, struct iidc_rdma_qset_params *qset);
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int ice_rdma_request_reset(struct ice_pf *pf, enum iidc_reset_type reset_type);
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int ice_rdma_update_vsi_filter(struct ice_pf *pf, u16 vsi_id, bool enable);
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void ice_get_qos_params(struct ice_pf *pf, struct iidc_qos_params *qos);
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int ice_alloc_rdma_qvector(struct ice_pf *pf, struct msix_entry *entry);
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void ice_free_rdma_qvector(struct ice_pf *pf, struct msix_entry *entry);
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/* Structure representing auxiliary driver tailored information about the core
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* PCI dev, each auxiliary driver using the IIDC interface will have an
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* instance of this struct dedicated to it.
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*/
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struct iidc_auxiliary_dev {
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struct auxiliary_device adev;
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struct ice_pf *pf;
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};
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/* structure representing the auxiliary driver. This struct is to be
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* allocated and populated by the auxiliary driver's owner. The core PCI
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* driver will access these ops by performing a container_of on the
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* auxiliary_device->dev.driver.
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*/
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struct iidc_auxiliary_drv {
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struct auxiliary_driver adrv;
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/* This event_handler is meant to be a blocking call. For instance,
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* when a BEFORE_MTU_CHANGE event comes in, the event_handler will not
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* return until the auxiliary driver is ready for the MTU change to
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* happen.
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*/
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void (*event_handler)(struct ice_pf *pf, struct iidc_event *event);
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};
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#endif /* _IIDC_RDMA_H_*/
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