Dhananjay Ugwekar 469c76a83b perf/x86/rapl: Fix the error checking order ... After the commit b4943b8bfc ("perf/x86/rapl: Add core energy counter support for AMD CPUs"), the default "perf record"/"perf top" command is broken in systems where there isn't a PMU registered for type PERF_TYPE_RAW. This is due to the change in order of error checks in rapl_pmu_event_init() Due to which we return -EINVAL instead of -ENOENT, when we reach here from the fallback loop in perf_init_event(). Move the "PMU and event type match" back to the beginning of the function so that we return -ENOENT early on. Closes: https://lore.kernel.org/all/uv7mz6vew2bzgre5jdpmwldxljp5djzmuiksqdcdwipfm4zm7w@ribobcretidk/ Fixes: b4943b8bfc ("perf/x86/rapl: Add core energy counter support for AMD CPUs") Reported-by: Koichiro Den <koichiro.den@canonical.com> Signed-off-by: Dhananjay Ugwekar <dhananjay.ugwekar@amd.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lkml.kernel.org/r/20250129080513.30353-1-dhananjay.ugwekar@amd.com		2025-02-08 15:47:25 +01:00
..
amd	perf/x86: Relax privilege filter restriction on AMD IBS	2024-12-09 15:50:32 +01:00
intel	Performance events changes for v6.14:	2025-01-21 10:52:03 -08:00
zhaoxin	perf/x86: Support counter mask	2024-07-04 16:00:36 +02:00
core.c	perf/core: Check sample_type in perf_sample_save_brstack	2024-11-19 09:23:42 +01:00
Kconfig
Makefile
msr.c	perf/x86/msr: Switch to new Intel CPU model defines	2024-04-29 10:31:04 +02:00
perf_event_flags.h	perf/x86/intel: Support branch counters logging	2023-10-27 15:05:11 +02:00
perf_event.h	perf/x86/intel: Support RDPMC metrics clear mode	2024-12-20 15:31:22 +01:00
probe.c
probe.h
rapl.c	perf/x86/rapl: Fix the error checking order	2025-02-08 15:47:25 +01:00
utils.c	perf/x86/lbr: Filter vsyscall addresses	2023-10-08 12:25:18 +02:00