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d6d756d3ea
[ Upstream commit a747c4dd2a60c4d0179b372032a4b98548135096 ]
The HDMI bridge chip fails to generate an audio source due to the SAI5
master clock (MCLK) direction not being set to output. This prevents proper
clocking of the HDMI audio interface.
Add the `fsl,sai-mclk-direction-output` property to the SAI5 node to ensure
the MCLK is driven by the SoC, resolving the HDMI sound issue.
Fixes: 1d6880ceef ("arm64: dts: imx8mn-beacon: Add HDMI video with sound")
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
154 lines
2.9 KiB
Plaintext
154 lines
2.9 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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/*
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* Copyright 2020 Compass Electronics Group, LLC
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*/
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/dts-v1/;
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#include "imx8mn.dtsi"
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#include "imx8mn-beacon-som.dtsi"
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#include "imx8mn-beacon-baseboard.dtsi"
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/ {
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model = "Beacon EmbeddedWorks i.MX8M Nano Development Kit";
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compatible = "beacon,imx8mn-beacon-kit", "fsl,imx8mn";
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chosen {
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stdout-path = &uart2;
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};
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connector {
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compatible = "hdmi-connector";
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type = "a";
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port {
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hdmi_connector_in: endpoint {
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remote-endpoint = <&adv7535_out>;
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};
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};
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};
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reg_hdmi: regulator-hdmi-dvdd {
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compatible = "regulator-fixed";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_reg_hdmi>;
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regulator-name = "hdmi_pwr_en";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio2 11 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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startup-delay-us = <70000>;
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regulator-always-on;
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};
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sound-hdmi {
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compatible = "simple-audio-card";
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simple-audio-card,name = "sound-hdmi";
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simple-audio-card,format = "i2s";
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simple-audio-card,cpu {
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sound-dai = <&sai5>;
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system-clock-direction-out;
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};
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simple-audio-card,codec {
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sound-dai = <&adv_bridge>;
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};
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};
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};
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&i2c2 {
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adv_bridge: hdmi@3d {
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compatible = "adi,adv7535";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_hdmi_bridge>;
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reg = <0x3d>, <0x3c>, <0x3e>, <0x3f>;
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reg-names = "main", "cec", "edid", "packet";
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adi,dsi-lanes = <4>;
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avdd-supply = <®_hdmi>;
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a2vdd-supply = <®_hdmi>;
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dvdd-supply = <®_hdmi>;
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pvdd-supply = <®_hdmi>;
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v1p2-supply = <®_hdmi>;
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v3p3-supply = <®_hdmi>;
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interrupt-parent = <&gpio1>;
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interrupts = <9 IRQ_TYPE_LEVEL_LOW>;
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#sound-dai-cells = <0>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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adv7535_in: endpoint {
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remote-endpoint = <&dsi_out>;
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};
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};
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port@1 {
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reg = <1>;
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adv7535_out: endpoint {
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remote-endpoint = <&hdmi_connector_in>;
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};
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};
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};
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};
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};
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&lcdif {
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assigned-clocks = <&clk IMX8MN_VIDEO_PLL1>;
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assigned-clock-rates = <594000000>;
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status = "okay";
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};
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&mipi_dsi {
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samsung,esc-clock-frequency = <20000000>;
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status = "okay";
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ports {
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port@1 {
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reg = <1>;
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dsi_out: endpoint {
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remote-endpoint = <&adv7535_in>;
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};
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};
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};
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};
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&sai5 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_sai5>;
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assigned-clocks = <&clk IMX8MN_CLK_SAI5>;
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assigned-clock-parents = <&clk IMX8MN_AUDIO_PLL1_OUT>;
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assigned-clock-rates = <24576000>;
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#sound-dai-cells = <0>;
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fsl,sai-mclk-direction-output;
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status = "okay";
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};
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&iomuxc {
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pinctrl_hdmi_bridge: hdmibridgegrp {
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fsl,pins = <
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MX8MN_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x19
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>;
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};
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pinctrl_reg_hdmi: reghdmigrp {
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fsl,pins = <
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MX8MN_IOMUXC_SD1_STROBE_GPIO2_IO11 0x16
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>;
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};
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pinctrl_sai5: sai5grp {
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fsl,pins = <
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MX8MN_IOMUXC_SAI5_RXD3_SAI5_TX_DATA0 0xd6
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MX8MN_IOMUXC_SAI5_RXD2_SAI5_TX_BCLK 0xd6
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MX8MN_IOMUXC_SAI5_RXD1_SAI5_TX_SYNC 0xd6
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>;
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};
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};
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