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The Glymur SoC TCSR block provides CLKREF clocks for EDP, PCIe and USB. Add this to the TCSR clock controller binding together with identifiers for the clocks. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Bjorn Andersson <andersson@kernel.org> Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250825-glymur-clock-controller-v5-v5-2-01b8c8681bcd@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
68 lines
1.4 KiB
YAML
68 lines
1.4 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/qcom,sm8550-tcsr.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm TCSR Clock Controller on SM8550
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maintainers:
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- Bjorn Andersson <andersson@kernel.org>
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- Taniya Das <taniya.das@oss.qualcomm.com>
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description: |
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Qualcomm TCSR clock control module provides the clocks, resets and
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power domains on SM8550
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See also:
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- include/dt-bindings/clock/qcom,glymur-tcsr.h
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- include/dt-bindings/clock/qcom,sm8550-tcsr.h
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- include/dt-bindings/clock/qcom,sm8650-tcsr.h
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- include/dt-bindings/clock/qcom,sm8750-tcsr.h
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properties:
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compatible:
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items:
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- enum:
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- qcom,glymur-tcsr
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- qcom,milos-tcsr
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- qcom,sar2130p-tcsr
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- qcom,sm8550-tcsr
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- qcom,sm8650-tcsr
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- qcom,sm8750-tcsr
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- qcom,x1e80100-tcsr
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- const: syscon
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clocks:
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items:
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- description: TCXO pad clock
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reg:
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maxItems: 1
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'#clock-cells':
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const: 1
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'#reset-cells':
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const: 1
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required:
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- compatible
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- clocks
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/qcom,rpmh.h>
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clock-controller@1fc0000 {
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compatible = "qcom,sm8550-tcsr", "syscon";
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reg = <0x1fc0000 0x30000>;
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clocks = <&rpmhcc RPMH_CXO_CLK>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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};
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...
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