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8ea304cff0
-add SOC0_CLK_AHBMUX:
add SOC0_CLK_AHBMUX for ahb clock source divide.
mpll->
ahb_mux -> div_table -> clk_ahb
hpll->
-new add clock:
SOC0_CLK_MPHYSRC: UFS MPHY clock source.
SOC0_CLK_U2PHY_REFCLKSRC: USB2.0 phy clock reference source.
SOC1_CLK_I3C: I3C clock source.
Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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|---|---|---|
| .. | ||
| arm | ||
| ata | ||
| bus | ||
| clock | ||
| display | ||
| dma | ||
| firmware | ||
| gce | ||
| gpio | ||
| i2c | ||
| i3c | ||
| iio | ||
| input | ||
| interconnect | ||
| interrupt-controller | ||
| leds | ||
| mailbox | ||
| media | ||
| memory | ||
| mfd | ||
| mips | ||
| mux | ||
| net | ||
| nvmem | ||
| phy | ||
| pinctrl | ||
| pmu | ||
| power | ||
| pwm | ||
| regulator | ||
| reset | ||
| soc | ||
| sound | ||
| spmi | ||
| thermal | ||
| usb | ||
| watchdog | ||