Robert Richter b3dc5c735a cxl/region: Add a dev_err() on missing target list entries ... [ Upstream commit d90acdf49e ] Broken target lists are hard to discover as the driver fails at a later initialization stage. Add an error message for this. Example log messages: cxl_mem mem1: failed to find endpoint6:0000:e0:01.3 in target list of decoder1.1 cxl_port endpoint6: failed to register decoder6.0: -6 cxl_port endpoint6: probe: 0 Signed-off-by: Robert Richter <rrichter@amd.com> Reviewed-by: Gregory Price <gourry@gourry.net> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Dave Jiang <dave.jiang@intel.com> Reviewed-by: Dan Williams <dan.j.williams@intel.com> Reviewed-by: Alison Schofield <alison.schofield@intel.com> Reviewed-by: "Fabio M. De Francesco" <fabio.m.de.francesco@linux.intel.com> Tested-by: Gregory Price <gourry@gourry.net> Acked-by: Dan Williams <dan.j.williams@intel.com> Link: https://patch.msgid.link/20250509150700.2817697-14-rrichter@amd.com Signed-off-by: Dave Jiang <dave.jiang@intel.com> Signed-off-by: Sasha Levin <sashal@kernel.org>		2025-07-06 11:01:32 +02:00
..
core	cxl/region: Add a dev_err() on missing target list entries	2025-07-06 11:01:32 +02:00
acpi.c	cxl/acpi: Ensure ports ready at cxl_acpi_probe() return	2024-10-25 16:07:03 -05:00
cxl.h	cxl/port: Fix use-after-free, permit out-of-order decoder shutdown	2024-10-25 16:07:03 -05:00
cxlmem.h	cxl: Preserve the CDAT access_coordinate for an endpoint	2024-09-22 21:02:53 -07:00
cxlpci.h	PCI/CXL: Move CXL Vendor ID to pci_ids.h	2024-05-08 13:18:33 -05:00
Kconfig	cxl/port: Fix CXL port initialization order when the subsystem is built-in	2024-10-25 16:06:49 -05:00
Makefile	cxl/port: Fix CXL port initialization order when the subsystem is built-in	2024-10-25 16:06:49 -05:00
mem.c	cxl/pci: Rename cxl_setup_parent_dport() and cxl_dport_map_regs()	2024-09-03 15:29:33 -07:00
pci.c	cxl/pci: Fix potential bogus return value upon successful probing	2024-12-27 14:02:01 +01:00
pmem.c	move asm/unaligned.h to linux/unaligned.h	2024-10-02 17:23:23 -04:00
pmu.h	cxl/pci: Find and register CXL PMU devices	2023-05-30 11:20:35 -07:00
port.c	cxl/port: Fix CXL port initialization order when the subsystem is built-in	2024-10-25 16:06:49 -05:00
security.c	move asm/unaligned.h to linux/unaligned.h	2024-10-02 17:23:23 -04:00