Avadhut Naik e5e6a5aa39 EDAC/amd64: Fix size calculation for Non-Power-of-Two DIMMs ... commit a3f3040657 upstream. Each Chip-Select (CS) of a Unified Memory Controller (UMC) on AMD Zen-based SOCs has an Address Mask and a Secondary Address Mask register associated with it. The amd64_edac module logs DIMM sizes on a per-UMC per-CS granularity during init using these two registers. Currently, the module primarily considers only the Address Mask register for computing DIMM sizes. The Secondary Address Mask register is only considered for odd CS. Additionally, if it has been considered, the Address Mask register is ignored altogether for that CS. For power-of-two DIMMs i.e. DIMMs whose total capacity is a power of two (32GB, 64GB, etc), this is not an issue since only the Address Mask register is used. For non-power-of-two DIMMs i.e., DIMMs whose total capacity is not a power of two (48GB, 96GB, etc), however, the Secondary Address Mask register is used in conjunction with the Address Mask register. However, since the module only considers either of the two registers for a CS, the size computed by the module is incorrect. The Secondary Address Mask register is not considered for even CS, and the Address Mask register is not considered for odd CS. Introduce a new helper function so that both Address Mask and Secondary Address Mask registers are considered, when valid, for computing DIMM sizes. Furthermore, also rename some variables for greater clarity. Fixes: 81f5090db8 ("EDAC/amd64: Support asymmetric dual-rank DIMMs") Closes: https://lore.kernel.org/dbec22b6-00f2-498b-b70d-ab6f8a5ec87e@natrix.lt Reported-by: Žilvinas Žaltiena <zilvinas@natrix.lt> Signed-off-by: Avadhut Naik <avadhut.naik@amd.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Reviewed-by: Yazen Ghannam <yazen.ghannam@amd.com> Tested-by: Žilvinas Žaltiena <zilvinas@natrix.lt> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/20250529205013.403450-1-avadhut.naik@amd.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>		2025-07-06 11:00:13 +02:00
..
al_mc_edac.c
altera_edac.c	EDAC/altera: Use correct write width with the INTTEST register	2025-06-27 11:08:48 +01:00
altera_edac.h	EDAC/altera: Set DDR and SDMMC interrupt mask before registration	2025-05-09 09:43:50 +02:00
amd64_edac.c	EDAC/amd64: Fix size calculation for Non-Power-of-Two DIMMs	2025-07-06 11:00:13 +02:00
amd64_edac.h	- Add initial support for RAS hardware found on AMD server GPUs (MI200).	2023-06-26 15:09:18 -07:00
amd76x_edac.c
amd8111_edac.c
amd8111_edac.h
amd8131_edac.c
amd8131_edac.h
armada_xp_edac.c
aspeed_edac.c
bluefield_edac.c	EDAC/bluefield: Fix potential integer overflow	2024-12-09 10:31:47 +01:00
cell_edac.c
cpc925_edac.c
debugfs.c
dmc520_edac.c
e7xxx_edac.c
e752x_edac.c
edac_device_sysfs.c
edac_device.c
edac_device.h
edac_mc_sysfs.c
edac_mc.c
edac_mc.h
edac_module.c
edac_module.h
edac_pci_sysfs.c
edac_pci.c
edac_pci.h
fsl_ddr_edac.c	EDAC/fsl_ddr: Fix bad bit shift operations	2024-12-09 10:31:47 +01:00
fsl_ddr_edac.h
ghes_edac.c
highbank_l2_edac.c	EDAC: Explicitly include correct DT includes	2023-08-28 13:31:01 -05:00
highbank_mc_edac.c	EDAC: Explicitly include correct DT includes	2023-08-28 13:31:01 -05:00
i7core_edac.c
i10nm_base.c	EDAC/{skx_common,i10nm}: Fix the loss of saved RRL for HBM pseudo channel 0	2025-06-19 15:28:04 +02:00
i3000_edac.c
i3200_edac.c
i5000_edac.c
i5100_edac.c
i5400_edac.c
i7300_edac.c
i82443bxgx_edac.c
i82860_edac.c
i82875p_edac.c
i82975x_edac.c
ie31200_edac.c	EDAC/ie31200: work around false positive build warning	2025-06-04 14:42:07 +02:00
igen6_edac.c	EDAC/igen6: Avoid segmentation fault on module unload	2024-12-09 10:31:48 +01:00
Kconfig	EDAC/npcm: Add NPCM memory controller driver	2023-06-12 15:14:10 +02:00
layerscape_edac.c
Makefile	EDAC, i10nm: make skx_common.o a separate module	2024-08-03 08:53:19 +02:00
mce_amd.c	x86/MCE/AMD, EDAC/mce_amd: Decode UMC_V2 ECC errors	2023-06-05 12:27:11 +02:00
mce_amd.h
mpc85xx_edac.c	EDAC: Explicitly include correct DT includes	2023-08-28 13:31:01 -05:00
mpc85xx_edac.h
npcm_edac.c	EDAC: Explicitly include correct DT includes	2023-08-28 13:31:01 -05:00
octeon_edac-l2c.c
octeon_edac-lmc.c
octeon_edac-pc.c
octeon_edac-pci.c
pasemi_edac.c
pnd2_edac.c
pnd2_edac.h
ppc4xx_edac.c
ppc4xx_edac.h
qcom_edac.c	EDAC/qcom: Correct interrupt enable register configuration	2025-02-27 04:10:53 -08:00
r82600_edac.c
sb_edac.c
sifive_edac.c
skx_base.c
skx_common.c	EDAC/skx_common: Fix general protection fault	2025-06-19 15:28:04 +02:00
skx_common.h	EDAC/{skx_common,i10nm}: Fix the loss of saved RRL for HBM pseudo channel 0	2025-06-19 15:28:04 +02:00
synopsys_edac.c	EDAC/synopsys: Fix error injection on Zynq UltraScale+	2024-10-04 16:28:49 +02:00
thunderx_edac.c	EDAC/thunderx: Fix possible out-of-bounds string access	2024-01-25 15:35:12 -08:00
ti_edac.c
wq.c
x38_edac.c
xgene_edac.c
zynqmp_edac.c