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Merge pull request #173 from ting-liu/master

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add qoriq-atf_1.5.bb and linux-qoriq_5.4.bb
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Otavio Salvador 2021-10-21 08:33:52 -03:00 committed by GitHub
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recipes-bsp/atf/files/0001-Clean-usage-of-void-pointers-to-access-symbols.patch Normal file
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@ -0,0 +1,709 @@
From 9f85f9e3796f1c351bbc4c8436dc66d83c140b71 Mon Sep 17 00:00:00 2001
From: Joel Hutton <Joel.Hutton@Arm.com>
Date: Wed, 21 Mar 2018 11:40:57 +0000
Subject: [PATCH] Clean usage of void pointers to access symbols
Void pointers have been used to access linker symbols, by declaring an
extern pointer, then taking the address of it. This limits symbols
values to aligned pointer values. To remove this restriction an
IMPORT_SYM macro has been introduced, which declares it as a char
pointer and casts it to the required type.
Upstream-Status: Backport
Change-Id: I89877fc3b13ed311817bb8ba79d4872b89bfd3b0
Signed-off-by: Joel Hutton <Joel.Hutton@Arm.com>
---
bl1/bl1_private.h | 12 +++----
common/runtime_svc.c | 4 +--
drivers/auth/img_parser_mod.c | 9 +++---
include/common/bl_common.h | 32 ++++++++++++-------
include/common/runtime_svc.h | 4 +--
include/lib/utils_def.h | 19 ++++++++++-
include/plat/common/common_def.h | 24 ++------------
include/services/secure_partition.h | 12 +++----
lib/locks/bakery/bakery_lock_normal.c | 6 ++--
lib/pmf/pmf_main.c | 19 +++++------
plat/hisilicon/hikey/hikey_bl1_setup.c | 21 ++-----------
plat/hisilicon/hikey960/hikey960_bl1_setup.c | 16 ++--------
plat/hisilicon/poplar/bl1_plat_setup.c | 13 ++------
plat/mediatek/mt6795/bl31_plat_setup.c | 11 +++----
plat/mediatek/mt8173/bl31_plat_setup.c | 28 +++--------------
plat/nvidia/tegra/common/tegra_bl31_setup.c | 33 +++++++-------------
plat/rockchip/common/bl31_plat_setup.c | 13 ++------
services/std_svc/spm/spm_shim_private.h | 14 +++------
18 files changed, 103 insertions(+), 187 deletions(-)
diff --git a/bl1/bl1_private.h b/bl1/bl1_private.h
index 6ac3b8c67..42a74d22f 100644
--- a/bl1/bl1_private.h
+++ b/bl1/bl1_private.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -8,18 +8,16 @@
#define __BL1_PRIVATE_H__
#include <types.h>
+#include <utils_def.h>
/*******************************************************************************
* Declarations of linker defined symbols which will tell us where BL1 lives
* in Trusted ROM and RAM
******************************************************************************/
-extern uintptr_t __BL1_ROM_END__;
-#define BL1_ROM_END (uintptr_t)(&__BL1_ROM_END__)
+IMPORT_SYM(uintptr_t, __BL1_ROM_END__, BL1_ROM_END);
-extern uintptr_t __BL1_RAM_START__;
-extern uintptr_t __BL1_RAM_END__;
-#define BL1_RAM_BASE (uintptr_t)(&__BL1_RAM_START__)
-#define BL1_RAM_LIMIT (uintptr_t)(&__BL1_RAM_END__)
+IMPORT_SYM(uintptr_t, __BL1_RAM_START__, BL1_RAM_BASE);
+IMPORT_SYM(uintptr_t, __BL1_RAM_END__, BL1_RAM_LIMIT);
/******************************************
* Function prototypes
diff --git a/common/runtime_svc.c b/common/runtime_svc.c
index 0ea4cd093..de80f30c2 100644
--- a/common/runtime_svc.c
+++ b/common/runtime_svc.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -19,8 +19,6 @@
* 'rt_svc_descs_indices' array. This gives the index of the descriptor in the
* 'rt_svc_descs' array which contains the SMC handler.
******************************************************************************/
-#define RT_SVC_DESCS_START ((uintptr_t) (&__RT_SVC_DESCS_START__))
-#define RT_SVC_DESCS_END ((uintptr_t) (&__RT_SVC_DESCS_END__))
uint8_t rt_svc_descs_indices[MAX_RT_SVCS];
static rt_svc_desc_t *rt_svc_descs;
diff --git a/drivers/auth/img_parser_mod.c b/drivers/auth/img_parser_mod.c
index 6a0107115..63160141d 100644
--- a/drivers/auth/img_parser_mod.c
+++ b/drivers/auth/img_parser_mod.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -12,11 +12,10 @@
#include <limits.h>
#include <stdint.h>
#include <string.h>
+#include <utils_def.h>
-extern uintptr_t __PARSER_LIB_DESCS_START__;
-extern uintptr_t __PARSER_LIB_DESCS_END__;
-#define PARSER_LIB_DESCS_START ((uintptr_t) (&__PARSER_LIB_DESCS_START__))
-#define PARSER_LIB_DESCS_END ((uintptr_t) (&__PARSER_LIB_DESCS_END__))
+IMPORT_SYM(uintptr_t, __PARSER_LIB_DESCS_START__, PARSER_LIB_DESCS_START);
+IMPORT_SYM(uintptr_t, __PARSER_LIB_DESCS_END__, PARSER_LIB_DESCS_END);
static unsigned int parser_lib_indices[IMG_MAX_TYPES];
static img_parser_lib_desc_t *parser_lib_descs;
diff --git a/include/common/bl_common.h b/include/common/bl_common.h
index 4ef916f53..09a394dd1 100644
--- a/include/common/bl_common.h
+++ b/include/common/bl_common.h
@@ -64,33 +64,41 @@
#include <types.h>
#include <utils_def.h> /* To retain compatibility */
+
/*
* Declarations of linker defined symbols to help determine memory layout of
* BL images
*/
#if SEPARATE_CODE_AND_RODATA
-extern uintptr_t __TEXT_START__;
-extern uintptr_t __TEXT_END__;
-extern uintptr_t __RODATA_START__;
-extern uintptr_t __RODATA_END__;
+IMPORT_SYM(unsigned long, __TEXT_START__, BL_CODE_BASE);
+IMPORT_SYM(unsigned long, __TEXT_END__, BL_CODE_END);
+IMPORT_SYM(unsigned long, __RODATA_START__, BL_RO_DATA_BASE);
+IMPORT_SYM(unsigned long, __RODATA_END__, BL_RO_DATA_END);
#else
-extern uintptr_t __RO_START__;
-extern uintptr_t __RO_END__;
+IMPORT_SYM(unsigned long, __RO_START__, BL_CODE_BASE);
+IMPORT_SYM(unsigned long, __RO_END__, BL_CODE_END);
#endif
#if defined(IMAGE_BL2)
-extern uintptr_t __BL2_END__;
+IMPORT_SYM(unsigned long, __BL2_END__, BL2_END);
#elif defined(IMAGE_BL2U)
-extern uintptr_t __BL2U_END__;
+IMPORT_SYM(unsigned long, __BL2U_END__, BL2U_END);
#elif defined(IMAGE_BL31)
-extern uintptr_t __BL31_END__;
+IMPORT_SYM(unsigned long, __BL31_END__, BL31_END);
#elif defined(IMAGE_BL32)
-extern uintptr_t __BL32_END__;
+IMPORT_SYM(unsigned long, __BL32_END__, BL32_END);
#endif /* IMAGE_BLX */
+/*
+ * The next 2 constants identify the extents of the coherent memory region.
+ * These addresses are used by the MMU setup code and therefore they must be
+ * page-aligned. It is the responsibility of the linker script to ensure that
+ * __COHERENT_RAM_START__ and __COHERENT_RAM_END__ linker symbols refer to
+ * page-aligned addresses.
+ */
#if USE_COHERENT_MEM
-extern uintptr_t __COHERENT_RAM_START__;
-extern uintptr_t __COHERENT_RAM_END__;
+IMPORT_SYM(unsigned long, __COHERENT_RAM_START__, BL_COHERENT_RAM_BASE);
+IMPORT_SYM(unsigned long, __COHERENT_RAM_END__, BL_COHERENT_RAM_END);
#endif
/*******************************************************************************
diff --git a/include/common/runtime_svc.h b/include/common/runtime_svc.h
index d12af227e..5d9fa3908 100644
--- a/include/common/runtime_svc.h
+++ b/include/common/runtime_svc.h
@@ -122,8 +122,8 @@ CASSERT(RT_SVC_DESC_HANDLE == __builtin_offsetof(rt_svc_desc_t, handle), \
void runtime_svc_init(void);
uintptr_t handle_runtime_svc(uint32_t smc_fid, void *cookie, void *handle,
unsigned int flags);
-extern uintptr_t __RT_SVC_DESCS_START__;
-extern uintptr_t __RT_SVC_DESCS_END__;
+IMPORT_SYM(uintptr_t, __RT_SVC_DESCS_START__, RT_SVC_DESCS_START);
+IMPORT_SYM(uintptr_t, __RT_SVC_DESCS_END__, RT_SVC_DESCS_END);
void init_crash_reporting(void);
extern uint8_t rt_svc_descs_indices[MAX_RT_SVCS];
diff --git a/include/lib/utils_def.h b/include/lib/utils_def.h
index 4a5c3e0bc..8abc73c09 100644
--- a/include/lib/utils_def.h
+++ b/include/lib/utils_def.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -99,4 +99,21 @@
((ARM_ARCH_MAJOR > _maj) || \
((ARM_ARCH_MAJOR == _maj) && (ARM_ARCH_MINOR >= _min)))
+/*
+ * Import an assembly or linker symbol as a C expression with the specified
+ * type
+ */
+#define IMPORT_SYM(type, sym, name) \
+ extern char sym[];\
+ static const __attribute__((unused)) type name = (type) sym;
+
+/*
+ * When the symbol is used to hold a pointer, its alignment can be asserted
+ * with this macro. For example, if there is a linker symbol that is going to
+ * be used as a 64-bit pointer, the value of the linker symbol must also be
+ * aligned to 64 bit. This macro makes sure this is the case.
+ */
+#define ASSERT_SYM_PTR_ALIGN(sym) assert(((size_t)(sym) % __alignof__(*(sym))) == 0)
+
+
#endif /* __UTILS_DEF_H__ */
diff --git a/include/plat/common/common_def.h b/include/plat/common/common_def.h
index a841c3dbf..84923b9a7 100644
--- a/include/plat/common/common_def.h
+++ b/include/plat/common/common_def.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -74,33 +74,13 @@
* page of it with the right memory attributes.
*/
#if SEPARATE_CODE_AND_RODATA
-#define BL_CODE_BASE (unsigned long)(&__TEXT_START__)
-#define BL_CODE_END (unsigned long)(&__TEXT_END__)
-#define BL_RO_DATA_BASE (unsigned long)(&__RODATA_START__)
-#define BL_RO_DATA_END (unsigned long)(&__RODATA_END__)
#define BL1_CODE_END BL_CODE_END
-#define BL1_RO_DATA_BASE (unsigned long)(&__RODATA_START__)
+#define BL1_RO_DATA_BASE BL_RO_DATA_BASE
#define BL1_RO_DATA_END round_up(BL1_ROM_END, PAGE_SIZE)
#else
-#define BL_CODE_BASE (unsigned long)(&__RO_START__)
-#define BL_CODE_END (unsigned long)(&__RO_END__)
#define BL_RO_DATA_BASE 0
#define BL_RO_DATA_END 0
-
#define BL1_CODE_END round_up(BL1_ROM_END, PAGE_SIZE)
-#define BL1_RO_DATA_BASE 0
-#define BL1_RO_DATA_END 0
#endif /* SEPARATE_CODE_AND_RODATA */
-
-/*
- * The next 2 constants identify the extents of the coherent memory region.
- * These addresses are used by the MMU setup code and therefore they must be
- * page-aligned. It is the responsibility of the linker script to ensure that
- * __COHERENT_RAM_START__ and __COHERENT_RAM_END__ linker symbols refer to
- * page-aligned addresses.
- */
-#define BL_COHERENT_RAM_BASE (unsigned long)(&__COHERENT_RAM_START__)
-#define BL_COHERENT_RAM_END (unsigned long)(&__COHERENT_RAM_END__)
-
#endif /* __COMMON_DEF_H__ */
diff --git a/include/services/secure_partition.h b/include/services/secure_partition.h
index 93df2a137..f68f711be 100644
--- a/include/services/secure_partition.h
+++ b/include/services/secure_partition.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -11,15 +11,11 @@
#include <types.h>
#include <utils_def.h>
-/* Linker symbols */
-extern uintptr_t __SP_IMAGE_XLAT_TABLES_START__;
-extern uintptr_t __SP_IMAGE_XLAT_TABLES_END__;
+/* Import linker symbols */
+IMPORT_SYM(uintptr_t, __SP_IMAGE_XLAT_TABLES_START__, SP_IMAGE_XLAT_TABLES_START);
+IMPORT_SYM(uintptr_t, __SP_IMAGE_XLAT_TABLES_END__, SP_IMAGE_XLAT_TABLES_END);
/* Definitions */
-#define SP_IMAGE_XLAT_TABLES_START \
- (uintptr_t)(&__SP_IMAGE_XLAT_TABLES_START__)
-#define SP_IMAGE_XLAT_TABLES_END \
- (uintptr_t)(&__SP_IMAGE_XLAT_TABLES_END__)
#define SP_IMAGE_XLAT_TABLES_SIZE \
(SP_IMAGE_XLAT_TABLES_END - SP_IMAGE_XLAT_TABLES_START)
diff --git a/lib/locks/bakery/bakery_lock_normal.c b/lib/locks/bakery/bakery_lock_normal.c
index 8f59215e3..37697f521 100644
--- a/lib/locks/bakery/bakery_lock_normal.c
+++ b/lib/locks/bakery/bakery_lock_normal.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -10,6 +10,7 @@
#include <cpu_data.h>
#include <platform.h>
#include <string.h>
+#include <utils_def.h>
/*
* Functions in this file implement Bakery Algorithm for mutual exclusion with the
@@ -49,8 +50,7 @@ CASSERT((PLAT_PERCPU_BAKERY_LOCK_SIZE & (CACHE_WRITEBACK_GRANULE - 1)) == 0, \
* Use the linker defined symbol which has evaluated the size reqiurement.
* This is not as efficient as using a platform defined constant
*/
-extern void *__PERCPU_BAKERY_LOCK_SIZE__;
-#define PERCPU_BAKERY_LOCK_SIZE ((uintptr_t)&__PERCPU_BAKERY_LOCK_SIZE__)
+IMPORT_SYM(uintptr_t, __PERCPU_BAKERY_LOCK_SIZE__, PERCPU_BAKERY_LOCK_SIZE);
#endif
#define get_bakery_info(cpu_ix, lock) \
diff --git a/lib/pmf/pmf_main.c b/lib/pmf/pmf_main.c
index 2cf260ec1..0208948fe 100644
--- a/lib/pmf/pmf_main.c
+++ b/lib/pmf/pmf_main.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -11,6 +11,7 @@
#include <platform.h>
#include <pmf.h>
#include <string.h>
+#include <utils_def.h>
/*******************************************************************************
* The 'pmf_svc_descs' array holds the PMF service descriptors exported by
@@ -21,16 +22,12 @@
* index of the descriptor in the 'pmf_svc_descs' array which contains the
* service function pointers.
******************************************************************************/
-extern uintptr_t __PMF_SVC_DESCS_START__;
-extern uintptr_t __PMF_SVC_DESCS_END__;
-#define PMF_SVC_DESCS_START ((uintptr_t)(&__PMF_SVC_DESCS_START__))
-#define PMF_SVC_DESCS_END ((uintptr_t)(&__PMF_SVC_DESCS_END__))
-extern void *__PERCPU_TIMESTAMP_SIZE__;
-#define PMF_PERCPU_TIMESTAMP_SIZE ((uintptr_t)&__PERCPU_TIMESTAMP_SIZE__)
-extern uintptr_t __PMF_TIMESTAMP_START__;
-#define PMF_TIMESTAMP_ARRAY_START ((uintptr_t)&__PMF_TIMESTAMP_START__)
-extern uintptr_t __PMF_TIMESTAMP_END__;
-#define PMF_TIMESTAMP_ARRAY_END ((uintptr_t)&__PMF_TIMESTAMP_END__)
+
+IMPORT_SYM(uintptr_t, __PMF_SVC_DESCS_START__, PMF_SVC_DESCS_START);
+IMPORT_SYM(uintptr_t, __PMF_SVC_DESCS_END__, PMF_SVC_DESCS_END);
+IMPORT_SYM(uintptr_t, __PERCPU_TIMESTAMP_SIZE__, PMF_PERCPU_TIMESTAMP_SIZE);
+IMPORT_SYM(intptr_t, __PMF_TIMESTAMP_START__, PMF_TIMESTAMP_ARRAY_START);
+IMPORT_SYM(uintptr_t, __PMF_TIMESTAMP_END__, PMF_TIMESTAMP_ARRAY_END);
#define PMF_SVC_DESCS_MAX 10
diff --git a/plat/hisilicon/hikey/hikey_bl1_setup.c b/plat/hisilicon/hikey/hikey_bl1_setup.c
index 69b194a53..9ede1dbc7 100644
--- a/plat/hisilicon/hikey/hikey_bl1_setup.c
+++ b/plat/hisilicon/hikey/hikey_bl1_setup.c
@@ -23,23 +23,6 @@
#include "hikey_def.h"
#include "hikey_private.h"
-/*
- * Declarations of linker defined symbols which will help us find the layout
- * of trusted RAM
- */
-extern unsigned long __COHERENT_RAM_START__;
-extern unsigned long __COHERENT_RAM_END__;
-
-/*
- * The next 2 constants identify the extents of the coherent memory region.
- * These addresses are used by the MMU setup code and therefore they must be
- * page-aligned. It is the responsibility of the linker script to ensure that
- * __COHERENT_RAM_START__ and __COHERENT_RAM_END__ linker symbols refer to
- * page-aligned addresses.
- */
-#define BL1_COHERENT_RAM_BASE (unsigned long)(&__COHERENT_RAM_START__)
-#define BL1_COHERENT_RAM_LIMIT (unsigned long)(&__COHERENT_RAM_END__)
-
/* Data structure which holds the extents of the trusted RAM for BL1 */
static meminfo_t bl1_tzram_layout;
@@ -103,8 +86,8 @@ void bl1_plat_arch_setup(void)
bl1_tzram_layout.total_size,
BL1_RO_BASE,
BL1_RO_LIMIT,
- BL1_COHERENT_RAM_BASE,
- BL1_COHERENT_RAM_LIMIT);
+ BL_COHERENT_RAM_BASE,
+ BL_COHERENT_RAM_END);
}
/*
diff --git a/plat/hisilicon/hikey960/hikey960_bl1_setup.c b/plat/hisilicon/hikey960/hikey960_bl1_setup.c
index 9cadba0bb..6a07f0924 100644
--- a/plat/hisilicon/hikey960/hikey960_bl1_setup.c
+++ b/plat/hisilicon/hikey960/hikey960_bl1_setup.c
@@ -37,18 +37,6 @@ enum {
* Declarations of linker defined symbols which will help us find the layout
* of trusted RAM
*/
-extern unsigned long __COHERENT_RAM_START__;
-extern unsigned long __COHERENT_RAM_END__;
-
-/*
- * The next 2 constants identify the extents of the coherent memory region.
- * These addresses are used by the MMU setup code and therefore they must be
- * page-aligned. It is the responsibility of the linker script to ensure that
- * __COHERENT_RAM_START__ and __COHERENT_RAM_END__ linker symbols refer to
- * page-aligned addresses.
- */
-#define BL1_COHERENT_RAM_BASE (unsigned long)(&__COHERENT_RAM_START__)
-#define BL1_COHERENT_RAM_LIMIT (unsigned long)(&__COHERENT_RAM_END__)
/* Data structure which holds the extents of the trusted RAM for BL1 */
static meminfo_t bl1_tzram_layout;
@@ -131,8 +119,8 @@ void bl1_plat_arch_setup(void)
bl1_tzram_layout.total_size,
BL1_RO_BASE,
BL1_RO_LIMIT,
- BL1_COHERENT_RAM_BASE,
- BL1_COHERENT_RAM_LIMIT);
+ BL_COHERENT_RAM_BASE,
+ BL_COHERENT_RAM_END);
}
static void hikey960_ufs_reset(void)
diff --git a/plat/hisilicon/poplar/bl1_plat_setup.c b/plat/hisilicon/poplar/bl1_plat_setup.c
index 39551135f..25eed5938 100644
--- a/plat/hisilicon/poplar/bl1_plat_setup.c
+++ b/plat/hisilicon/poplar/bl1_plat_setup.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -23,13 +23,6 @@
#include "hi3798cv200.h"
#include "plat_private.h"
-/* Symbols from link script for conherent section */
-extern unsigned long __COHERENT_RAM_START__;
-extern unsigned long __COHERENT_RAM_END__;
-
-#define BL1_COHERENT_RAM_BASE (unsigned long)(&__COHERENT_RAM_START__)
-#define BL1_COHERENT_RAM_LIMIT (unsigned long)(&__COHERENT_RAM_END__)
-
/* Data structure which holds the extents of the trusted RAM for BL1 */
static meminfo_t bl1_tzram_layout;
@@ -92,8 +85,8 @@ void bl1_plat_arch_setup(void)
bl1_tzram_layout.total_size,
BL1_RO_BASE, /* l-loader and BL1 ROM */
BL1_RO_LIMIT,
- BL1_COHERENT_RAM_BASE,
- BL1_COHERENT_RAM_LIMIT);
+ BL_COHERENT_RAM_BASE,
+ BL_COHERENT_RAM_END);
}
void bl1_platform_setup(void)
diff --git a/plat/mediatek/mt6795/bl31_plat_setup.c b/plat/mediatek/mt6795/bl31_plat_setup.c
index 803f1ed85..32f015721 100644
--- a/plat/mediatek/mt6795/bl31_plat_setup.c
+++ b/plat/mediatek/mt6795/bl31_plat_setup.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -21,22 +21,21 @@
#include <plat_private.h>
#include <platform.h>
#include <string.h>
+#include <utils_def.h>
#include <xlat_tables.h>
+
/*******************************************************************************
* Declarations of linker defined symbols which will help us find the layout
* of trusted SRAM
******************************************************************************/
-unsigned long __RO_START__;
-unsigned long __RO_END__;
-
/*
* The next 2 constants identify the extents of the code & RO data region.
* These addresses are used by the MMU setup code and therefore they must be
* page-aligned. It is the responsibility of the linker script to ensure that
* __RO_START__ and __RO_END__ linker symbols refer to page-aligned addresses.
*/
-#define BL31_RO_BASE (unsigned long)(&__RO_START__)
-#define BL31_RO_LIMIT (unsigned long)(&__RO_END__)
+IMPORT_SYM(unsigned long, __RO_START__, BL31_RO_BASE);
+IMPORT_SYM(unsigned long, __RO_END__, BL31_RO_LIMIT);
/*
* Placeholder variables for copying the arguments that have been passed to
diff --git a/plat/mediatek/mt8173/bl31_plat_setup.c b/plat/mediatek/mt8173/bl31_plat_setup.c
index 7b2930771..e51bdbb9e 100644
--- a/plat/mediatek/mt8173/bl31_plat_setup.c
+++ b/plat/mediatek/mt8173/bl31_plat_setup.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -17,24 +17,6 @@
#include <platform.h>
#include <spm.h>
-/*******************************************************************************
- * Declarations of linker defined symbols which will help us find the layout
- * of trusted SRAM
- ******************************************************************************/
-unsigned long __RO_START__;
-unsigned long __RO_END__;
-
-/*
- * The next 3 constants identify the extents of the code, RO data region and the
- * limit of the BL31 image. These addresses are used by the MMU setup code and
- * therefore they must be page-aligned. It is the responsibility of the linker
- * script to ensure that __RO_START__, __RO_END__ & __BL31_END__ linker symbols
- * refer to page-aligned addresses.
- */
-#define BL31_RO_BASE (unsigned long)(&__RO_START__)
-#define BL31_RO_LIMIT (unsigned long)(&__RO_END__)
-#define BL31_END (unsigned long)(&__BL31_END__)
-
static entry_point_info_t bl32_ep_info;
static entry_point_info_t bl33_ep_info;
@@ -156,10 +138,10 @@ void bl31_plat_arch_setup(void)
plat_cci_init();
plat_cci_enable();
- plat_configure_mmu_el3(BL31_RO_BASE,
- BL_COHERENT_RAM_END - BL31_RO_BASE,
- BL31_RO_BASE,
- BL31_RO_LIMIT,
+ plat_configure_mmu_el3(BL_CODE_BASE,
+ BL_COHERENT_RAM_END - BL_CODE_BASE,
+ BL_CODE_BASE,
+ BL_CODE_END,
BL_COHERENT_RAM_BASE,
BL_COHERENT_RAM_END);
}
diff --git a/plat/nvidia/tegra/common/tegra_bl31_setup.c b/plat/nvidia/tegra/common/tegra_bl31_setup.c
index d89ad7b94..2fe4e7dbc 100644
--- a/plat/nvidia/tegra/common/tegra_bl31_setup.c
+++ b/plat/nvidia/tegra/common/tegra_bl31_setup.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -23,6 +23,7 @@
#include <string.h>
#include <tegra_def.h>
#include <tegra_private.h>
+#include <utils_def.h>
/* length of Trusty's input parameters (in bytes) */
#define TRUSTY_PARAMS_LEN_BYTES (4096*2)
@@ -33,29 +34,17 @@ extern void zeromem16(void *mem, unsigned int length);
* Declarations of linker defined symbols which will help us find the layout
* of trusted SRAM
******************************************************************************/
-extern unsigned long __TEXT_START__;
-extern unsigned long __TEXT_END__;
-extern unsigned long __RW_START__;
-extern unsigned long __RW_END__;
-extern unsigned long __RODATA_START__;
-extern unsigned long __RODATA_END__;
-extern unsigned long __BL31_END__;
+
+IMPORT_SYM(unsigned long, __RW_START__, BL31_RW_START);
+IMPORT_SYM(unsigned long, __RW_END__, BL31_RW_END);
+IMPORT_SYM(unsigned long, __RODATA_START__, BL31_RODATA_BASE);
+IMPORT_SYM(unsigned long, __RODATA_END__, BL31_RODATA_END);
+IMPORT_SYM(unsigned long, __TEXT_START__, TEXT_START);
+IMPORT_SYM(unsigned long, __TEXT_END__, TEXT_END);
extern uint64_t tegra_bl31_phys_base;
extern uint64_t tegra_console_base;
-/*
- * The next 3 constants identify the extents of the code, RO data region and the
- * limit of the BL3-1 image. These addresses are used by the MMU setup code and
- * therefore they must be page-aligned. It is the responsibility of the linker
- * script to ensure that __RO_START__, __RO_END__ & __BL31_END__ linker symbols
- * refer to page-aligned addresses.
- */
-#define BL31_RW_START (unsigned long)(&__RW_START__)
-#define BL31_RW_END (unsigned long)(&__RW_END__)
-#define BL31_RODATA_BASE (unsigned long)(&__RODATA_START__)
-#define BL31_RODATA_END (unsigned long)(&__RODATA_END__)
-#define BL31_END (unsigned long)(&__BL31_END__)
static entry_point_info_t bl33_image_ep_info, bl32_image_ep_info;
static plat_params_from_bl2_t plat_bl31_params_from_bl2 = {
@@ -311,8 +300,8 @@ void bl31_plat_arch_setup(void)
unsigned long rw_size = BL31_RW_END - BL31_RW_START;
unsigned long rodata_start = BL31_RODATA_BASE;
unsigned long rodata_size = BL31_RODATA_END - BL31_RODATA_BASE;
- unsigned long code_base = (unsigned long)(&__TEXT_START__);
- unsigned long code_size = (unsigned long)(&__TEXT_END__) - code_base;
+ unsigned long code_base = TEXT_START;
+ unsigned long code_size = TEXT_END - TEXT_START;
const mmap_region_t *plat_mmio_map = NULL;
#if USE_COHERENT_MEM
unsigned long coh_start, coh_size;
diff --git a/plat/rockchip/common/bl31_plat_setup.c b/plat/rockchip/common/bl31_plat_setup.c
index 6199edae2..e5ee68f14 100644
--- a/plat/rockchip/common/bl31_plat_setup.c
+++ b/plat/rockchip/common/bl31_plat_setup.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -17,21 +17,14 @@
#include <platform_def.h>
#include <uart_16550.h>
-/*******************************************************************************
- * Declarations of linker defined symbols which will help us find the layout
- * of trusted SRAM
- ******************************************************************************/
-unsigned long __RO_START__;
-unsigned long __RO_END__;
-
/*
* The next 2 constants identify the extents of the code & RO data region.
* These addresses are used by the MMU setup code and therefore they must be
* page-aligned. It is the responsibility of the linker script to ensure that
* __RO_START__ and __RO_END__ linker symbols refer to page-aligned addresses.
*/
-#define BL31_RO_BASE (unsigned long)(&__RO_START__)
-#define BL31_RO_LIMIT (unsigned long)(&__RO_END__)
+IMPORT_SYM(unsigned long, __RO_START__, BL31_RO_BASE);
+IMPORT_SYM(unsigned long, __RO_END__, BL31_RO_LIMIT);
static entry_point_info_t bl32_ep_info;
static entry_point_info_t bl33_ep_info;
diff --git a/services/std_svc/spm/spm_shim_private.h b/services/std_svc/spm/spm_shim_private.h
index ad953cde7..8408d1e04 100644
--- a/services/std_svc/spm/spm_shim_private.h
+++ b/services/std_svc/spm/spm_shim_private.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -8,21 +8,17 @@
#define __SPM_SHIM_PRIVATE__
#include <types.h>
+#include <utils_def.h>
/* Assembly source */
-extern uintptr_t spm_shim_exceptions_ptr;
+IMPORT_SYM(uintptr_t, spm_shim_exceptions_ptr, SPM_SHIM_EXCEPTIONS_PTR);
/* Linker symbols */
-extern uintptr_t __SPM_SHIM_EXCEPTIONS_START__;
-extern uintptr_t __SPM_SHIM_EXCEPTIONS_END__;
+IMPORT_SYM(uintptr_t, __SPM_SHIM_EXCEPTIONS_START__, SPM_SHIM_EXCEPTIONS_START);
+IMPORT_SYM(uintptr_t, __SPM_SHIM_EXCEPTIONS_END__, SPM_SHIM_EXCEPTIONS_END);
/* Definitions */
-#define SPM_SHIM_EXCEPTIONS_PTR (uintptr_t)(&spm_shim_exceptions_ptr)
-#define SPM_SHIM_EXCEPTIONS_START \
- (uintptr_t)(&__SPM_SHIM_EXCEPTIONS_START__)
-#define SPM_SHIM_EXCEPTIONS_END \
- (uintptr_t)(&__SPM_SHIM_EXCEPTIONS_END__)
#define SPM_SHIM_EXCEPTIONS_SIZE \
(SPM_SHIM_EXCEPTIONS_END - SPM_SHIM_EXCEPTIONS_START)
--
2.25.1

248
recipes-bsp/atf/qoriq-atf_1.5.bb Normal file
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@ -0,0 +1,248 @@
DESCRIPTION = "ARM Trusted Firmware"
LICENSE = "BSD"
LIC_FILES_CHKSUM = "file://license.rst;md5=e927e02bca647e14efd87e9e914b2443"
PV = "1.5+git${SRCPV}"
inherit deploy
DEPENDS += "u-boot-mkimage-native u-boot openssl openssl-native mbedtls rcw cst-native"
DEPENDS:append:lx2160a = " ddr-phy"
do_compile[depends] += "u-boot:do_deploy rcw:do_deploy uefi:do_deploy"
S = "${WORKDIR}/git"
SRC_URI = "git://source.codeaurora.org/external/qoriq/qoriq-components/atf;nobranch=1 \
file://0001-Clean-usage-of-void-pointers-to-access-symbols.patch \
"
SRCREV = "5ae5233c064e94a8bd1b4a1652a03b87b0be63f6"
COMPATIBLE_MACHINE = "(qoriq)"
PACKAGE_ARCH = "${MACHINE_ARCH}"
PLATFORM = "${MACHINE}"
PLATFORM:ls1088ardb-pb = "ls1088ardb"
PLATFORM_ADDITIONAL_TARGET ??= ""
PLATFORM_ADDITIONAL_TARGET:ls1012afrwy = "ls1012afrwy_512mb"
RCW_FOLDER ?= "${MACHINE}"
RCW_FOLDER:ls1088ardb-pb = "ls1088ardb"
# requires CROSS_COMPILE set by hand as there is no configure script
export CROSS_COMPILE="${TARGET_PREFIX}"
export ARCH="arm64"
# Let the Makefile handle setting up the CFLAGS and LDFLAGS as it is
# a standalone application
CFLAGS[unexport] = "1"
LDFLAGS[unexport] = "1"
AS[unexport] = "1"
LD[unexport] = "1"
EXTRA_OEMAKE += "HOSTCC='${BUILD_CC} ${BUILD_CPPFLAGS} ${BUILD_CFLAGS} ${BUILD_LDFLAGS}'"
BOOTTYPE ?= "nor nand qspi flexspi_nor sd emmc"
OTABOOTTYPE ?= "nor qspi flexspi_nor"
BUILD_SECURE = "${@bb.utils.contains('DISTRO_FEATURES', 'secure', 'true', 'false', d)}"
BUILD_OPTEE = "${@bb.utils.contains('COMBINED_FEATURES', 'optee', 'true', 'false', d)}"
BUILD_FUSE = "${@bb.utils.contains('DISTRO_FEATURES', 'fuse', 'true', 'false', d)}"
BUILD_OTA = "${@bb.utils.contains('DISTRO_FEATURES', 'ota', 'true', 'false', d)}"
PACKAGECONFIG ??= " \
${@bb.utils.filter('COMBINED_FEATURES', 'optee', d)} \
"
PACKAGECONFIG[optee] = ",,optee-os-qoriq"
uboot_boot_sec ?= "${DEPLOY_DIR_IMAGE}/u-boot.bin-tfa-secure-boot"
uboot_boot ?= "${DEPLOY_DIR_IMAGE}/u-boot.bin-tfa"
rcw ?= ""
rcw:ls1012a = "_default"
rcwsec ?= "_sben"
chassistype ?= "ls2088_1088"
chassistype:ls1012a = "ls104x_1012"
chassistype:ls1043a = "ls104x_1012"
chassistype:ls1046a = "ls104x_1012"
ddrphyopt ?= ""
ddrphyopt:lx2160a = "fip_ddr_sec"
do_configure[noexec] = "1"
do_compile() {
export LIBPATH="${RECIPE_SYSROOT_NATIVE}"
install -d ${S}/include/tools_share/openssl
cp -r ${RECIPE_SYSROOT}/usr/include/openssl/* ${S}/include/tools_share/openssl
if [ ! -f ${RECIPE_SYSROOT_NATIVE}/usr/bin/cst/srk.pri ]; then
${RECIPE_SYSROOT_NATIVE}/usr/bin/cst/gen_keys 1024
else
cp ${RECIPE_SYSROOT_NATIVE}/usr/bin/cst/srk.pri ${S}
cp ${RECIPE_SYSROOT_NATIVE}/usr/bin/cst/srk.pub ${S}
fi
if [ "${BUILD_FUSE}" = "true" ]; then
${RECIPE_SYSROOT_NATIVE}/usr/bin/cst/gen_fusescr ${RECIPE_SYSROOT_NATIVE}/usr/bin/cst/input_files/gen_fusescr/${chassistype}/input_fuse_file
fuseopt="fip_fuse FUSE_PROG=1 FUSE_PROV_FILE=fuse_scr.bin"
fi
if [ "${BUILD_SECURE}" = "true" ]; then
secureopt="TRUSTED_BOARD_BOOT=1 ${ddrphyopt} CST_DIR=${RECIPE_SYSROOT_NATIVE}/usr/bin/cst"
secext="_sec"
bl33="${uboot_boot_sec}"
if [ ${chassistype} = ls104x_1012 ]; then
rcwtemp="${rcwsec}"
else
rcwtemp="${rcw}"
fi
else
bl33="${uboot_boot}"
rcwtemp="${rcw}"
fi
if [ "${BUILD_OPTEE}" = "true" ]; then
bl32="${RECIPE_SYSROOT}${nonarch_base_libdir}/firmware/tee_${MACHINE}.bin"
bl32opt="BL32=${bl32}"
spdopt="SPD=opteed"
fi
if [ "${BUILD_OTA}" = "true" ]; then
otaopt="POLICY_OTA=1"
btype="${OTABOOTTYPE}"
else
btype="${BOOTTYPE}"
fi
if [ -f ${DEPLOY_DIR_IMAGE}/ddr-phy/ddr4_pmu_train_dmem.bin ]; then
cp ${DEPLOY_DIR_IMAGE}/ddr-phy/*.bin ${S}/
fi
for d in ${btype}; do
case $d in
nor)
rcwimg="${RCWNOR}${rcwtemp}.bin"
uefiboot="${UEFI_NORBOOT}"
;;
nand)
rcwimg="${RCWNAND}${rcwtemp}.bin"
;;
qspi)
rcwimg="${RCWQSPI}${rcwtemp}.bin"
uefiboot="${UEFI_QSPIBOOT}"
if [ "${BUILD_SECURE}" = "true" ] && [ ${MACHINE} = ls1046ardb ]; then
rcwimg="RR_FFSSPPPH_1133_5559/rcw_1600_qspiboot_sben.bin"
fi
;;
auto)
rcwimg="${RCWAUTO}${rcwtemp}.bin"
;;
sd)
rcwimg="${RCWSD}${rcwtemp}.bin"
;;
emmc)
rcwimg="${RCWEMMC}${rcwtemp}.bin"
;;
flexspi_nor)
rcwimg="${RCWXSPI}${rcwtemp}.bin"
uefiboot="${UEFI_XSPIBOOT}"
;;
esac
if [ -f "${DEPLOY_DIR_IMAGE}/rcw/${RCW_FOLDER}/${rcwimg}" ]; then
oe_runmake V=1 -C ${S} realclean
oe_runmake V=1 -C ${S} all fip pbl PLAT=${PLATFORM} BOOT_MODE=${d} RCW=${DEPLOY_DIR_IMAGE}/rcw/${RCW_FOLDER}/${rcwimg} BL33=${bl33} ${bl32opt} ${spdopt} ${secureopt} ${fuseopt} ${otaopt}
cp -r ${S}/build/${PLATFORM}/release/bl2_${d}*.pbl ${S}
cp -r ${S}/build/${PLATFORM}/release/fip.bin ${S}
if [ "${BUILD_FUSE}" = "true" ]; then
cp -f ${S}/build/${PLATFORM}/release/fuse_fip.bin ${S}
fi
if [ -n "${PLATFORM_ADDITIONAL_TARGET}" ]; then
oe_runmake V=1 -C ${S} realclean
oe_runmake V=1 -C ${S} all fip pbl PLAT=${PLATFORM_ADDITIONAL_TARGET} BOOT_MODE=${d} RCW=${DEPLOY_DIR_IMAGE}/rcw/${RCW_FOLDER}/${rcwimg} BL33=${bl33} ${bl32opt} ${spdopt} ${secureopt} ${fuseopt} ${otaopt}
cp -r ${S}/build/${PLATFORM_ADDITIONAL_TARGET}/release/bl2_qspi${secext}.pbl ${S}/bl2_${d}${secext}_${PLATFORM_ADDITIONAL_TARGET}.pbl
cp -r ${S}/build/${PLATFORM_ADDITIONAL_TARGET}/release/fip.bin ${S}/fip_${PLATFORM_ADDITIONAL_TARGET}.bin
if [ "${BUILD_FUSE}" = "true" ]; then
cp -r ${S}/build/${PLATFORM_ADDITIONAL_TARGET}/release/fuse_fip.bin ${S}/fuse_fip_${PLATFORM_ADDITIONAL_TARGET}.bin
fi
fi
if [ -n "${uefiboot}" -a -f "${DEPLOY_DIR_IMAGE}/uefi/${PLATFORM}/${uefiboot}" ]; then
oe_runmake V=1 -C ${S} realclean
oe_runmake V=1 -C ${S} all fip pbl PLAT=${PLATFORM} BOOT_MODE=${d} RCW=${DEPLOY_DIR_IMAGE}/rcw/${RCW_FOLDER}/${rcwimg} BL33=${DEPLOY_DIR_IMAGE}/uefi/${PLATFORM}/${uefiboot} ${bl32opt} ${spdopt} ${secureopt} ${fuseopt} ${otaopt}
cp -r ${S}/build/${PLATFORM}/release/fip.bin ${S}/fip_uefi.bin
fi
fi
rcwimg=""
uefiboot=""
done
}
do_install() {
install -d ${D}/boot/atf
cp -r ${S}/srk.pri ${D}/boot/atf
cp -r ${S}/srk.pub ${D}/boot/atf
if [ "${BUILD_SECURE}" = "true" ]; then
secext="_sec"
fi
if [ -f "${S}/fip_uefi.bin" ]; then
cp -r ${S}/fip_uefi.bin ${D}/boot/atf/fip_uefi.bin
fi
if [ -f "${S}/fuse_fip.bin" ]; then
cp -r ${S}/fuse_fip.bin ${D}/boot/atf/fuse_fip.bin
fi
if [ -f "${S}/fip.bin" ]; then
cp -r ${S}/fip.bin ${D}/boot/atf/fip.bin
fi
for d in ${BOOTTYPE}; do
if [ -e ${S}/bl2_${d}${secext}.pbl ]; then
cp -r ${S}/bl2_${d}${secext}.pbl ${D}/boot/atf/bl2_${d}${secext}.pbl
fi
done
if [ -n "${PLATFORM_ADDITIONAL_TARGET}" ]; then
cp -r ${S}/fip_${PLATFORM_ADDITIONAL_TARGET}.bin ${D}/boot/atf/fip_${PLATFORM_ADDITIONAL_TARGET}.bin
cp -r ${S}/bl2_qspi${secext}_${PLATFORM_ADDITIONAL_TARGET}.pbl ${D}/boot/atf/bl2_qspi${secext}_${PLATFORM_ADDITIONAL_TARGET}.pbl
if [ -f "${S}/fuse_fip_${PLATFORM_ADDITIONAL_TARGET}.bin" ]; then
cp -r ${S}/fuse_fip_${PLATFORM_ADDITIONAL_TARGET}.bin ${D}/boot/atf/fuse_fip_${PLATFORM_ADDITIONAL_TARGET}.bin
fi
fi
chown -R root:root ${D}
if [ -f "${S}/fip_ddr_sec.bin" ]; then
cp -r ${S}/fip_ddr_sec.bin ${D}/boot/atf/fip_ddr_sec.bin
fi
}
do_deploy() {
install -d ${DEPLOYDIR}/atf
cp -r ${D}/boot/atf/srk.pri ${DEPLOYDIR}/atf
cp -r ${D}/boot/atf/srk.pub ${DEPLOYDIR}/atf
if [ "${BUILD_SECURE}" = "true" ]; then
secext="_sec"
fi
if [ -f "${S}/fuse_fip.bin" ]; then
cp -r ${D}/boot/atf/fuse_fip.bin ${DEPLOYDIR}/atf/fuse_fip${secext}.bin
fi
if [ -e ${D}/boot/atf/fip_uefi.bin ]; then
cp -r ${D}/boot/atf/fip_uefi.bin ${DEPLOYDIR}/atf/fip_uefi.bin
fi
cp -r ${D}/boot/atf/fip.bin ${DEPLOYDIR}/atf/fip_uboot${secext}.bin
for d in ${BOOTTYPE}; do
if [ -e ${D}/boot/atf/bl2_${d}${secext}.pbl ]; then
cp -r ${D}/boot/atf/bl2_${d}${secext}.pbl ${DEPLOYDIR}/atf/bl2_${d}${secext}.pbl
fi
done
if [ -n "${PLATFORM_ADDITIONAL_TARGET}" ]; then
cp -r ${S}/bl2_qspi${secext}_${PLATFORM_ADDITIONAL_TARGET}.pbl ${DEPLOYDIR}/atf/
cp -r ${S}/fip_${PLATFORM_ADDITIONAL_TARGET}.bin ${DEPLOYDIR}/atf/fip_uboot${secext}_${PLATFORM_ADDITIONAL_TARGET}.bin
if [ -f "${S}/fuse_fip_${PLATFORM_ADDITIONAL_TARGET}.bin" ]; then
cp -r ${S}/fuse_fip_${PLATFORM_ADDITIONAL_TARGET}.bin ${D}/boot/atf/fuse_fip_${PLATFORM_ADDITIONAL_TARGET}${secext}.bin
fi
fi
if [ -f "${S}/fip_ddr_sec.bin" ]; then
cp -r ${D}/boot/atf/fip_ddr_sec.bin ${DEPLOYDIR}/atf/fip_ddr_sec.bin
fi
}
addtask deploy after do_install
FILES:${PN} += "/boot"
BBCLASSEXTEND = "native nativesdk"

14
recipes-kernel/linux/linux-qoriq_5.4.bb Normal file
View File

@ -0,0 +1,14 @@
LIC_FILES_CHKSUM = "file://COPYING;md5=bbea815ee2795b2f4230826c0c6b8814"
LINUX_VERSION = "5.4.47"
SRC_URI = "git://source.codeaurora.org/external/qoriq/qoriq-components/linux;nobranch=1 \
file://0001-Makfefile-linux-5.4-add-warning-cflags-on-LSDK-20.04.patch \
file://0001-perf-tests-bp_account-Make-global-variable-static.patch \
file://0001-perf-cs-etm-Move-definition-of-traceid_list-global-v.patch \
file://0001-perf-bench-Share-some-global-variables-to-fix-build-.patch \
file://0001-libtraceevent-Fix-build-with-binutils-2.35.patch \
"
SRCREV = "6bff40d413b394c2d742e7a42089bfc62aef0a9b"
require recipes-kernel/linux/linux-qoriq.inc