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https://github.com/Freescale/meta-freescale-3rdparty.git
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linux-congatec: Upgrade to 3.14.28 branch
Provides the recipe and files to use the 3.14.28 Linux kernel Signed-off-by: Alex de Cabo <alejandro.de-cabo-garcia@congatec.com> Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
This commit is contained in:
Alex de Cabo
Otavio Salvador
parent
7495dc402c
commit
91221c4a0b
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@ -1,35 +0,0 @@
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From 0e981452d7130513e796c1c3d7348905c0d00dce Mon Sep 17 00:00:00 2001
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From: Gary Bisson <bisson.gary@gmail.com>
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Date: Tue, 2 Dec 2014 22:11:14 -0800
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Subject: [PATCH] ARM: clk-imx6q: fix video divider for revision 1.0 of i.MX6q
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As post dividers do not work on i.MX6Q revision 1.0 they must be fixed
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to 1. As the table index was wrong, a divider a of 4 could still be
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requested which implied the clock not to be set properly. This is the
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root cause of the HDMI not working at high resolution on T1.0 version of
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the SoC, giving the following error:
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mxc_sdc_fb fb.27: timeout when waiting for flip irq
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Upstream-Status: Pending
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Signed-off-by: Gary Bisson <bisson.gary@gmail.com>
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---
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arch/arm/mach-imx/clk-imx6q.c | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
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index 25734ed..34e1616f 100644
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--- a/arch/arm/mach-imx/clk-imx6q.c
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+++ b/arch/arm/mach-imx/clk-imx6q.c
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@@ -312,7 +312,7 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
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post_div_table[1].div = 1;
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post_div_table[2].div = 1;
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video_div_table[1].div = 1;
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- video_div_table[2].div = 1;
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+ video_div_table[3].div = 1;
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};
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/* type name parent_name base div_mask */
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--
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2.1.3
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@ -0,0 +1,35 @@
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From 5332a5467624b01d0c166309cd1dceac5f7b9d96 Mon Sep 17 00:00:00 2001
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From: Dmitry Voytik <voytikd@gmail.com>
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Date: Thu, 6 Nov 2014 22:46:20 +0400
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Subject: [PATCH 1/3] ARM: imx6q: drop unnecessary semicolon
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commit d2a10a1727b3948019128e83162f22c65859f1fd upstream.
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Drop unnecessary semicolon after closing curly bracket.
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Signed-off-by: Dmitry Voytik <voytikd@gmail.com>
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Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Upstream-Status: Backport [3.14.29]
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---
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arch/arm/mach-imx/clk-imx6q.c | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
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index f0d8000..a5107ab 100644
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--- a/arch/arm/mach-imx/clk-imx6q.c
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+++ b/arch/arm/mach-imx/clk-imx6q.c
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@@ -149,7 +149,7 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
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post_div_table[2].div = 1;
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video_div_table[1].div = 1;
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video_div_table[2].div = 1;
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- };
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+ }
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clk[IMX6QDL_PLL1_BYPASS_SRC] = imx_clk_mux("pll1_bypass_src", base + 0x00, 14, 2, pll_bypass_src_sels, ARRAY_SIZE(pll_bypass_src_sels));
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clk[IMX6QDL_PLL2_BYPASS_SRC] = imx_clk_mux("pll2_bypass_src", base + 0x30, 14, 2, pll_bypass_src_sels, ARRAY_SIZE(pll_bypass_src_sels));
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--
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2.1.4
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@ -0,0 +1,40 @@
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From 5b9eb0cdaefd7ac8e31c1e1812582e0169ba9722 Mon Sep 17 00:00:00 2001
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From: Gary Bisson <bisson.gary@gmail.com>
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Date: Wed, 3 Dec 2014 15:03:51 -0800
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Subject: [PATCH 2/3] ARM: clk-imx6q: fix video divider for rev T0 1.0
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commit 81ef447950bf0955aca46f4a7617d8ce435cf0ce upstream.
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The post dividers do not work on i.MX6Q rev T0 1.0 so they must be fixed
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to 1. As the table index was wrong, a divider a of 4 could still be
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requested which implied the clock not to be set properly. This is the
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root cause of the HDMI not working at high resolution on rev T0 1.0 of
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the SoC.
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Signed-off-by: Gary Bisson <bisson.gary@gmail.com>
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Cc: <stable@vger.kernel.org>
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Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Upstream-Status: Backport [3.14.29]
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---
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arch/arm/mach-imx/clk-imx6q.c | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
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index a5107ab..cf060a9 100644
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--- a/arch/arm/mach-imx/clk-imx6q.c
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+++ b/arch/arm/mach-imx/clk-imx6q.c
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@@ -148,7 +148,7 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
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post_div_table[1].div = 1;
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post_div_table[2].div = 1;
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video_div_table[1].div = 1;
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- video_div_table[2].div = 1;
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+ video_div_table[3].div = 1;
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}
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clk[IMX6QDL_PLL1_BYPASS_SRC] = imx_clk_mux("pll1_bypass_src", base + 0x00, 14, 2, pll_bypass_src_sels, ARRAY_SIZE(pll_bypass_src_sels));
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--
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2.1.4
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@ -0,0 +1,56 @@
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From 8340ad4ab71b568e65dfd1b92cc0967152887f97 Mon Sep 17 00:00:00 2001
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From: Nikolay Dimitrov <picmaster@mail.bg>
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Date: Sun, 8 Feb 2015 22:18:09 +0200
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Subject: [PATCH 3/3] ARM: imx6sl: Disable imx6sl-specific code when imx6sl SOC
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support is disabled
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Currently the build fails when CONFIG_SOC_IMX6SL is disabled, due to some
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hard-coded stuff. The patch purpose is to handle enabling/disabling this
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config option.
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Signed-off-by: Nikolay Dimitrov <picmaster@mail.bg>
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Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
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Upstream-Status: Pending
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---
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arch/arm/mach-imx/Makefile | 3 ++-
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arch/arm/mach-imx/mxc.h | 4 ++++
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2 files changed, 6 insertions(+), 1 deletion(-)
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diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
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index b76a214..27f1976 100644
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--- a/arch/arm/mach-imx/Makefile
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+++ b/arch/arm/mach-imx/Makefile
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@@ -122,7 +122,8 @@ obj-$(CONFIG_SOC_IMX6SL) += busfreq_lpddr2.o lpddr2_freq_imx6.o imx6sl_lpm_wfi.o
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AFLAGS_lpddr2_freq_imx6sx.o :=-Wa,-march=armv7-a
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AFLAGS_ddr3_freq_imx6sx.o :=-Wa,-march=armv7-a
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AFLAGS_imx6sx_low_power_idle.o :=-Wa,-march=armv7-a
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-obj-$(CONFIG_SOC_IMX6SX) += ddr3_freq_imx6sx.o lpddr2_freq_imx6sx.o imx6sx_low_power_idle.o
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+obj-$(CONFIG_SOC_IMX6SX) += ddr3_freq_imx6sx.o lpddr2_freq_imx6sx.o imx6sx_low_power_idle.o \
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+ busfreq_lpddr2.o lpddr2_freq_imx6.o
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endif
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diff --git a/arch/arm/mach-imx/mxc.h b/arch/arm/mach-imx/mxc.h
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index 1510769..e6af4dd 100644
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--- a/arch/arm/mach-imx/mxc.h
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+++ b/arch/arm/mach-imx/mxc.h
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@@ -158,10 +158,14 @@ extern unsigned int __mxc_cpu_type;
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#endif
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#ifndef __ASSEMBLY__
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+#ifdef CONFIG_SOC_IMX6SL
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static inline bool cpu_is_imx6sl(void)
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{
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return __mxc_cpu_type == MXC_CPU_IMX6SL;
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}
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+#else
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+# define cpu_is_imx6sl() (0)
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+#endif
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static inline bool cpu_is_imx6dl(void)
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{
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--
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2.1.4
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@ -2,13 +2,12 @@ CONFIG_KERNEL_LZO=y
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CONFIG_SYSVIPC=y
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CONFIG_NO_HZ=y
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CONFIG_HIGH_RES_TIMERS=y
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CONFIG_IKCONFIG=y
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CONFIG_IKCONFIG_PROC=y
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CONFIG_LOG_BUF_SHIFT=18
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CONFIG_CGROUPS=y
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CONFIG_RELAY=y
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CONFIG_BLK_DEV_INITRD=y
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CONFIG_EXPERT=y
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CONFIG_KALLSYMS_ALL=y
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CONFIG_PERF_EVENTS=y
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# CONFIG_SLUB_DEBUG is not set
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# CONFIG_COMPAT_BRK is not set
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@ -19,9 +18,9 @@ CONFIG_MODULE_SRCVERSION_ALL=y
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# CONFIG_BLK_DEV_BSG is not set
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CONFIG_GPIO_PCA953X=y
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CONFIG_ARCH_MXC=y
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CONFIG_MXC_DEBUG_BOARD=y
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CONFIG_MACH_IMX51_DT=y
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CONFIG_MACH_EUKREA_CPUIMX51SD=y
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CONFIG_SOC_IMX50=y
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CONFIG_SOC_IMX53=y
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CONFIG_SOC_IMX6Q=y
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CONFIG_SOC_IMX6SL=y
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@ -32,16 +31,17 @@ CONFIG_SMP=y
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CONFIG_VMSPLIT_2G=y
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CONFIG_PREEMPT=y
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CONFIG_AEABI=y
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# CONFIG_OABI_COMPAT is not set
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CONFIG_HIGHMEM=y
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CONFIG_CMA=y
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CONFIG_CMDLINE="noinitrd console=ttymxc0,115200"
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CONFIG_CPU_FREQ=y
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CONFIG_CPU_FREQ_DEFAULT_GOV_INTERACTIVE=y
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CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
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CONFIG_CPU_FREQ_GOV_POWERSAVE=y
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CONFIG_CPU_FREQ_GOV_USERSPACE=y
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CONFIG_CPU_FREQ_GOV_ONDEMAND=y
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CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
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CONFIG_ARM_IMX6_CPUFREQ=y
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CONFIG_ARM_IMX6Q_CPUFREQ=y
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CONFIG_CPU_IDLE=y
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CONFIG_VFP=y
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CONFIG_NEON=y
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@ -66,13 +66,27 @@ CONFIG_LLC2=y
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CONFIG_CAN=y
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CONFIG_CAN_FLEXCAN=y
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CONFIG_CAN_M_CAN=y
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CONFIG_BT=y
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CONFIG_BT_RFCOMM=y
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CONFIG_BT_RFCOMM_TTY=y
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CONFIG_BT_BNEP=y
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CONFIG_BT_BNEP_MC_FILTER=y
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CONFIG_BT_BNEP_PROTO_FILTER=y
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CONFIG_BT_HIDP=y
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CONFIG_BT_HCIBTUSB=y
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CONFIG_BT_HCIBTSDIO=y
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CONFIG_BT_HCIUART=y
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CONFIG_BT_HCIUART_H4=y
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CONFIG_BT_HCIUART_BCSP=y
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CONFIG_BT_HCIUART_ATH3K=y
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CONFIG_BT_HCIBCM203X=y
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CONFIG_BT_ATH3K=y
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CONFIG_CFG80211=y
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CONFIG_CFG80211_WEXT=y
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CONFIG_MAC80211=y
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CONFIG_DEVTMPFS=y
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CONFIG_DEVTMPFS_MOUNT=y
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# CONFIG_STANDALONE is not set
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CONFIG_CMA=y
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CONFIG_DMA_CMA=y
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CONFIG_CMA_SIZE_MBYTES=320
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CONFIG_IMX_WEIM=y
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CONFIG_CONNECTOR=y
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@ -91,7 +105,7 @@ CONFIG_MTD_SST25L=y
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CONFIG_MTD_NAND=y
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CONFIG_MTD_NAND_GPMI_NAND=y
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CONFIG_MTD_NAND_MXC=y
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CONFIG_MTD_SPI_NOR_BASE=y
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CONFIG_MTD_SPI_NOR=y
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CONFIG_SPI_FSL_QUADSPI=y
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CONFIG_MTD_UBI=y
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CONFIG_BLK_DEV_LOOP=y
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|
|
@ -125,9 +139,15 @@ CONFIG_SMC91X=y
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|||
CONFIG_SMC911X=y
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CONFIG_SMSC911X=y
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# CONFIG_NET_VENDOR_STMICRO is not set
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CONFIG_USB_PEGASUS=m
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CONFIG_USB_RTL8150=m
|
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CONFIG_USB_RTL8152=m
|
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CONFIG_USB_USBNET=m
|
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CONFIG_USB_NET_CDC_EEM=m
|
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CONFIG_ATH_CARDS=y
|
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CONFIG_ATH6KL=m
|
||||
CONFIG_ATH6KL_SDIO=m
|
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CONFIG_BRCMFMAC=m
|
||||
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
|
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CONFIG_INPUT_EVDEV=y
|
||||
CONFIG_INPUT_EVBUG=m
|
||||
|
|
@ -141,12 +161,13 @@ CONFIG_TOUCHSCREEN_EGALAX=y
|
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CONFIG_TOUCHSCREEN_ELAN=y
|
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CONFIG_TOUCHSCREEN_MAX11801=y
|
||||
CONFIG_TOUCHSCREEN_MC13783=y
|
||||
CONFIG_TOUCHSCREEN_TSC2007=y
|
||||
CONFIG_TOUCHSCREEN_STMPE=y
|
||||
CONFIG_INPUT_MISC=y
|
||||
CONFIG_INPUT_MMA8450=y
|
||||
CONFIG_INPUT_PWM_BEEPER=y
|
||||
CONFIG_INPUT_ISL29023=y
|
||||
CONFIG_SERIO_SERPORT=m
|
||||
CONFIG_VT_HW_CONSOLE_BINDING=y
|
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# CONFIG_LEGACY_PTYS is not set
|
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# CONFIG_DEVKMEM is not set
|
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CONFIG_SERIAL_IMX=y
|
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|
|
@ -154,7 +175,6 @@ CONFIG_SERIAL_IMX_CONSOLE=y
|
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CONFIG_SERIAL_FSL_LPUART=y
|
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CONFIG_SERIAL_FSL_LPUART_CONSOLE=y
|
||||
CONFIG_FSL_OTP=y
|
||||
CONFIG_MXS_VIIM=y
|
||||
# CONFIG_I2C_COMPAT is not set
|
||||
CONFIG_I2C_CHARDEV=y
|
||||
CONFIG_I2C_MUX=y
|
||||
|
|
@ -168,7 +188,6 @@ CONFIG_SPI_IMX=y
|
|||
CONFIG_GPIO_SYSFS=y
|
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CONFIG_POWER_SUPPLY=y
|
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CONFIG_SABRESD_MAX8903=y
|
||||
CONFIG_IMX6_USB_CHARGER=y
|
||||
CONFIG_SENSORS_MAX17135=y
|
||||
CONFIG_SENSORS_MAG3110=y
|
||||
CONFIG_THERMAL=y
|
||||
|
|
@ -182,34 +201,39 @@ CONFIG_MFD_MC13XXX_SPI=y
|
|||
CONFIG_MFD_MC13XXX_I2C=y
|
||||
CONFIG_MFD_MAX17135=y
|
||||
CONFIG_MFD_SI476X_CORE=y
|
||||
CONFIG_MFD_STMPE=y
|
||||
CONFIG_REGULATOR=y
|
||||
CONFIG_REGULATOR_FIXED_VOLTAGE=y
|
||||
CONFIG_REGULATOR_DA9052=y
|
||||
CONFIG_REGULATOR_ANATOP=y
|
||||
CONFIG_REGULATOR_DA9052=y
|
||||
CONFIG_REGULATOR_MAX17135=y
|
||||
CONFIG_REGULATOR_MC13783=y
|
||||
CONFIG_REGULATOR_MC13892=y
|
||||
CONFIG_REGULATOR_MAX17135=y
|
||||
CONFIG_REGULATOR_PFUZE100=y
|
||||
CONFIG_MEDIA_SUPPORT=y
|
||||
CONFIG_MEDIA_CAMERA_SUPPORT=y
|
||||
CONFIG_MEDIA_RADIO_SUPPORT=y
|
||||
CONFIG_VIDEO_V4L2_INT_DEVICE=y
|
||||
CONFIG_MEDIA_RC_SUPPORT=y
|
||||
CONFIG_RC_DEVICES=y
|
||||
CONFIG_IR_GPIO_CIR=y
|
||||
CONFIG_MEDIA_USB_SUPPORT=y
|
||||
CONFIG_USB_VIDEO_CLASS=m
|
||||
CONFIG_V4L_PLATFORM_DRIVERS=y
|
||||
CONFIG_VIDEO_MXC_OUTPUT=y
|
||||
CONFIG_VIDEO_MXC_CAPTURE=m
|
||||
CONFIG_VIDEO_MXC_CSI_CAMERA=m
|
||||
CONFIG_MXC_CAMERA_OV5640=m
|
||||
CONFIG_MXC_CAMERA_OV5642=m
|
||||
CONFIG_MXC_CAMERA_OV5640_MIPI=m
|
||||
CONFIG_MXC_TVIN_ADV7180=m
|
||||
CONFIG_MXC_VADC=m
|
||||
CONFIG_MXC_IPU_DEVICE_QUEUE_SDC=m
|
||||
CONFIG_VIDEO_MXC_IPU_OUTPUT=y
|
||||
CONFIG_VIDEO_MXC_PXP_V4L2=y
|
||||
CONFIG_VIDEO_MXC_CSI_CAMERA=m
|
||||
CONFIG_MXC_VADC=m
|
||||
CONFIG_SOC_CAMERA=y
|
||||
CONFIG_VIDEO_MX3=y
|
||||
CONFIG_V4L_MEM2MEM_DRIVERS=y
|
||||
CONFIG_VIDEO_CODA=y
|
||||
CONFIG_RADIO_SI476X=y
|
||||
CONFIG_SOC_CAMERA_OV2640=y
|
||||
CONFIG_DRM=y
|
||||
|
|
@ -233,9 +257,6 @@ CONFIG_FB_MXC_DCIC=m
|
|||
CONFIG_HANNSTAR_CABC=y
|
||||
CONFIG_FRAMEBUFFER_CONSOLE=y
|
||||
CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
|
||||
CONFIG_FONTS=y
|
||||
CONFIG_FONT_8x8=y
|
||||
CONFIG_FONT_8x16=y
|
||||
CONFIG_LOGO=y
|
||||
CONFIG_SOUND=y
|
||||
CONFIG_SND=y
|
||||
|
|
@ -246,23 +267,43 @@ CONFIG_SND_SOC_EUKREA_TLV320=y
|
|||
CONFIG_SND_SOC_IMX_CS42888=y
|
||||
CONFIG_SND_SOC_IMX_WM8962=y
|
||||
CONFIG_SND_SOC_IMX_SGTL5000=y
|
||||
CONFIG_SND_SOC_IMX_MQS=y
|
||||
CONFIG_SND_SOC_IMX_SPDIF=y
|
||||
CONFIG_SND_SOC_IMX_MC13783=y
|
||||
CONFIG_SND_SOC_IMX_HDMI=y
|
||||
CONFIG_SND_SOC_IMX_SI476X=y
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_EHCI_HCD=y
|
||||
CONFIG_USB_EHCI_MXC=y
|
||||
CONFIG_USB_ACM=m
|
||||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_USB_CHIPIDEA=y
|
||||
CONFIG_USB_CHIPIDEA_UDC=y
|
||||
CONFIG_USB_CHIPIDEA_HOST=y
|
||||
CONFIG_USB_PHY=y
|
||||
CONFIG_USB_SERIAL=m
|
||||
CONFIG_USB_SERIAL_GENERIC=y
|
||||
CONFIG_USB_SERIAL_FTDI_SIO=m
|
||||
CONFIG_USB_SERIAL_OPTION=m
|
||||
CONFIG_USB_EHSET_TEST_FIXTURE=m
|
||||
CONFIG_NOP_USB_XCEIV=y
|
||||
CONFIG_USB_MXS_PHY=y
|
||||
CONFIG_USB_GADGET=y
|
||||
CONFIG_USB_CONFIGFS=m
|
||||
CONFIG_USB_CONFIGFS_SERIAL=y
|
||||
CONFIG_USB_CONFIGFS_ACM=y
|
||||
CONFIG_USB_CONFIGFS_OBEX=y
|
||||
CONFIG_USB_CONFIGFS_NCM=y
|
||||
CONFIG_USB_CONFIGFS_ECM=y
|
||||
CONFIG_USB_CONFIGFS_ECM_SUBSET=y
|
||||
CONFIG_USB_CONFIGFS_RNDIS=y
|
||||
CONFIG_USB_CONFIGFS_EEM=y
|
||||
CONFIG_USB_CONFIGFS_MASS_STORAGE=y
|
||||
CONFIG_USB_CONFIGFS_F_LB_SS=y
|
||||
CONFIG_USB_CONFIGFS_F_FS=y
|
||||
CONFIG_USB_ZERO=m
|
||||
CONFIG_USB_ETH=m
|
||||
CONFIG_USB_G_NCM=m
|
||||
CONFIG_USB_GADGETFS=m
|
||||
CONFIG_USB_MASS_STORAGE=m
|
||||
CONFIG_USB_G_SERIAL=m
|
||||
CONFIG_MMC=y
|
||||
|
|
@ -272,13 +313,16 @@ CONFIG_MMC_SDHCI_PLTFM=y
|
|||
CONFIG_MMC_SDHCI_ESDHC_IMX=y
|
||||
CONFIG_MXC_IPU=y
|
||||
CONFIG_MXC_GPU_VIV=y
|
||||
CONFIG_MXC_ASRC=y
|
||||
CONFIG_MXC_MIPI_CSI2=y
|
||||
CONFIG_MXC_MLB150=m
|
||||
CONFIG_NEW_LEDS=y
|
||||
CONFIG_LEDS_CLASS=y
|
||||
CONFIG_LEDS_GPIO=y
|
||||
CONFIG_LEDS_TRIGGERS=y
|
||||
CONFIG_LEDS_TRIGGER_TIMER=y
|
||||
CONFIG_LEDS_TRIGGER_ONESHOT=y
|
||||
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
|
||||
CONFIG_LEDS_TRIGGER_BACKLIGHT=y
|
||||
CONFIG_LEDS_TRIGGER_GPIO=y
|
||||
CONFIG_RTC_CLASS=y
|
||||
CONFIG_RTC_INTF_DEV_UIE_EMUL=y
|
||||
|
|
@ -291,7 +335,7 @@ CONFIG_MXC_PXP_V2=y
|
|||
CONFIG_IMX_SDMA=y
|
||||
CONFIG_MXS_DMA=y
|
||||
CONFIG_STAGING=y
|
||||
CONFIG_COMMON_CLK_DEBUG=y
|
||||
CONFIG_STAGING_MEDIA=y
|
||||
# CONFIG_IOMMU_SUPPORT is not set
|
||||
CONFIG_IIO=y
|
||||
CONFIG_VF610_ADC=y
|
||||
|
|
@ -331,6 +375,7 @@ CONFIG_NLS_ASCII=y
|
|||
CONFIG_NLS_ISO8859_1=y
|
||||
CONFIG_NLS_ISO8859_15=m
|
||||
CONFIG_NLS_UTF8=y
|
||||
CONFIG_DEBUG_FS=y
|
||||
CONFIG_MAGIC_SYSRQ=y
|
||||
# CONFIG_SCHED_DEBUG is not set
|
||||
# CONFIG_DEBUG_BUGVERBOSE is not set
|
||||
|
|
@ -338,11 +383,9 @@ CONFIG_MAGIC_SYSRQ=y
|
|||
CONFIG_SECURITYFS=y
|
||||
CONFIG_CRYPTO_USER=y
|
||||
CONFIG_CRYPTO_TEST=m
|
||||
CONFIG_CRYPTO_CCM=y
|
||||
CONFIG_CRYPTO_GCM=y
|
||||
CONFIG_CRYPTO_CBC=y
|
||||
CONFIG_CRYPTO_CTS=y
|
||||
CONFIG_CRYPTO_ECB=y
|
||||
CONFIG_CRYPTO_LRW=y
|
||||
CONFIG_CRYPTO_XTS=y
|
||||
CONFIG_CRYPTO_MD4=y
|
||||
|
|
@ -353,7 +396,6 @@ CONFIG_CRYPTO_RMD160=y
|
|||
CONFIG_CRYPTO_RMD256=y
|
||||
CONFIG_CRYPTO_RMD320=y
|
||||
CONFIG_CRYPTO_SHA1=y
|
||||
CONFIG_CRYPTO_SHA256=y
|
||||
CONFIG_CRYPTO_SHA512=y
|
||||
CONFIG_CRYPTO_TGR192=y
|
||||
CONFIG_CRYPTO_WP512=y
|
||||
|
|
@ -370,3 +412,6 @@ CONFIG_CRC_CCITT=m
|
|||
CONFIG_CRC_T10DIF=y
|
||||
CONFIG_CRC7=m
|
||||
CONFIG_LIBCRC32C=m
|
||||
CONFIG_FONTS=y
|
||||
CONFIG_FONT_8x8=y
|
||||
CONFIG_FONT_8x16=y
|
||||
|
|
@ -1,21 +0,0 @@
|
|||
# Congatec QMX6 Linux/kernel
|
||||
|
||||
LICENSE = "GPLv2"
|
||||
|
||||
require recipes-kernel/linux/linux-imx.inc
|
||||
require recipes-kernel/linux/linux-dtb.inc
|
||||
|
||||
DEPENDS += "lzop-native bc-native"
|
||||
|
||||
SRCBRANCH = "cgt_imx_3.10.53_1.1.1"
|
||||
|
||||
SRC_URI = "git://git.congatec.com/arm/qmx6_kernel.git;protocol=http;branch=${SRCBRANCH} \
|
||||
file://defconfig \
|
||||
file://0001-ARM-clk-imx6q-fix-video-divider-for-revision-1.0-of-.patch \
|
||||
"
|
||||
|
||||
SRCREV = "9f56bf91efd1e1b286a09264a34da1b6abb58959"
|
||||
LOCALVERSION = "-1.1.1_qmx6"
|
||||
|
||||
|
||||
COMPATIBLE_MACHINE = "(cgtqmx6)"
|
||||
23
recipes-kernel/linux/linux-congatec_3.14.28.bb
Normal file
23
recipes-kernel/linux/linux-congatec_3.14.28.bb
Normal file
|
|
@ -0,0 +1,23 @@
|
|||
# Congatec QMX6 Linux/kernel
|
||||
|
||||
LICENSE = "GPLv2"
|
||||
|
||||
require recipes-kernel/linux/linux-imx.inc
|
||||
require recipes-kernel/linux/linux-dtb.inc
|
||||
|
||||
DEPENDS += "lzop-native bc-native"
|
||||
|
||||
SRCBRANCH = "cgt_qmx6_3.14.28_1.0.0"
|
||||
|
||||
SRC_URI = "git://git.congatec.com/arm/imx6_kernel_3.14.git;protocol=http;branch=${SRCBRANCH} \
|
||||
file://defconfig \
|
||||
file://0001-ARM-imx6q-drop-unnecessary-semicolon.patch \
|
||||
file://0002-ARM-clk-imx6q-fix-video-divider-for-rev-T0-1.0.patch \
|
||||
file://0003-ARM-imx6sl-Disable-imx6sl-specific-code-when-imx6sl-.patch \
|
||||
"
|
||||
|
||||
SRCREV = "644b0355a3f6324a1a24dd55bcdb4ead0d587d82"
|
||||
LOCALVERSION = "-1.0.0_qmx6"
|
||||
|
||||
|
||||
COMPATIBLE_MACHINE = "(cgtqmx6)"
|
||||
Loading…
Reference in New Issue
Block a user