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u-boot-imx_%.bbappend: Olimex iMX8MP-SOM-EVB-IND
Update the u-boot-imx for Olimex iMX8MP-SOM-EVB-IND to the tag lf-6.6.23-2.0.0, that is used in the NXP BSP LF6.6.23_2.0.0. Signed-off-by: Leon Anavi <leon.anavi@konsulko.com>
This commit is contained in:
Leon Anavi
parent
6c063450d4
commit
9577e1f369
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@ -1,6 +1,6 @@
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From f3f832527e0c52c9b46c19aae8efc48a48d90e9f Mon Sep 17 00:00:00 2001
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From b10dcd225d3f7d00f256c9624233cc075a38a804 Mon Sep 17 00:00:00 2001
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From: Leon Anavi <leon.anavi@konsulko.com>
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Date: Wed, 10 Jul 2024 07:24:57 +0000
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Date: Wed, 6 Nov 2024 13:07:34 +0000
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Subject: [PATCH] imx: add Olimex iMX8MP-SOM-4GB-IND
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Add basic Olimex iMX8MP-SOM-4GB-IND and iMX8MP-SOM-EVB-IND board
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@ -20,10 +20,10 @@ Signed-off-by: Leon Anavi <leon.anavi@konsulko.com>
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board/freescale/imx8mp_olimex/imx8mp_olimex.c | 512 +++++
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board/freescale/imx8mp_olimex/lpddr4_timing.c | 2048 +++++++++++++++++
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.../imx8mp_olimex/lpddr4_timing_ndm.c | 1853 +++++++++++++++
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board/freescale/imx8mp_olimex/spl.c | 179 ++
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configs/imx8mp_olimex_defconfig | 211 ++
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board/freescale/imx8mp_olimex/spl.c | 183 ++
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configs/imx8mp_olimex_defconfig | 213 ++
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include/configs/imx8mp_olimex.h | 184 ++
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13 files changed, 7289 insertions(+)
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13 files changed, 7295 insertions(+)
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create mode 100644 arch/arm/dts/imx8mp-olimex.dts
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create mode 100644 board/freescale/imx8mp_olimex/Kconfig
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create mode 100644 board/freescale/imx8mp_olimex/MAINTAINERS
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@ -37,11 +37,11 @@ Signed-off-by: Leon Anavi <leon.anavi@konsulko.com>
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create mode 100644 include/configs/imx8mp_olimex.h
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diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
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index ceec5c074a4..720537d4f9a 100644
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index e494d16ffce..69dd59f1714 100644
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--- a/arch/arm/dts/Makefile
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+++ b/arch/arm/dts/Makefile
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@@ -1074,6 +1074,7 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
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imx8mp-dhcom-pdk2.dtb \
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@@ -1168,6 +1168,7 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
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imx8mp-dhcom-pdk3-overlay-rev100.dtbo \
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imx8mp-ddr4-evk.dtb \
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imx8mp-evk.dtb \
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+ imx8mp-olimex.dtb \
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@ -996,10 +996,10 @@ index 00000000000..d9990e36d19
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+ };
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+};
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diff --git a/arch/arm/mach-imx/imx8m/Kconfig b/arch/arm/mach-imx/imx8m/Kconfig
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index b124027910d..bf9746155c6 100644
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index 473cfa8e5e3..5afd90bac71 100644
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--- a/arch/arm/mach-imx/imx8m/Kconfig
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+++ b/arch/arm/mach-imx/imx8m/Kconfig
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@@ -448,6 +448,16 @@ config TARGET_LIBREM5
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@@ -446,6 +446,16 @@ config TARGET_LIBREM5
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select SUPPORT_SPL
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select IMX8M_LPDDR4
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@ -1016,10 +1016,10 @@ index b124027910d..bf9746155c6 100644
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endchoice
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source "board/advantech/imx8mp_rsb3720a1/Kconfig"
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@@ -481,5 +491,6 @@ source "board/technexion/pico-imx8mq/Kconfig"
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source "board/variscite/imx8mn_var_som/Kconfig"
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@@ -482,5 +492,6 @@ source "board/variscite/imx8mn_var_som/Kconfig"
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source "board/toradex/verdin-imx8mm/Kconfig"
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source "board/toradex/verdin-imx8mp/Kconfig"
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source "board/voxelbotics/navqp/Kconfig"
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+source "board/freescale/imx8mp_olimex/Kconfig"
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endif
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@ -6829,10 +6829,10 @@ index 00000000000..4765618afde
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+};
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diff --git a/board/freescale/imx8mp_olimex/spl.c b/board/freescale/imx8mp_olimex/spl.c
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new file mode 100644
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index 00000000000..362751e23a3
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index 00000000000..b7b21f0b490
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--- /dev/null
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+++ b/board/freescale/imx8mp_olimex/spl.c
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@@ -0,0 +1,179 @@
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@@ -0,0 +1,183 @@
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+// SPDX-License-Identifier: GPL-2.0-or-later
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+/*
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+ * Copyright 2018-2019, 2021 NXP
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@ -6862,6 +6862,7 @@ index 00000000000..362751e23a3
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+#include <fsl_esdhc_imx.h>
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+#include <mmc.h>
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+#include <asm/arch/ddr.h>
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+#include <asm/sections.h>
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+
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+DECLARE_GLOBAL_DATA_PTR;
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+
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@ -6923,10 +6924,10 @@ index 00000000000..362751e23a3
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+
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+ ret = pmic_get("pmic@25", &dev);
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+ if (ret == -ENODEV) {
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+ puts("No pca9450@25\n");
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+ puts("No pmic@25\n");
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+ return 0;
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+ }
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+ if (ret != 0)
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+ if (ret < 0)
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+ return ret;
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+
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+ /* BUCKxOUT_DVS0/1 control BUCK123 output */
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@ -6934,22 +6935,25 @@ index 00000000000..362751e23a3
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+
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+#ifdef CONFIG_IMX8M_LPDDR4
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+ /*
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+ * increase VDD_SOC to typical value 0.95V before first
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+ * DRAM access, set DVS1 to 0.85v for suspend.
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+ * Increase VDD_SOC to typical value 0.95V before first
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+ * DRAM access, set DVS1 to 0.85V for suspend.
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+ * Enable DVS control through PMIC_STBY_REQ and
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+ * set B1_ENMODE=1 (ON by PMIC_ON_REQ=H)
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+ */
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+#ifdef CONFIG_IMX8M_VDD_SOC_850MV
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+ /* set DVS0 to 0.85v for special case*/
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+ pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x14);
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+#else
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+ pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x1C);
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+#endif
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+ if (CONFIG_IS_ENABLED(IMX8M_VDD_SOC_850MV))
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+ pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x14);
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+ else
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+ pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x1C);
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+
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+ pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS1, 0x14);
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+ pmic_reg_write(dev, PCA9450_BUCK1CTRL, 0x59);
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+
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+ /* Kernel uses OD/OD freq for SOC */
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+ /* To avoid timing risk from SOC to ARM,increase VDD_ARM to OD voltage 0.95v */
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+ /*
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+ * Kernel uses OD/OD freq for SOC.
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+ * To avoid timing risk from SOC to ARM,increase VDD_ARM to OD
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+ * voltage 0.95V.
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+ */
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+
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+ pmic_reg_write(dev, PCA9450_BUCK2OUT_DVS0, 0x1C);
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+#elif defined(CONFIG_IMX8M_DDR4)
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+ /* DDR4 runs at 3200MTS, uses default ND 0.85v for VDD_SOC and VDD_ARM */
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@ -7014,10 +7018,10 @@ index 00000000000..362751e23a3
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+}
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diff --git a/configs/imx8mp_olimex_defconfig b/configs/imx8mp_olimex_defconfig
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new file mode 100644
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index 00000000000..8f763537537
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index 00000000000..a01891a6fd8
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--- /dev/null
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+++ b/configs/imx8mp_olimex_defconfig
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@@ -0,0 +1,211 @@
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@@ -0,0 +1,213 @@
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+CONFIG_ARM=y
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+CONFIG_ARCH_IMX8M=y
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+CONFIG_TEXT_BASE=0x40200000
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@ -7188,6 +7192,7 @@ index 00000000000..8f763537537
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+CONFIG_IMX_TMU=y
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+CONFIG_USB=y
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+CONFIG_DM_USB=y
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+CONFIG_DM_USB_GADGET=y
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+CONFIG_USB_XHCI_HCD=y
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+CONFIG_USB_XHCI_DWC3=y
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+CONFIG_USB_DWC3=y
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@ -7222,6 +7227,7 @@ index 00000000000..8f763537537
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+CONFIG_EFI_VAR_BUF_SIZE=139264
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+CONFIG_EFI_IGNORE_OSINDICATIONS=y
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+CONFIG_EFI_CAPSULE_AUTHENTICATE=y
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+CONFIG_EFI_CAPSULE_ESL_FILE="CRT.esl"
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+CONFIG_OPTEE=y
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+CONFIG_CMD_OPTEE_RPMB=y
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+CONFIG_EFI_MM_COMM_TEE=y
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@ -7420,5 +7426,5 @@ index 00000000000..6941d3ede4c
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+
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+#endif
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--
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2.45.2
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2.44.1
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