mirror of
https://github.com/Freescale/meta-freescale-3rdparty.git
synced 2025-07-19 20:19:01 +02:00
linux-fslc-lts: Drop 4.19 recipe
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
This commit is contained in:
Otavio Salvador
parent
fba28a52c4
commit
dc7ccabb77
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@ -1,13 +0,0 @@
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FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}:"
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COMPATIBLE_MACHINE_imx6sl-warp = "(.)"
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COMPATIBLE_MACHINE_imx6dl-riotboard = "(.)"
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SRC_URI_append_imx6qdl-variscite-som_use-mainline-bsp = " \
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file://imx6qdl-var-som.dtsi \
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file://imx6q-var-som-vsc.dts \
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"
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do_configure_prepend_imx6qdl-variscite-som() {
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cp ${WORKDIR}/imx6*-var*.dts* ${S}/arch/arm/boot/dts
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}
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@ -1,144 +0,0 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Support for Variscite VAR-SOM-MX6 Starter Kit
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*
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* Copyright 2018
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* Author: Andreas Müller <schnitzeltony@gmail.com>
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*/
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/dts-v1/;
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#include "imx6q.dtsi"
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#include "imx6qdl-var-som.dtsi"
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#include <dt-bindings/input/linux-event-codes.h>
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/ {
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model = "Variscite i.MX6 VAR-SOM-MX6";
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compatible = "variscite,var-som", "fsl,imx6q";
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gpio-keys { /* OK */
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compatible = "gpio-keys";
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autorepeat;
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back {
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gpios = <&gpio5 20 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_BACK>;
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label = "Key Back";
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linux,input-type = <1>;
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debounce-interval = <100>;
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wakeup-source;
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};
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};
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sound {
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compatible = "simple-audio-card";
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simple-audio-card,name = "tlv320aic3106-audio";
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simple-audio-card,format = "i2s";
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simple-audio-card,bitclock-master = <&sound_codec>;
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simple-audio-card,frame-master = <&sound_codec>;
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simple-audio-card,widgets = "Headphone", "Headphone Jack",
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"Line", "Line In";
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simple-audio-card,routing = "Headphone Jack", "HPLOUT",
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"Headphone Jack", "HPROUT",
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"LINE1L", "Line In",
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"LINE1R", "Line In";
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sound_cpu: simple-audio-card,cpu {
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sound-dai = <&ssi2>;
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};
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sound_codec: simple-audio-card,codec {
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sound-dai = <&tlv320aic3106>;
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clocks = <&clks IMX6QDL_CLK_CKO>;
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};
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};
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};
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&can1 {
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status = "okay";
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};
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&ecspi1 {
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cs-gpios = <&gpio4 9 GPIO_ACTIVE_HIGH>,
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<&gpio4 10 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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&fec { /* OK */
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status = "okay";
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};
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&hdmi {
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status = "okay";
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};
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&i2c3 { /* OK */
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status = "okay";
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rtc@0x68 {
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compatible = "dallas,ds1337";
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reg = <0x68>;
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};
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};
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/*&ldb {
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status = "okay";
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lvds-channel@1 {
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status = "okay";
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port@4 {
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reg = <4>;
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lvds1_out: endpoint {
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remote-endpoint = <&panel_in>;
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};
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};
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};
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};*/
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&pwm2 {
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status = "okay";
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};
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&uart1 {
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status = "okay";
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};
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&uart3 {
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status = "okay";
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};
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&usbh1 {
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status = "okay";
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};
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&usbotg {
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status = "okay";
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};
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&usdhc2 { /* OK */
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pinctrl-1 = <&pinctrl_usdhc2cdwp>;
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cd-gpios = <&gpio4 14 GPIO_ACTIVE_LOW>;
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wp-gpios = <&gpio4 15 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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&iomuxc {
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pinctrl_gpio_keys: gpio_keysgrp {
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fsl,pins = <
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/* user button */
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MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20 0x17059
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>;
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};
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pinctrl_usdhc2cdwp: usdhc2cdwpgrp {
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fsl,pins = <
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/* SDMMC2 CD/WP */
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MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x80000000
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MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x80000000
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>;
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};
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};
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@ -1,626 +0,0 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Support for Variscite SOM Module
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*
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* Copyright 2018
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* Author: Andreas Müller <schnitzeltony@gmail.com>
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* Based on imx6qdl-var-dart.dtsi
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*/
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/sound/fsl-imx-audmux.h>
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/ {
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memory@10000000 {
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reg = <0x10000000 0x40000000>;
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};
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reg_3p3v: regulator-3p3v {
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compatible = "regulator-fixed";
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regulator-name = "3P3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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reg_wl18xx_vmmc: regulator-wl18xx {
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compatible = "regulator-fixed";
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regulator-name = "vwl1807";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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gpio = <&gpio7 8 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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startup-delay-us = <70000>;
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};
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reg_usb_h1_vbus: regulator-usbh1vbus {
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compatible = "regulator-fixed";
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regulator-name = "usb_h1_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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};
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reg_usb_otg_vbus: regulator-usbotgvbus {
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compatible = "regulator-fixed";
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regulator-name = "usb_otg_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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};
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};
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&iomuxc {
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pinctrl_audmux: audmux {
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fsl,pins = <
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MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
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MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
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MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
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MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
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/* Audio Clock */
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MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
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/* Audio reset */
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MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x178b0
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>;
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};
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pinctrl_bt: bt {
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fsl,pins = <
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/* Bluetooth / Wifi enable */
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MX6QDL_PAD_SD3_DAT6__GPIO6_IO18 0x1b0b1
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/* Bluetooth Slow Clock */
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MX6QDL_PAD_ENET_RXD0__OSC32K_32K_OUT 0x000b0
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>;
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};
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pinctrl_ecspi3: ecspi3grp {
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fsl,pins = <
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MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1
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MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1
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MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1
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MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x178b0 /* CS */
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>;
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};
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pinctrl_enet: enetgrp {
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fsl,pins = <
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MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0
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MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0
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MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x10030
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MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x10030
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MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x10030
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MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x10030
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MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x10030
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MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x10030
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MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0
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MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
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MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
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MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
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MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
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MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
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MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
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>;
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};
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pinctrl_flexcan1: flexcan1grp {
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fsl,pins = <
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MX6QDL_PAD_GPIO_7__FLEXCAN1_TX 0x1b0b0
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MX6QDL_PAD_GPIO_8__FLEXCAN1_RX 0x1b0b0
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>;
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};
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pinctrl_flexcan2: flexcan2grp {
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fsl,pins = <
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MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x1b0b0
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MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b0b0
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>;
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};
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pinctrl_hdmicec: hdmicecgrp {
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fsl,pins = <
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MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0
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>;
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};
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pinctrl_i2c1: i2c1grp {
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fsl,pins = <
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MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
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MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
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>;
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};
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pinctrl_i2c2: i2c2grp {
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fsl,pins = <
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MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
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MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
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>;
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};
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pinctrl_i2c3: i2c3grp {
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fsl,pins = <
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MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
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MX6QDL_PAD_GPIO_16__I2C3_SDA 0x4001b8b1
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>;
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};
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pinctrl_pmic: pmicgrp {
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fsl,pins = <
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/* PMIC INT */
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MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b1
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>;
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};
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pinctrl_pwm2: pwm2grp {
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fsl,pins = <
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MX6QDL_PAD_DISP0_DAT9__PWM2_OUT 0x1b0b1
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>;
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};
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pinctrl_uart1: uart1grp {
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fsl,pins = <
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MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
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MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
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>;
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};
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pinctrl_uart2: uart2grp {
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fsl,pins = <
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MX6QDL_PAD_SD3_DAT4__UART2_RX_DATA 0x1b0b1
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MX6QDL_PAD_SD3_DAT5__UART2_TX_DATA 0x1b0b1
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MX6QDL_PAD_EIM_D28__UART2_CTS_B 0x1b0b1
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MX6QDL_PAD_EIM_D29__UART2_RTS_B 0x1b0b1
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>;
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};
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pinctrl_uart3: uart3grp {
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fsl,pins = <
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MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
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MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
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MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1
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MX6QDL_PAD_EIM_EB3__UART3_RTS_B 0x1b0b1
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>;
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};
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pinctrl_usbotg: usbotggrp {
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fsl,pins = <
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MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x17059
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>;
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};
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pinctrl_usdhc1: usdhc1grp {
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fsl,pins = <
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MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059
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MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10059
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MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059
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MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059
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MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059
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MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059
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>;
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};
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pinctrl_usdhc2: usdhc2grp {
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fsl,pins = <
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MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
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MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
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MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
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MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
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MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
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MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
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>;
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};
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pinctrl_usdhc3: usdhc3grp {
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fsl,pins = <
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MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
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MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
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MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
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MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
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MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
|
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MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
|
||||
/* WL_EN */
|
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MX6QDL_PAD_SD3_DAT7__GPIO6_IO17 0x13059
|
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/* WL_IRQ */
|
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MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x13059
|
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>;
|
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};
|
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pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
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fsl,pins = <
|
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MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170B9
|
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MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100B9
|
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MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170B9
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MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170B9
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MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170B9
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MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170B9
|
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/* WL_EN */
|
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MX6QDL_PAD_SD3_DAT7__GPIO6_IO17 0x130B9
|
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/* WL_IRQ */
|
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MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x130B9
|
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>;
|
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};
|
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|
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pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
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fsl,pins = <
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MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170F9
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MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100F9
|
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MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170F9
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MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170F9
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MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170F9
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MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170F9
|
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/* WL_EN */
|
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MX6QDL_PAD_SD3_DAT7__GPIO6_IO17 0x130F9
|
||||
/* WL_IRQ */
|
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MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x130F9
|
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>;
|
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};
|
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|
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pinctrl_gpmi_nand: gpmi-nand {
|
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fsl,pins = <
|
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MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
|
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MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
|
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MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
|
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MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1
|
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MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb0b1
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MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
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MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
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MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
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MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
|
||||
MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
|
||||
MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
|
||||
MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&audmux {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_audmux>;
|
||||
status = "okay";
|
||||
|
||||
ssi2 {
|
||||
fsl,audmux-port = <1>;
|
||||
fsl,port-config = <
|
||||
(IMX_AUDMUX_V2_PTCR_SYN |
|
||||
IMX_AUDMUX_V2_PTCR_TFSDIR |
|
||||
IMX_AUDMUX_V2_PTCR_TFSEL(2) |
|
||||
IMX_AUDMUX_V2_PTCR_TCLKDIR |
|
||||
IMX_AUDMUX_V2_PTCR_TCSEL(2))
|
||||
IMX_AUDMUX_V2_PDCR_RXDSEL(2)
|
||||
>;
|
||||
};
|
||||
|
||||
aud3 {
|
||||
fsl,audmux-port = <2>;
|
||||
fsl,port-config = <
|
||||
IMX_AUDMUX_V2_PTCR_SYN
|
||||
IMX_AUDMUX_V2_PDCR_RXDSEL(1)
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&can1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_flexcan1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&can2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_flexcan2>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&ecspi3 {
|
||||
pinctrl-names = "default";
|
||||
fsl,spi-num-chipselects = <1>;
|
||||
pinctrl-0 = <&pinctrl_ecspi3>;
|
||||
cs-gpios = <&gpio4 24 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&fec {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_enet>;
|
||||
phy-mode = "rgmii";
|
||||
phy-reset-gpios = <&gpio1 25 0>;
|
||||
phy-reset-duration=<100>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&hdmi {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_hdmicec>;
|
||||
ddc-i2c-bus = <&i2c2>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
clock-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c2>;
|
||||
status = "okay";
|
||||
|
||||
pmic@8 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pmic>;
|
||||
compatible = "fsl,pfuze100";
|
||||
reg = <0x08>;
|
||||
|
||||
regulators {
|
||||
sw1a_reg: sw1ab {
|
||||
regulator-min-microvolt = <300000>;
|
||||
regulator-max-microvolt = <1875000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
regulator-ramp-delay = <6250>;
|
||||
};
|
||||
|
||||
sw1c_reg: sw1c {
|
||||
regulator-min-microvolt = <300000>;
|
||||
regulator-max-microvolt = <1875000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
regulator-ramp-delay = <6250>;
|
||||
};
|
||||
|
||||
sw2_reg: sw2 {
|
||||
regulator-min-microvolt = <800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
sw3a_reg: sw3a {
|
||||
regulator-min-microvolt = <800000>;
|
||||
regulator-max-microvolt = <3950000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
sw3b_reg: sw3b {
|
||||
regulator-min-microvolt = <800000>;
|
||||
regulator-max-microvolt = <3950000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
sw4_reg: sw4 {
|
||||
regulator-min-microvolt = <800000>;
|
||||
regulator-max-microvolt = <3950000>;
|
||||
};
|
||||
|
||||
snvs_reg: vsnvs {
|
||||
regulator-min-microvolt = <1200000>;
|
||||
regulator-max-microvolt = <3000000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vref_reg: vrefddr {
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vgen1_reg: vgen1 {
|
||||
regulator-min-microvolt = <800000>;
|
||||
regulator-max-microvolt = <1550000>;
|
||||
};
|
||||
|
||||
vgen2_reg: vgen2 {
|
||||
regulator-min-microvolt = <800000>;
|
||||
regulator-max-microvolt = <1550000>;
|
||||
};
|
||||
|
||||
vgen3_reg: vgen3 {
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
vgen4_reg: vgen4 {
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
vgen5_reg: vgen5 {
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
vgen6_reg: vgen6 {
|
||||
regulator-min-microvolt = <2800000>;
|
||||
regulator-max-microvolt = <2800000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
tlv320aic3106: codec@1b {
|
||||
compatible = "ti,tlv320aic3106";
|
||||
reg = <0x1b>;
|
||||
#sound-dai-cells = <0>;
|
||||
DRVDD-supply = <®_3p3v>;
|
||||
AVDD-supply = <®_3p3v>;
|
||||
IOVDD-supply = <®_3p3v>;
|
||||
DVDD-supply = <®_3p3v>;
|
||||
ai3x-ocmv = <0>;
|
||||
reset-gpios = <&gpio4 5 GPIO_ACTIVE_LOW>;
|
||||
ai3x-gpio-func = <
|
||||
0 /* AIC3X_GPIO1_FUNC_DISABLED */
|
||||
5 /* AIC3X_GPIO2_FUNC_DIGITAL_MIC_INPUT */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c3>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&pcie {
|
||||
fsl,tx-swing-full = <103>;
|
||||
fsl,tx-swing-low = <103>;
|
||||
reset-gpio = <&gpio4 11 GPIO_ACTIVE_LOW>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&pwm2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pwm2>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
®_arm {
|
||||
vin-supply = <&sw1a_reg>;
|
||||
};
|
||||
|
||||
®_pu {
|
||||
vin-supply = <&sw1c_reg>;
|
||||
};
|
||||
|
||||
®_soc {
|
||||
vin-supply = <&sw1c_reg>;
|
||||
};
|
||||
|
||||
&snvs_poweroff {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ssi2 { /* Onboard audio */
|
||||
fsl,mode = "i2s-slave";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart1 { /* Console */
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&uart2 { /* Bluetooth */
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart2 &pinctrl_bt>;
|
||||
uart-has-rtscts;
|
||||
status = "okay";
|
||||
|
||||
bluetooth {
|
||||
compatible = "ti,wl1835-st";
|
||||
enable-gpios = <&gpio6 18 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
&uart3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart3>;
|
||||
uart-has-rtscts;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&usbh1 {
|
||||
vbus-supply = <®_usb_h1_vbus>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&usbotg {
|
||||
vbus-supply = <®_usb_otg_vbus>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usbotg>;
|
||||
disable-over-current;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&gpmi { /* NAND */
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gpmi_nand>;
|
||||
fsl,legacy-bch-geometry;
|
||||
status = "okay";
|
||||
|
||||
/* a 2 MiB partition */
|
||||
partition@0 {
|
||||
label = "spl";
|
||||
reg = <0x00000000 0x00200000>;
|
||||
};
|
||||
|
||||
/* a 2 MiB partition */
|
||||
partition@1 {
|
||||
label = "bootloader";
|
||||
reg = <0x00200000 0x00200000>;
|
||||
};
|
||||
|
||||
/* an 8 MiB partition */
|
||||
partition@2 {
|
||||
label = "kernel";
|
||||
reg = <0x00400000 0x00800000>;
|
||||
};
|
||||
|
||||
/* max 1012 MiB partition - truncated automatically */
|
||||
partition@3 {
|
||||
label = "rootfs";
|
||||
reg = <0x00c00000 0x3f400000>;
|
||||
};
|
||||
};
|
||||
|
||||
&usdhc1 { /* eMMC */
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usdhc1>;
|
||||
keep-power-in-suspend;
|
||||
wakeup-source;
|
||||
non-removable;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usdhc2 { /* MMC/SD card */
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usdhc2>;
|
||||
no-1-8-v;
|
||||
keep-power-in-suspend;
|
||||
wakeup-source;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&usdhc3 { /* Wilink8 WL18xx*/
|
||||
pinctrl-names = "default", "state_100mhz", "state_200mhz";
|
||||
pinctrl-0 = <&pinctrl_usdhc3>;
|
||||
pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
|
||||
pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
|
||||
|
||||
non-removable;
|
||||
keep-power-in-suspend;
|
||||
wakeup-source;
|
||||
bus-width = <4>;
|
||||
vmmc-supply = <®_wl18xx_vmmc>;
|
||||
non-removable;
|
||||
wakeup-source;
|
||||
keep-power-in-suspend;
|
||||
cap-power-off-card;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "okay";
|
||||
|
||||
wlcore: wlcore@2 {
|
||||
compatible = "ti,wl1835";
|
||||
reg = <2>;
|
||||
interrupt-parent = <&gpio6>;
|
||||
interrupts = <17 IRQ_TYPE_LEVEL_HIGH>;
|
||||
ref-clock-frequency = <38400000>;
|
||||
};
|
||||
};
|
||||
|
||||
&snvs_rtc {
|
||||
status = "disabled";
|
||||
};
|
||||
Loading…
Reference in New Issue
Block a user