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1ded0def76
Update linux kernel patch and recipe to support external WDOG_B on imx6q-dms-ba16 platform. Signed-off-by: Ken Lin <yungching0725@gmail.com> Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
90 lines
2.9 KiB
Diff
90 lines
2.9 KiB
Diff
From d9ff4244846537ccff192c8d10cc5a389193143a Mon Sep 17 00:00:00 2001
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From: Ken Lin <yungching0725@gmail.com>
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Date: Thu, 14 Sep 2017 07:51:52 +0800
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Subject: [PATCH] dms-ba16: watchdog: enable external wdog_b signal
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Enable the external wdog_b singal in Q7 to support the platform system reset
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Signed-off-by: Ken Lin <yungching0725@gmail.com>
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---
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arch/arm/boot/dts/imx6q-dms-ba16.dts | 14 +++++++++++++-
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drivers/watchdog/imx2_wdt.c | 12 ++++++++++--
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2 files changed, 23 insertions(+), 3 deletions(-)
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diff --git a/arch/arm/boot/dts/imx6q-dms-ba16.dts b/arch/arm/boot/dts/imx6q-dms-ba16.dts
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index 570e4ab5c531..154aa77e4c91 100644
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--- a/arch/arm/boot/dts/imx6q-dms-ba16.dts
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+++ b/arch/arm/boot/dts/imx6q-dms-ba16.dts
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@@ -466,7 +466,6 @@
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MX6QDL_PAD_NANDF_D7__GPIO2_IO07 0x80000000 /* GPIO7 */
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MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x80000000 /* CAM_PWDN */
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MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000 /* CAM_RST */
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- MX6QDL_PAD_GPIO_9__WDOG1_B 0x80000000 /* Watchdog out */
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MX6QDL_PAD_GPIO_16__GPIO7_IO11 0x80000000 /* HUB_RESET */
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MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x80000000 /* PMIC Interrupt */
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MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x80000000 /* AR8033 Interrupt */
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@@ -666,6 +665,13 @@
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>;
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};
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};
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+ wdog {
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+ pinctrl_wdog: wdoggrp {
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+ fsl,pins = <
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+ MX6QDL_PAD_GPIO_9__WDOG1_B 0x1b0b0 /* Watchdog out */
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+ >;
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+ };
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+ };
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};
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&ldb {
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@@ -797,3 +803,9 @@
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fsl,receive-dpll-mode = <1>;
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status = "okay";
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};
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+
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+&wdog1 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_wdog>;
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+ fsl,wdog_b;
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+};
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diff --git a/drivers/watchdog/imx2_wdt.c b/drivers/watchdog/imx2_wdt.c
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index 805df6b33625..decfef3ecd41 100644
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--- a/drivers/watchdog/imx2_wdt.c
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+++ b/drivers/watchdog/imx2_wdt.c
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@@ -43,6 +43,8 @@
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#define IMX2_WDT_WCR 0x00 /* Control Register */
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#define IMX2_WDT_WCR_WT (0xFF << 8) /* -> Watchdog Timeout Field */
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+#define IMX2_WDT_WCR_WDA (1 << 5) /* -> WDOG_B assertion */
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+#define IMX2_WDT_WCR_SRS (1 << 4) /* -> Software Reset Signal */
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#define IMX2_WDT_WCR_WRE (1 << 3) /* -> WDOG Reset Enable */
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#define IMX2_WDT_WCR_WDE (1 << 2) /* -> Watchdog Enable */
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#define IMX2_WDT_WCR_WDZST (1 << 0) /* -> Watchdog timer Suspend */
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@@ -102,7 +104,9 @@ static int imx2_restart_handler(struct notifier_block *this, unsigned long mode,
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restart_handler);
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/* Assert WDOG_B signal */
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if (wdev->wdog_b)
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- wcr_enable = 0x14;
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+ wcr_enable |= IMX2_WDT_WCR_SRS;
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+ else
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+ wcr_enable |= IMX2_WDT_WCR_WDA;
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regmap_write(wdev->regmap, 0, wcr_enable);
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/*
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@@ -133,7 +137,11 @@ static inline void imx2_wdt_setup(struct watchdog_device *wdog)
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/* Strip the old watchdog Time-Out value */
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val &= ~IMX2_WDT_WCR_WT;
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/* Generate reset if WDOG times out */
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- val &= ~IMX2_WDT_WCR_WRE;
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+ if (!wdev->wdog_b)
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+ val &= ~IMX2_WDT_WCR_WRE;
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+ /* Or if external-reset assert WDOG_B reset only on time-out */
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+ else
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+ val |= IMX2_WDT_WCR_WRE;
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/* Keep Watchdog Disabled */
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val &= ~IMX2_WDT_WCR_WDE;
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/* Set the watchdog's Time-Out value */
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--
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2.11.0
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