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314291fb10
Add support for DMS-BA16 board Signed-off-by: Ken Lin <yungching0725@gmail.com> Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
836 lines
19 KiB
Diff
836 lines
19 KiB
Diff
From 65b84fc181347ae04b1e38dbaa1672751050a5f5 Mon Sep 17 00:00:00 2001
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From: Ken Lin <yungching0725@gmail.com>
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Date: Thu, 7 Jun 2018 07:20:32 +0800
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Subject: [PATCH] Add support for the Advantech DMS-BA16 Board
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Signed-off-by: Ken Lin <yungching0725@gmail.com>
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---
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arch/arm/boot/dts/imx6q-dms-ba16.dts | 815 +++++++++++++++++++++++++++++++++++
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1 file changed, 815 insertions(+)
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create mode 100755 arch/arm/boot/dts/imx6q-dms-ba16.dts
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diff --git a/arch/arm/boot/dts/imx6q-dms-ba16.dts b/arch/arm/boot/dts/imx6q-dms-ba16.dts
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new file mode 100755
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index 000000000000..fb5c9ae6579f
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--- /dev/null
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+++ b/arch/arm/boot/dts/imx6q-dms-ba16.dts
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@@ -0,0 +1,815 @@
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+/*
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+ * Copyright 2018 Advantech Corporation
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+ *
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+ * The code contained herein is licensed under the GNU General Public
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+ * License. You may obtain a copy of the GNU General Public License
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+ * Version 2 or later at the following locations:
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+ *
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+ * http://www.opensource.org/licenses/gpl-license.html
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+ * http://www.gnu.org/copyleft/gpl.html
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+ */
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+
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+/dts-v1/;
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+
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+#include <dt-bindings/gpio/gpio.h>
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+#include "imx6q.dtsi"
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+
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+/ {
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+ model = "Advantech DMS-BA16";
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+ compatible = "fsl,imx6q-dms-ba16", "fsl,imx6q";
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+
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+ aliases {
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+ mxcfb0 = &mxcfb1;
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+ mxcfb1 = &mxcfb2;
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+ mmc0 = &usdhc2;
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+ mmc1 = &usdhc3;
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+ mmc2 = &usdhc4;
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+ };
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+
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+ memory {
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+ reg = <0x10000000 0x40000000>;
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+ };
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+
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+ clocks {
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+ clk24m: clk24m {
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+ compatible = "fixed-clock";
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+ #clock-cells = <0>;
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+ clock-frequency = <24000000>;
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+ };
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+ };
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+
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+ regulators {
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+ compatible = "simple-bus";
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+
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+ reg_usb_otg_vbus: usb_otg_vbus {
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+ compatible = "regulator-fixed";
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+ regulator-name = "usb_otg_vbus";
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ };
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+
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+ reg_usb_h1_vbus: usb_h1_vbus {
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+ compatible = "regulator-fixed";
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+ regulator-name = "usb_h1_vbus";
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ };
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+
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+ reg_1p8v: 1p8v {
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+ compatible = "regulator-fixed";
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+ regulator-name = "1P8V";
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+ regulator-always-on;
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+ };
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+
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+ reg_3p3v: 3p3v {
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+ compatible = "regulator-fixed";
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+ regulator-name = "3P3V";
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ regulator-always-on;
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+ };
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+
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+ reg_lvds: regulator-lvds {
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+ compatible = "regulator-fixed";
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+ regulator-name = "lvds_ppen";
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ regulator-boot-on;
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+ gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
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+ enable-active-high;
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+ };
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+ };
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+
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+ sound {
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+ compatible = "fsl,imx6q-ba16-sgtl5000",
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+ "fsl,imx-audio-sgtl5000";
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+ model = "imx6q-ba16-sgtl5000";
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+ ssi-controller = <&ssi1>;
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+ audio-codec = <&codec>;
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+ audio-routing =
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+ "MIC_IN", "Mic Jack",
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+ "Mic Jack", "Mic Bias",
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+ "Headphone Jack", "HP_OUT";
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+ mux-int-port = <1>;
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+ mux-ext-port = <4>;
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+ };
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+
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+ sound-hdmi {
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+ compatible = "fsl,imx6q-audio-hdmi",
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+ "fsl,imx-audio-hdmi"; model = "imx-audio-hdmi";
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+ hdmi-controller = <&hdmi_audio>;
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+ };
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+
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+ mxcfb1: fb@0 {
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+ compatible = "fsl,mxc_sdc_fb";
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+ disp_dev = "ldb";
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+ interface_pix_fmt = "RGB24";
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+ default_bpp = <32>;
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+ int_clk = <0>;
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+ late_init = <0>;
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+ status = "okay";
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+ };
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+
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+ mxcfb2: fb@1 {
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+ compatible = "fsl,mxc_sdc_fb";
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+ disp_dev = "hdmi";
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+ interface_pix_fmt = "RGB24";
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+ mode_str ="1920x1080M@60";
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+ default_bpp = <24>;
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+ int_clk = <0>;
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+ late_init = <0>;
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+ status = "okay";
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+ };
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+
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+ backlight {
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+ compatible = "pwm-backlight";
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+ pwms = <&pwm1 0 5000000>;
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+ brightness-levels = < 0 1 2 3 4 5 6 7 8 9
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+ 10 11 12 13 14 15 16 17 18 19
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+ 20 21 22 23 24 25 26 27 28 29
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+ 30 31 32 33 34 35 36 37 38 39
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+ 40 41 42 43 44 45 46 47 48 49
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+ 50 51 52 53 54 55 56 57 58 59
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+ 60 61 62 63 64 65 66 67 68 69
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+ 70 71 72 73 74 75 76 77 78 79
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+ 80 81 82 83 84 85 86 87 88 89
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+ 90 91 92 93 94 95 96 97 98 99
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+ 100 101 102 103 104 105 106 107 108 109
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+ 110 111 112 113 114 115 116 117 118 119
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+ 120 121 122 123 124 125 126 127 128 129
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+ 130 131 132 133 134 135 136 137 138 139
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+ 140 141 142 143 144 145 146 147 148 149
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+ 150 151 152 153 154 155 156 157 158 159
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+ 160 161 162 163 164 165 166 167 168 169
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+ 170 171 172 173 174 175 176 177 178 179
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+ 180 181 182 183 184 185 186 187 188 189
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+ 190 191 192 193 194 195 196 197 198 199
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+ 200 201 202 203 204 205 206 207 208 209
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+ 210 211 212 213 214 215 216 217 218 219
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+ 220 221 222 223 224 225 226 227 228 229
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+ 230 231 232 233 234 235 236 237 238 239
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+ 240 241 242 243 244 245 246 247 248 249
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+ 250 251 252 253 254 255>;
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+ default-brightness-level = <255>;
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+ power-supply = <®_lvds>;
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+ enable-gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>;
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+ };
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+
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+ v4l2_out {
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+ compatible = "fsl,mxc_v4l2_output";
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+ status = "okay";
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+ };
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+};
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+
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+&audmux {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_audmux>;
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+ status = "okay";
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+};
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+
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+&clks {
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+ fsl,ldb-di0-parent = <&clks IMX6QDL_CLK_PLL2_PFD0_352M>;
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+ fsl,ldb-di1-parent = <&clks IMX6QDL_CLK_PLL2_PFD0_352M>;
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+};
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+
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+&ecspi1 {
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+ fsl,spi-num-chipselects = <1>;
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+ cs-gpios = <&gpio2 30 0>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_ecspi1>;
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+ status = "okay";
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+
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+ flash: n25q032@0 {
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ compatible = "st,n25q032";
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+ spi-max-frequency = <20000000>;
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+ reg = <0>;
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+ partition@0 {
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+ label = "U-Boot";
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+ reg = <0x0 0xC0000>;
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+ };
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+ partition@C0000 {
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+ label = "env";
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+ reg = <0xC0000 0x10000>;
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+ };
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+ partition@D0000 {
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+ label = "spare";
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+ reg = <0xD0000 0x130000>;
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+ };
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+ };
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+};
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+
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+&ecspi5 {
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+ fsl,spi-num-chipselects = <1>;
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+ cs-gpios = <&gpio1 17 0>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_ecspi5>;
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+ status = "okay";
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+
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+ m25_eeprom: m25p80@0 {
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+ compatible = "atmel,at25";
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+ spi-max-frequency = <20000000>;
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+ size = <0x8000>;
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+ pagesize = <64>;
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+ reg = <0>;
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+ address-width = <16>;
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+ };
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+};
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+
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+&fec {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_enet>;
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+ phy-mode = "rgmii";
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+ status = "okay";
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+};
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+
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+&cpu0 {
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+ arm-supply = <®_arm>;
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+ soc-supply = <®_soc>;
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+ pu-supply = <®_pu>;
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+};
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+
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+&dcic1 {
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+ dcic_id = <0>;
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+ dcic_mux = "dcic-hdmi";
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+ status = "okay";
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+};
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+
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+&dcic2 {
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+ dcic_id = <1>;
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+ dcic_mux = "dcic-lvds1";
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+ status = "okay";
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+};
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+
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+
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+&gpc {
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+ fsl,cpu_pupscr_sw2iso = <0xf>;
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+ fsl,cpu_pupscr_sw = <0xf>;
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+ fsl,cpu_pdnscr_iso2sw = <0x1>;
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+ fsl,cpu_pdnscr_iso = <0x1>;
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+ fsl,ldo-bypass = <0>;
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+ fsl,wdog-reset = <1>; /* watchdog select of reset source */
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+ pu-supply = <®_pu>;
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+};
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+
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+&hdmi_audio {
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+ status = "okay";
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+};
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+
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+
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+&hdmi_cec {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_hdmi_cec>;
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+ status = "disabled";
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+};
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+
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+
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+&hdmi_core {
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+ ipu_id = <1>;
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+ disp_id = <0>;
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+ status = "okay";
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+};
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+
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+&hdmi_video {
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+ fsl,phy_reg_vlev = <0x01ad>;
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+ fsl,phy_reg_cksymtx = <0x800d>;
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+ status = "okay";
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+};
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+
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+&i2c1 {
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+ clock-frequency = <100000>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_i2c1>;
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+ status = "okay";
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+
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+ codec: sgtl5000@0a {
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+ compatible = "fsl,sgtl5000";
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+ reg = <0x0a>;
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+ clocks = <&clks 201>;
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+ VDDA-supply = <®_1p8v>;
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+ VDDIO-supply = <®_3p3v>;
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+ };
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+};
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+
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+&i2c2 {
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+ clock-frequency = <100000>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_i2c2>;
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+ status = "okay";
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+
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+
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+ hdmi_edid: edid@50 {
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+ compatible = "fsl,imx6-hdmi-i2c";
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+ reg = <0x50>;
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+ };
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+
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+};
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+
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+&i2c3 {
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+ clock-frequency = <100000>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_i2c3>;
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+ status = "okay";
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+
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+ pmic@58 {
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+ compatible = "dialog,da9063";
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+ reg = <0x58>;
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+ interrupt-parent = <&gpio7>;
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+ interrupts = <13 IRQ_TYPE_LEVEL_LOW>; /* active-low GPIO7_13 */
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+
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+ onkey {
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+ compatible = "dlg,da9063-onkey";
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+ };
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+
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+ regulators {
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+ bcore1 {
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+ regulator-min-microvolt = <1420000>;
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+ regulator-max-microvolt = <1420000>;
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+ regulator-always-on;
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+ regulator-boot-on;
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+ };
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+
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+ bcore2 {
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+ regulator-min-microvolt = <1420000>;
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+ regulator-max-microvolt = <1420000>;
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+ regulator-always-on;
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+ regulator-boot-on;
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+ };
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+
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+ bpro {
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+ regulator-min-microvolt = <1500000>;
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+ regulator-max-microvolt = <1500000>;
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+ regulator-always-on;
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+ regulator-boot-on;
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+ };
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+
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+ bmem {
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+ regulator-always-on;
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+ regulator-boot-on;
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+ };
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+
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+ bio: bio {
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+ regulator-always-on;
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+ regulator-boot-on;
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+ };
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+
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+ bperi: bperi {
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ regulator-always-on;
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+ regulator-boot-on;
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+ };
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+
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+ ldo1 {
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+ regulator-min-microvolt = <600000>;
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+ regulator-max-microvolt = <1860000>;
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+ };
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+
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+ ldo2 {
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+ regulator-min-microvolt = <600000>;
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+ regulator-max-microvolt = <1860000>;
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+ };
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+
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+ ldo3 {
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+ regulator-min-microvolt = <900000>;
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+ regulator-max-microvolt = <3440000>;
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+ };
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+
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+ ldo4 {
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+ regulator-min-microvolt = <900000>;
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+ regulator-max-microvolt = <3440000>;
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+ };
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+
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+ ldo5 {
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+ regulator-min-microvolt = <900000>;
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+ regulator-max-microvolt = <3600000>;
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+ regulator-always-on;
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+ regulator-boot-on;
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+ };
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+
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+ ldo6 {
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+ regulator-min-microvolt = <900000>;
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+ regulator-max-microvolt = <3600000>;
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+ regulator-always-on;
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+ regulator-boot-on;
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+ };
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+
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+ ldo7 {
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+ regulator-min-microvolt = <900000>;
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+ regulator-max-microvolt = <3600000>;
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+ regulator-always-on;
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+ regulator-boot-on;
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+ };
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+
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+ ldo8 {
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+ regulator-min-microvolt = <900000>;
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+ regulator-max-microvolt = <3600000>;
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+ regulator-always-on;
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+ regulator-boot-on;
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+ };
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+
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+ ldo9 {
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+ regulator-min-microvolt = <950000>;
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+ regulator-max-microvolt = <3600000>;
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+ regulator-always-on;
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+ regulator-boot-on;
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+ };
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+
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+ ldo10 {
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+ regulator-min-microvolt = <900000>;
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+ regulator-max-microvolt = <3600000>;
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+ regulator-always-on;
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+ regulator-boot-on;
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+ };
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+
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+ ldo11 {
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+ regulator-min-microvolt = <900000>;
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+ regulator-max-microvolt = <3600000>;
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+ regulator-always-on;
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+ regulator-boot-on;
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+ };
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+ };
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+ };
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+
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+ rtc@32 {
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+ compatible = "epson,rx8010";
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+ reg = <0x32>;
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+ interrupt-parent = <&gpio4>;
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+ interrupts = <10>;
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+ rx8010-irq_1 = <&gpio4 10 0>;
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+ };
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+};
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+
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+&iomuxc {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_hog>;
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+
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+ hog {
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+ pinctrl_hog: hoggrp-1 {
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+ fsl,pins = <
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+ MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x80000000 /* uSDHC2 CD */
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+ MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x80000000 /* uSDHC4 CD */
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+ MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x80000000 /* uSDHC4 SDIO PWR */
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+ MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x80000000 /* uSDHC4 SDIO WP */
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+ MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x80000000 /* uSDHC4 SDIO LED */
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+ MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x80000000 /* SPI1 CS */
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+ MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000 /* FEC Reset */
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+ MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x80000000 /* GPIO0 */
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+ MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x80000000 /* GPIO1 */
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+ MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x80000000 /* GPIO2 */
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+ MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x80000000 /* GPIO3 */
|
|
+ MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x80000000 /* GPIO4 */
|
|
+ MX6QDL_PAD_NANDF_D5__GPIO2_IO05 0x80000000 /* GPIO5 */
|
|
+ MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x80000000 /* GPIO6 */
|
|
+ MX6QDL_PAD_NANDF_D7__GPIO2_IO07 0x80000000 /* GPIO7 */
|
|
+ MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x80000000 /* CAM_PWDN */
|
|
+ MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000 /* CAM_RST */
|
|
+ MX6QDL_PAD_GPIO_16__GPIO7_IO11 0x80000000 /* HUB_RESET */
|
|
+ MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x80000000 /* PMIC Interrupt */
|
|
+ MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x80000000 /* AR8033 Interrupt */
|
|
+ MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x80000000 /* BLEN_OUT */
|
|
+ MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 /* LVDS_PPEN_OUT */
|
|
+ MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x80000000 /* RTC_INT */
|
|
+ MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x1b0b0 /*SUS_S3_OUT*/
|
|
+
|
|
+ >;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ usdhc3 {
|
|
+ pinctrl_usdhc3_reset: usdhc3grp-reset {
|
|
+ fsl,pins = <
|
|
+ MX6QDL_PAD_SD3_RST__SD3_RESET 0x170F9
|
|
+ >;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ audmux {
|
|
+ pinctrl_audmux: audmuxgrp {
|
|
+ fsl,pins = <
|
|
+ MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0
|
|
+ MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x130b0
|
|
+ MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0
|
|
+ MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0
|
|
+ >;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ ecspi1 {
|
|
+ pinctrl_ecspi1: ecspi1grp {
|
|
+ fsl,pins = <
|
|
+ MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
|
|
+ MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
|
|
+ MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
|
|
+ >;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ ecspi5 {
|
|
+ pinctrl_ecspi5: ecspi5grp {
|
|
+ fsl,pins = <
|
|
+ MX6QDL_PAD_SD1_DAT0__ECSPI5_MISO 0x1b0b0
|
|
+ MX6QDL_PAD_SD1_CMD__ECSPI5_MOSI 0x1b0b0
|
|
+ MX6QDL_PAD_SD1_CLK__ECSPI5_SCLK 0x1b0b0
|
|
+ MX6QDL_PAD_SD1_DAT1__GPIO1_IO17 0x1b0b0
|
|
+ >;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ hdmi_cec {
|
|
+ pinctrl_hdmi_cec: hdmicecgrp {
|
|
+ fsl,pins = <
|
|
+ MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0
|
|
+ >;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ usbotg {
|
|
+ pinctrl_usbotg: usbotggrp {
|
|
+ fsl,pins = <
|
|
+ MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
|
|
+ >;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ usdhc2 {
|
|
+ pinctrl_usdhc2: usdhc2grp {
|
|
+ fsl,pins = <
|
|
+ MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
|
|
+ MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
|
|
+ MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
|
|
+ MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
|
|
+ MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
|
|
+ MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
|
|
+ >;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ usdhc3 {
|
|
+ pinctrl_usdhc3: usdhc3grp {
|
|
+ fsl,pins = <
|
|
+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
|
|
+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
|
|
+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
|
|
+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
|
|
+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
|
|
+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
|
|
+ MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
|
|
+ MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
|
|
+ MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
|
|
+ MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
|
|
+ >;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ usdhc4 {
|
|
+ pinctrl_usdhc4: usdhc4grp {
|
|
+ fsl,pins = <
|
|
+ MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
|
|
+ MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
|
|
+ MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
|
|
+ MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
|
|
+ MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
|
|
+ MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
|
|
+ MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059
|
|
+ MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059
|
|
+ MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059
|
|
+ MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059
|
|
+ >;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ i2c1 {
|
|
+ pinctrl_i2c1: i2c1grp {
|
|
+ fsl,pins = <
|
|
+ MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
|
|
+ MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
|
|
+ >;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ i2c2 {
|
|
+ pinctrl_i2c2: i2c2grp {
|
|
+ fsl,pins = <
|
|
+ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
|
|
+ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
|
|
+ >;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ i2c3 {
|
|
+ pinctrl_i2c3: i2c3grp {
|
|
+ fsl,pins = <
|
|
+ MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
|
|
+ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
|
|
+ >;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ pwm1 {
|
|
+ pinctrl_pwm1: pwm1grp {
|
|
+ fsl,pins = <
|
|
+ MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1
|
|
+ >;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ pwm2 {
|
|
+ pinctrl_pwm2: pwm2grp {
|
|
+ fsl,pins = <
|
|
+ MX6QDL_PAD_GPIO_1__PWM2_OUT 0x1b0b1
|
|
+ >;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ enet {
|
|
+ pinctrl_enet: enetgrp {
|
|
+ fsl,pins = <
|
|
+ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0
|
|
+ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0
|
|
+ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x100b0
|
|
+ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x100b0
|
|
+ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x100b0
|
|
+ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x100b0
|
|
+ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x100b0
|
|
+ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x100b0
|
|
+ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0
|
|
+ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
|
|
+ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
|
|
+ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
|
|
+ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
|
|
+ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
|
|
+ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
|
|
+ >;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ uart3 {
|
|
+ pinctrl_uart3: uart3grp {
|
|
+ fsl,pins = <
|
|
+ MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
|
|
+ MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
|
|
+ MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1
|
|
+ MX6QDL_PAD_EIM_D31__UART3_RTS_B 0x1b0b1
|
|
+ >;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ uart4 {
|
|
+ pinctrl_uart4: uart4grp {
|
|
+ fsl,pins = <
|
|
+ MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
|
|
+ MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
|
|
+ >;
|
|
+ };
|
|
+ };
|
|
+ wdog {
|
|
+ pinctrl_wdog: wdoggrp {
|
|
+ fsl,pins = <
|
|
+ MX6QDL_PAD_GPIO_9__WDOG1_B 0x1b0b0 /* Watchdog out */
|
|
+ >;
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+&ldb {
|
|
+ split-mode;
|
|
+ status = "okay";
|
|
+
|
|
+ lvds-channel@0 {
|
|
+ fsl,data-mapping = "spwg";
|
|
+ fsl,data-width = <24>;
|
|
+ crtc = "ipu1-di0";
|
|
+ status = "okay";
|
|
+
|
|
+ display-timings {
|
|
+ native-mode = <&timing0>;
|
|
+ timing0: SHARP-LQ156M1LG21 {
|
|
+ clock-frequency = <65000000>;
|
|
+ hactive = <1920>;
|
|
+ vactive = <1080>;
|
|
+ hback-porch = <100>;
|
|
+ hfront-porch = <40>;
|
|
+ vback-porch = <30>;
|
|
+ vfront-porch = <3>;
|
|
+ hsync-len = <10>;
|
|
+ vsync-len = <2>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ lvds-channel@1 {
|
|
+ status = "disabled";
|
|
+ };
|
|
+};
|
|
+
|
|
+&pcie {
|
|
+ reset-gpio = <&gpio7 12 0>;
|
|
+ fsl,tx-deemph-gen1 = <0>;
|
|
+ fsl,tx-deemph-gen2-3p5db = <0>;
|
|
+ fsl,tx-deemph-gen2-6db = <20>;
|
|
+ fsl,tx-swing-full = <103>;
|
|
+ fsl,tx-swing-low = <103>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+
|
|
+&pwm1 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&pinctrl_pwm1>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&pwm2 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&pinctrl_pwm2>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&ssi1 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&uart3 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&pinctrl_uart3>;
|
|
+ fsl,uart-has-rtscts;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&uart4 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&pinctrl_uart4>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usbh1 {
|
|
+ vbus-supply = <®_usb_h1_vbus>;
|
|
+ reset-gpios = <&gpio7 11 0>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usbotg {
|
|
+ vbus-supply = <®_usb_otg_vbus>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&pinctrl_usbotg>;
|
|
+ disable-over-current;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usdhc2 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&pinctrl_usdhc2>;
|
|
+ cd-gpios = <&gpio1 4 1>;
|
|
+ no-1-8-v;
|
|
+ keep-power-in-suspend;
|
|
+ enable-sdio-wakeup;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usdhc3 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&pinctrl_usdhc3 &pinctrl_usdhc3_reset>;
|
|
+ bus-width = <8>;
|
|
+ vmmc-supply = <&bperi>;
|
|
+ no-1-8-v;
|
|
+ non-removable;
|
|
+ keep-power-in-suspend;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usdhc4 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&pinctrl_usdhc4>;
|
|
+ bus-width = <8>;
|
|
+ cd-gpios = <&gpio6 11 1>;
|
|
+ no-1-8-v;
|
|
+ keep-power-in-suspend;
|
|
+ enable-sdio-wakeup;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&vpu {
|
|
+ pu-supply = <®_pu>;
|
|
+};
|
|
+
|
|
+&sata {
|
|
+ fsl,no-spread-spectrum;
|
|
+ fsl,transmit-atten-16ths = <12>;
|
|
+ fsl,transmit-boost-mdB = <3330>;
|
|
+ fsl,transmit-level-mV = <1133>;
|
|
+ fsl,receive-dpll-mode = <1>;
|
|
+ status = "okay";
|
|
+};
|
|
+&wdog1 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&pinctrl_wdog>;
|
|
+ fsl,wdog_b;
|
|
+};
|
|
--
|
|
2.11.0
|
|
|