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fbccb80ee0
This recipe is a fork of the fslc kernel with patches for supporting the imx6q-elo platform. This recipe is intended to be a stop-gap until the imx6q-elo board can be rebased and tested with the most recent fslc branch. Signed-off-by: Justin Waters <justin.waters@timesys.com> Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
52 lines
1.6 KiB
Diff
52 lines
1.6 KiB
Diff
From 50473c9e2f1db391699e3240a05215ccdb4e81aa Mon Sep 17 00:00:00 2001
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From: Justin Waters <justin.waters@timesys.com>
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Date: Wed, 2 Mar 2016 11:47:13 -0500
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Subject: [PATCH 08/10] ahci_imx: Make receive DPLL mode configurable
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Signed-off-by: Justin Waters <justin.waters@timesys.com>
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---
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drivers/ata/ahci_imx.c | 13 ++++++++++++-
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1 file changed, 12 insertions(+), 1 deletion(-)
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diff --git a/drivers/ata/ahci_imx.c b/drivers/ata/ahci_imx.c
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index 69422dc..176ca1f 100644
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--- a/drivers/ata/ahci_imx.c
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+++ b/drivers/ata/ahci_imx.c
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@@ -475,6 +475,13 @@ static const struct reg_value gpr13_rx_eq[] = {
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{ 4000, IMX6Q_GPR13_SATA_RX_EQ_VAL_4_0_DB },
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};
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+static const struct reg_value gpr13_rx_dpll[] = {
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+ { 0, IMX6Q_GPR13_SATA_RX_DPLL_MODE_1P_1F },
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+ { 1, IMX6Q_GPR13_SATA_RX_DPLL_MODE_2P_2F },
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+ { 2, IMX6Q_GPR13_SATA_RX_DPLL_MODE_1P_4F },
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+ { 3, IMX6Q_GPR13_SATA_RX_DPLL_MODE_2P_4F },
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+};
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+
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static const struct reg_property gpr13_props[] = {
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{
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.name = "fsl,transmit-level-mV",
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@@ -500,6 +507,11 @@ static const struct reg_property gpr13_props[] = {
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.name = "fsl,no-spread-spectrum",
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.def_value = IMX6Q_GPR13_SATA_MPLL_SS_EN,
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.set_value = 0,
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+ }, {
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+ .name = "fsl,receive-dpll-mode",
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+ .values = gpr13_rx_dpll,
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+ .num_values = ARRAY_SIZE(gpr13_rx_dpll),
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+ .def_value = IMX6Q_GPR13_SATA_RX_DPLL_MODE_2P_4F,
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},
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};
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@@ -603,7 +615,6 @@ static int imx_ahci_probe(struct platform_device *pdev)
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imxpriv->phy_params =
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IMX6Q_GPR13_SATA_RX_LOS_LVL_SATA2M |
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- IMX6Q_GPR13_SATA_RX_DPLL_MODE_2P_4F |
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IMX6Q_GPR13_SATA_SPD_MODE_3P0G |
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reg_value;
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}
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--
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2.5.0
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