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optee-imx: Updates for clang
Clang is on version 20 now, so the disablement of it and the patches for it are no longer needed. Signed-off-by: Tom Hochstein <tom.hochstein@nxp.com>
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04abb8bec1
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@ -17,9 +17,6 @@ OPTEE_ARCH:arm = "arm32"
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OPTEE_ARCH:aarch64 = "arm64"
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OPTEE_CORE = "${@d.getVar('OPTEE_ARCH').upper()}"
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# FIXME - breaks with Clang 18. See https://github.com/OP-TEE/optee_os/issues/6754
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TOOLCHAIN = "gcc"
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OPTEE_TOOLCHAIN = "${@d.getVar('TOOLCHAIN') or 'gcc'}"
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OPTEE_COMPILER = "${@bb.utils.contains("BBFILE_COLLECTIONS", "clang-layer", "${OPTEE_TOOLCHAIN}", "gcc", d)}"
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@ -1,245 +0,0 @@
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From ef83625c9a5f50610e25aa860c4b9c5e64723a66 Mon Sep 17 00:00:00 2001
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From: Emekcan Aras <emekcan.aras@arm.com>
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Date: Wed, 21 Dec 2022 10:55:58 +0000
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Subject: [PATCH 1/4] core: Define section attributes for clang
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Clang's attribute section is not same as gcc, here we need to add flags
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to sections so they can be eventually collected by linker into final
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output segments. Only way to do so with clang is to use
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pragma clang section ...
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The behavious is described here [1], this allows us to define names bss
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sections. This was not an issue until clang-15 where LLD linker starts
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to detect the section flags before merging them and throws the following
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errors
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| ld.lld: error: section type mismatch for .nozi.kdata_page
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| >>> /mnt/b/yoe/master/build/tmp/work/qemuarm64-yoe-linux/optee-os-tadevkit/3.17.0-r0/build/core/arch/arm/kernel/thread.o:(.nozi.kdata_page): SHT_PROGBITS
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| >>> output section .nozi: SHT_NOBITS
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| ld.lld: error: section type mismatch for .nozi.mmu.l2
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| >>> /mnt/b/yoe/master/build/tmp/work/qemuarm64-yoe-linux/optee-os-tadevkit/3.17.0-r0/build/core/arch/arm/mm/core_mmu_lpae.o:(.nozi.mmu.l2): SHT_PROGBITS
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| >>> output section .nozi: SHT_NOBITS
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These sections should be carrying SHT_NOBITS but so far it was not
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possible to do so, this patch tries to use clangs pragma to get this
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going and match the functionality with gcc.
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[1] https://intel.github.io/llvm-docs/clang/LanguageExtensions.html#specifying-section-names-for-global-objects-pragma-clang-section
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Upstream-Status: Pending
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Signed-off-by: Khem Raj <raj.khem@gmail.com>
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Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
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---
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core/arch/arm/kernel/thread.c | 19 +++++++++++++++--
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core/arch/arm/mm/core_mmu_lpae.c | 35 +++++++++++++++++++++++++++----
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core/arch/arm/mm/core_mmu_v7.c | 36 +++++++++++++++++++++++++++++---
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core/kernel/thread.c | 13 +++++++++++-
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core/mm/pgt_cache.c | 12 ++++++++++-
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5 files changed, 104 insertions(+), 11 deletions(-)
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diff --git a/core/arch/arm/kernel/thread.c b/core/arch/arm/kernel/thread.c
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index 66833b3a0..b3eb9cf9a 100644
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--- a/core/arch/arm/kernel/thread.c
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+++ b/core/arch/arm/kernel/thread.c
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@@ -45,15 +45,30 @@ static size_t thread_user_kcode_size __nex_bss;
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#if defined(CFG_CORE_UNMAP_CORE_AT_EL0) && \
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defined(CFG_CORE_WORKAROUND_SPECTRE_BP_SEC) && defined(ARM64)
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long thread_user_kdata_sp_offset __nex_bss;
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+#ifdef __clang__
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+#ifndef CFG_VIRTUALIZATION
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+#pragma clang section bss=".nozi.kdata_page"
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+#else
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+#pragma clang section bss=".nex_nozi.kdata_page"
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+#endif
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+#endif
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static uint8_t thread_user_kdata_page[
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ROUNDUP(sizeof(struct thread_core_local) * CFG_TEE_CORE_NB_CORE,
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SMALL_PAGE_SIZE)]
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__aligned(SMALL_PAGE_SIZE)
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+#ifndef __clang__
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#ifndef CFG_NS_VIRTUALIZATION
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- __section(".nozi.kdata_page");
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+ __section(".nozi.kdata_page")
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#else
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- __section(".nex_nozi.kdata_page");
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+ __section(".nex_nozi.kdata_page")
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#endif
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+#endif
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+ ;
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+#endif
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+
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+/* reset BSS section to default ( .bss ) */
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+#ifdef __clang__
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+#pragma clang section bss=""
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#endif
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#ifdef ARM32
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diff --git a/core/arch/arm/mm/core_mmu_lpae.c b/core/arch/arm/mm/core_mmu_lpae.c
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index 4c8b85e39..1885e1d3f 100644
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--- a/core/arch/arm/mm/core_mmu_lpae.c
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+++ b/core/arch/arm/mm/core_mmu_lpae.c
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@@ -234,19 +234,46 @@ typedef uint16_t l1_idx_t;
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typedef uint64_t base_xlat_tbls_t[CFG_TEE_CORE_NB_CORE][NUM_BASE_LEVEL_ENTRIES];
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typedef uint64_t xlat_tbl_t[XLAT_TABLE_ENTRIES];
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+#ifdef __clang__
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+#pragma clang section bss=".nozi.mmu.base_table"
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+#endif
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static base_xlat_tbls_t base_xlation_table[NUM_BASE_TABLES]
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__aligned(NUM_BASE_LEVEL_ENTRIES * XLAT_ENTRY_SIZE)
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- __section(".nozi.mmu.base_table");
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+#ifndef __clang__
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+ __section(".nozi.mmu.base_table")
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+#endif
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+;
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+#ifdef __clang__
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+#pragma clang section bss=""
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+#endif
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+#ifdef __clang__
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+#pragma clang section bss=".nozi.mmu.l2"
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+#endif
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static xlat_tbl_t xlat_tables[MAX_XLAT_TABLES]
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- __aligned(XLAT_TABLE_SIZE) __section(".nozi.mmu.l2");
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+ __aligned(XLAT_TABLE_SIZE)
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+#ifndef __clang__
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+ __section(".nozi.mmu.l2")
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+#endif
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+;
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+#ifdef __clang__
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+#pragma clang section bss=""
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+#endif
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#define XLAT_TABLES_SIZE (sizeof(xlat_tbl_t) * MAX_XLAT_TABLES)
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+#ifdef __clang__
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+#pragma clang section bss=".nozi.mmu.l2"
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+#endif
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/* MMU L2 table for TAs, one for each thread */
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static xlat_tbl_t xlat_tables_ul1[CFG_NUM_THREADS]
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- __aligned(XLAT_TABLE_SIZE) __section(".nozi.mmu.l2");
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-
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+#ifndef __clang__
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+ __aligned(XLAT_TABLE_SIZE) __section(".nozi.mmu.l2")
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+#endif
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+;
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+#ifdef __clang__
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+#pragma clang section bss=""
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+#endif
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/*
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* TAs page table entry inside a level 1 page table.
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*
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diff --git a/core/arch/arm/mm/core_mmu_v7.c b/core/arch/arm/mm/core_mmu_v7.c
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index 61e703da8..1960c08ca 100644
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--- a/core/arch/arm/mm/core_mmu_v7.c
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+++ b/core/arch/arm/mm/core_mmu_v7.c
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@@ -204,16 +204,46 @@ typedef uint32_t l1_xlat_tbl_t[NUM_L1_ENTRIES];
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typedef uint32_t l2_xlat_tbl_t[NUM_L2_ENTRIES];
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typedef uint32_t ul1_xlat_tbl_t[NUM_UL1_ENTRIES];
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+#ifdef __clang__
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+#pragma clang section bss=".nozi.mmu.l1"
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+#endif
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static l1_xlat_tbl_t main_mmu_l1_ttb
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- __aligned(L1_ALIGNMENT) __section(".nozi.mmu.l1");
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+ __aligned(L1_ALIGNMENT)
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+#ifndef __clang__
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+ __section(".nozi.mmu.l1")
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+#endif
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+;
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+#ifdef __clang__
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+#pragma clang section bss=""
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+#endif
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/* L2 MMU tables */
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+#ifdef __clang__
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+#pragma clang section bss=".nozi.mmu.l2"
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+#endif
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static l2_xlat_tbl_t main_mmu_l2_ttb[MAX_XLAT_TABLES]
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- __aligned(L2_ALIGNMENT) __section(".nozi.mmu.l2");
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+ __aligned(L2_ALIGNMENT)
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+#ifndef __clang__
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+ __section(".nozi.mmu.l2")
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+#endif
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+;
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+#ifdef __clang__
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+#pragma clang section bss=""
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+#endif
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/* MMU L1 table for TAs, one for each thread */
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+#ifdef __clang__
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+#pragma clang section bss=".nozi.mmu.ul1"
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+#endif
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static ul1_xlat_tbl_t main_mmu_ul1_ttb[CFG_NUM_THREADS]
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- __aligned(UL1_ALIGNMENT) __section(".nozi.mmu.ul1");
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+ __aligned(UL1_ALIGNMENT)
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+#ifndef __clang__
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+ __section(".nozi.mmu.ul1")
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+#endif
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+;
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+#ifdef __clang__
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+#pragma clang section bss=""
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+#endif
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struct mmu_partition {
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l1_xlat_tbl_t *l1_table;
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diff --git a/core/kernel/thread.c b/core/kernel/thread.c
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index 2a1f22dce..5516b6771 100644
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--- a/core/kernel/thread.c
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+++ b/core/kernel/thread.c
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@@ -39,13 +39,24 @@ static uint32_t end_canary_value = 0xababab00;
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name[stack_num][sizeof(name[stack_num]) / sizeof(uint32_t) - 1]
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#endif
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+#define DO_PRAGMA(x) _Pragma (#x)
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+
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+#ifdef __clang__
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+#define DECLARE_STACK(name, num_stacks, stack_size, linkage) \
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+DO_PRAGMA (clang section bss=".nozi_stack." #name) \
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+linkage uint32_t name[num_stacks] \
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+ [ROUNDUP(stack_size + STACK_CANARY_SIZE + STACK_CHECK_EXTRA, \
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+ STACK_ALIGNMENT) / sizeof(uint32_t)] \
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+ __attribute__((aligned(STACK_ALIGNMENT))); \
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+DO_PRAGMA(clang section bss="")
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+#else
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#define DECLARE_STACK(name, num_stacks, stack_size, linkage) \
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linkage uint32_t name[num_stacks] \
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[ROUNDUP(stack_size + STACK_CANARY_SIZE + STACK_CHECK_EXTRA, \
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STACK_ALIGNMENT) / sizeof(uint32_t)] \
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__attribute__((section(".nozi_stack." # name), \
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aligned(STACK_ALIGNMENT)))
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-
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+#endif
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#define GET_STACK(stack) ((vaddr_t)(stack) + STACK_SIZE(stack))
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DECLARE_STACK(stack_tmp, CFG_TEE_CORE_NB_CORE, STACK_TMP_SIZE,
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diff --git a/core/mm/pgt_cache.c b/core/mm/pgt_cache.c
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index 79553c6d2..b9efdf427 100644
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--- a/core/mm/pgt_cache.c
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+++ b/core/mm/pgt_cache.c
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@@ -410,8 +410,18 @@ void pgt_init(void)
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* has a large alignment, while .bss has a small alignment. The current
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* link script is optimized for small alignment in .bss
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*/
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+#ifdef __clang__
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+#pragma clang section bss=".nozi.mmu.l2"
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+#endif
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static uint8_t pgt_tables[PGT_CACHE_SIZE][PGT_SIZE]
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- __aligned(PGT_SIZE) __section(".nozi.pgt_cache");
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+ __aligned(PGT_SIZE)
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+#ifndef __clang__
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+ __section(".nozi.pgt_cache")
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+#endif
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+ ;
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+#ifdef __clang__
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+#pragma clang section bss=""
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+#endif
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size_t n;
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for (n = 0; n < ARRAY_SIZE(pgt_tables); n++) {
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--
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2.43.2
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@ -1,34 +0,0 @@
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From 2ba573c9763329fbfdfacc8393d565ab747cac4d Mon Sep 17 00:00:00 2001
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From: Brett Warren <brett.warren@arm.com>
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Date: Wed, 23 Sep 2020 09:27:34 +0100
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Subject: [PATCH 2/4] optee: enable clang support
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When compiling with clang, the LIBGCC_LOCATE_CFLAG variable used
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to provide a sysroot wasn't included, which results in not locating
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compiler-rt. This is mitigated by including the variable as ammended.
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Upstream-Status: Pending
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ChangeId: 8ba69a4b2eb8ebaa047cb266c9aa6c2c3da45701
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Signed-off-by: Brett Warren <brett.warren@arm.com>
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Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
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---
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mk/clang.mk | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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diff --git a/mk/clang.mk b/mk/clang.mk
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index a045beee8..1ebe2f702 100644
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--- a/mk/clang.mk
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+++ b/mk/clang.mk
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@@ -30,7 +30,7 @@ comp-cflags-warns-clang := -Wno-language-extension-token \
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# Note, use the compiler runtime library (libclang_rt.builtins.*.a) instead of
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# libgcc for clang
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-libgcc$(sm) := $(shell $(CC$(sm)) $(CFLAGS$(arch-bits-$(sm))) \
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+libgcc$(sm) := $(shell $(CC$(sm)) $(LIBGCC_LOCATE_CFLAGS) $(CFLAGS$(arch-bits-$(sm))) \
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-rtlib=compiler-rt -print-libgcc-file-name 2> /dev/null)
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# Core ASLR relies on the executable being ready to run from its preferred load
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--
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2.43.2
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@ -2,9 +2,5 @@
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require optee-os-fslc-imx.inc
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SRC_URI += " \
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file://0001-core-Define-section-attributes-for-clang.patch \
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file://0002-optee-enable-clang-support.patch \
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"
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SRCBRANCH = "lf-6.6.52_2.2.0"
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SRCREV = "60beb308810f9561a67fdb435388a64c85eb6dcb"
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