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intel-media-driver: upgrade 24.4.4 -> 25.1.4
Drop list of patches already merged - 0001-Change-RGB-mask-and-order-for-BMG.patch Release notes: https://github.com/intel/media-driver/releases/tag/intel-media-25.1.4 Signed-off-by: Lim Siew Hoon <siew.hoon.lim@intel.com> Signed-off-by: Anuj Mittal <anuj.mittal@intel.com>
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@ -1,45 +0,0 @@
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From 8e7b263729bec520cf830cbf85216c2d6466421d Mon Sep 17 00:00:00 2001
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From: "Hoe, Sheng Yang" <sheng.yang.hoe@intel.com>
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Date: Fri, 22 Nov 2024 10:11:14 +0000
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Subject: [PATCH] Change RGB mask and order for BMG
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Upstream-Status: Submitted [https://github.com/intel/media-driver/pull/1884]
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Signed-off-by: Hoe, Sheng Yang <sheng.yang.hoe@intel.com>
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---
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.../ddi/capstable_data_image_format_definition.h | 11 ++++++-----
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1 file changed, 6 insertions(+), 5 deletions(-)
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diff --git a/media_softlet/linux/common/ddi/capstable_data_image_format_definition.h b/media_softlet/linux/common/ddi/capstable_data_image_format_definition.h
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index af28653a5..ec99164ce 100644
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--- a/media_softlet/linux/common/ddi/capstable_data_image_format_definition.h
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+++ b/media_softlet/linux/common/ddi/capstable_data_image_format_definition.h
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@@ -29,13 +29,14 @@
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#include "va/va.h"
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-static VAImageFormat formatBGRA = {VA_FOURCC_BGRA, VA_LSB_FIRST, 32, 32, 0x0000ff00, 0x00ff0000, 0xff000000, 0x000000ff }; /* [31:0] B:G:R:A 8:8:8:8 little endian */
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+// "VA_LSB_FIRST" is to identify how following bit masks mapped to address instead of char order in VA_FOURCC_RGBA naming.
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+static VAImageFormat formatBGRA = {VA_FOURCC_BGRA, VA_LSB_FIRST, 32, 32, 0x00ff0000, 0x0000ff00, 0x000000ff, 0xff000000}; /* [31:0] A:R:G:B 8:8:8:8 little endian */
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static VAImageFormat formatARGB = {VA_FOURCC_ARGB, VA_LSB_FIRST, 32, 32, 0x00ff0000, 0x0000ff00, 0x000000ff, 0xff000000 }; /* [31:0] A:R:G:B 8:8:8:8 little endian */
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-static VAImageFormat formatRGBA = {VA_FOURCC_RGBA, VA_LSB_FIRST, 32, 32, 0xff000000, 0x00ff0000, 0x0000ff00, 0x000000ff }; /* [31:0] R:G:B:A 8:8:8:8 little endian */
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+static VAImageFormat formatRGBA = {VA_FOURCC_RGBA, VA_LSB_FIRST, 32, 32, 0x000000ff, 0x0000ff00, 0x00ff0000, 0xff000000}; /* [31:0] A:B:G:R 8:8:8:8 little endian */
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static VAImageFormat formatABGR = {VA_FOURCC_ABGR, VA_LSB_FIRST, 32, 32, 0x000000ff, 0x0000ff00, 0x00ff0000, 0xff000000 }; /* [31:0] A:B:G:R 8:8:8:8 little endian */
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-static VAImageFormat formatBGRX = {VA_FOURCC_BGRX, VA_LSB_FIRST, 32, 24, 0x0000ff00, 0x00ff0000, 0xff000000, 0 }; /* [31:0] B:G:R:x 8:8:8:8 little endian */
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+static VAImageFormat formatBGRX = {VA_FOURCC_BGRX, VA_LSB_FIRST, 32, 24, 0x00ff0000, 0x0000ff00, 0x000000ff, 0}; /* [31:0] X:R:G:B 8:8:8:8 little endian */
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static VAImageFormat formatXRGB = {VA_FOURCC_XRGB, VA_LSB_FIRST, 32, 24, 0x00ff0000, 0x0000ff00, 0x000000ff, 0 }; /* [31:0] x:R:G:B 8:8:8:8 little endian */
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-static VAImageFormat formatRGBX = {VA_FOURCC_RGBX, VA_LSB_FIRST, 32, 24, 0xff000000, 0x00ff0000, 0x0000ff00, 0 }; /* [31:0] R:G:B:x 8:8:8:8 little endian */
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+static VAImageFormat formatRGBX = {VA_FOURCC_RGBX, VA_LSB_FIRST, 32, 24, 0x000000ff, 0x0000ff00, 0x00ff0000, 0}; /* [31:0] X:B:G:R 8:8:8:8 little endian */
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static VAImageFormat formatXBGR = {VA_FOURCC_XBGR, VA_LSB_FIRST, 32, 24, 0x000000ff, 0x0000ff00, 0x00ff0000, 0 }; /* [31:0] x:B:G:R 8:8:8:8 little endian */
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static VAImageFormat formatA2R10G10B10 = {VA_FOURCC_A2R10G10B10, VA_LSB_FIRST, 32, 30, 0x3ff00000, 0x000ffc00, 0x000003ff, 0x30000000 }; /* [31:0] A:R:G:B 2:10:10:10 little endian */
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static VAImageFormat formatA2B10G10R10 = {VA_FOURCC_A2B10G10R10, VA_LSB_FIRST, 32, 30, 0x000003ff, 0x000ffc00, 0x3ff00000, 0x30000000 }; /* [31:0] A:B:G:R 2:10:10:10 little endian */
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@@ -70,4 +71,4 @@ static VAImageFormat formatY416 = {VA_FOURCC_Y416, VA_LSB_FIRST,
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static VAImageFormat formatRGBP = {VA_FOURCC_RGBP, VA_LSB_FIRST, 24, 24,0,0,0,0};
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static VAImageFormat formatBGRP = {VA_FOURCC_BGRP, VA_LSB_FIRST, 24, 24,0,0,0,0};
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-#endif //__CAPSTABLE_DATA_IMAGE_FORMAT_DEFINITION_H__
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\ No newline at end of file
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+#endif //__CAPSTABLE_DATA_IMAGE_FORMAT_DEFINITION_H__
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--
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2.34.1
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@ -1,7 +1,7 @@
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From f318522175fb2ecc6d364b995a7b1926fd158a88 Mon Sep 17 00:00:00 2001
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From 6132115dd2f1db55a6a5371618247dfaa334a035 Mon Sep 17 00:00:00 2001
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From: Lim Siew Hoon <siew.hoon.lim@intel.com>
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Date: Wed, 11 Oct 2023 15:36:21 +0800
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Subject: [PATCH] Force ARGB surface to tile4 for ACM
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Subject: [PATCH 3/7] Force ARGB surface to tile4 for ACM
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Upstream-Status: Submitted [https://github.com/intel/media-driver/pull/1728]
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@ -40,5 +40,5 @@ index a4e12edfa..11634f66e 100755
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case TILING_X:
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gmmParams.Flags.Info.TiledX = true;
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--
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2.43.2
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2.43.0
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@ -1,8 +1,8 @@
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From 38e6883e54e65a73aa7795dc2ff9f072448cb3dc Mon Sep 17 00:00:00 2001
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From a32b95e58fd3e34847e799b909e08dbe5c9dc692 Mon Sep 17 00:00:00 2001
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From: Lim Siew Hoon <siew.hoon.lim@intel.com>
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Date: Fri, 2 Aug 2024 13:25:13 +0800
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Subject: [PATCH] Fix failed 4k videowalll test case and color corruption of
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video composition in Gen12 platform
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Subject: [PATCH 4/7] Fix failed 4k videowalll test case and color corruption
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of video composition in Gen12 platform
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Fix failed 4k video wall test case from 16CH video only show
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1CH output and corruption observed on certain number of video
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@ -81,5 +81,5 @@ index 48a452315..4f0fc2c48 100644
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{
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MOS_FreeMemAndSetNull(pVpHalRenderParams->pColorFillParams);
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--
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2.43.2
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2.43.0
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@ -19,12 +19,11 @@ REQUIRED_DISTRO_FEATURES = "opengl"
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DEPENDS += "libva gmmlib"
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SRC_URI = "git://github.com/intel/media-driver.git;protocol=https;nobranch=1 \
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file://0001-Force-ARGB-surface-to-tile4-for-ACM.patch \
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file://0001-Fix-failed-4k-videowalll-test-case-and-color-corrupt.patch \
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file://0001-Change-RGB-mask-and-order-for-BMG.patch \
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file://0003-Force-ARGB-surface-to-tile4-for-ACM.patch \
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file://0004-Fix-failed-4k-videowalll-test-case-and-color-corrupt.patch \
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"
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SRCREV = "d3c30f6dddb43bd7b1b0a4d38a0d0ba47dda5726"
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SRCREV = "14e2e7bcf1014186dbf1c099089c7c05cd880ae8"
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S = "${WORKDIR}/git"
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COMPATIBLE_HOST:x86-x32 = "null"
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