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https://github.com/openembedded/meta-openembedded.git
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42 lines
1.7 KiB
Diff
42 lines
1.7 KiB
Diff
From 0b1ba174bd5148c0675b335fcebde767a56e10bb Mon Sep 17 00:00:00 2001
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From: Ruiqiang Hao <Ruiqiang.Hao@windriver.com>
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Date: Mon, 2 Dec 2024 02:18:46 +0000
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Subject: [PATCH] Ensure compatibility with ARMv9 by updating .arch directive
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The pmem_cvap() function currently uses the '.arch armv8.2-a' directive
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for the 'dc cvap' instruction. This will cause build errors below when
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compiling for ARMv9 systems. Update the '.arch' directive to 'armv9.4-a'
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to ensure compatibility with ARMv9 architectures.
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{standard input}: Assembler messages:
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{standard input}:169: Error: selected processor does not support `retaa'
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{standard input}:286: Error: selected processor does not support `retaa'
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make[2]: *** [storage/innobase/CMakeFiles/innobase_embedded.dir/build.make:
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1644: storage/innobase/CMakeFiles/innobase_embedded.dir/sync/cache.cc.o]
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Error 1
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Upstream-Status: Submitted
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Signed-off-by: Ruiqiang Hao <Ruiqiang.Hao@windriver.com>
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---
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storage/innobase/sync/cache.cc | 5 +++++
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1 file changed, 5 insertions(+)
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diff --git a/storage/innobase/sync/cache.cc b/storage/innobase/sync/cache.cc
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index 43d642d0..c5e67709 100644
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--- a/storage/innobase/sync/cache.cc
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+++ b/storage/innobase/sync/cache.cc
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@@ -82,7 +82,12 @@ static void pmem_cvap(const void* buf, size_t size)
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for (uintptr_t u= uintptr_t(buf) & ~(CPU_LEVEL1_DCACHE_LINESIZE),
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end= uintptr_t(buf) + size;
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u < end; u+= CPU_LEVEL1_DCACHE_LINESIZE)
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+#if defined __ARM_ARCH && __ARM_ARCH == 9
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+ __asm__ __volatile__(".arch armv9.4-a\n dc cvap, %0" :: "r"(u) : "memory");
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+#else
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__asm__ __volatile__(".arch armv8.2-a\n dc cvap, %0" :: "r"(u) : "memory");
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+#endif
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+
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__asm__ __volatile__("dmb ishst" ::: "memory");
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}
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