rock-pi-e: apply upstream PHY fix

This patch was submitted to the U-Boot mailing list to fix an issue
initializing the PHY on the rock-pi-e.

Signed-off-by: Trevor Woerner <twoerner@gmail.com>

recipes-bsp/u-boot/files/PATCH_1-2_net_designware_Reset_eth_phy_before_phy_connect.patch

@@ -0,0 +1,83 @@
+From: Jonas Karlman <jonas@kwiboo.se>
+To: Kever Yang <kever.yang@rock-chips.com>, Ramon Fried
+ <rfried.dev@gmail.com>, Joe Hershberger <joe.hershberger@ni.com>, Simon
+ Glass <sjg@chromium.org>, Banglang Huang <banglang.huang@foxmail.com>
+Cc: Trevor Woerner <twoerner@gmail.com>, u-boot@lists.denx.de, Jonas
+ Karlman <jonas@kwiboo.se>
+Subject: [PATCH 1/2] net: designware: Reset eth phy before phy connect
+Date: Thu, 18 Jan 2024 07:19:45 +0000
+Message-ID: <20240118071949.927089-2-jonas@kwiboo.se>
+X-Mailer: git-send-email 2.43.0
+In-Reply-To: <20240118071949.927089-1-jonas@kwiboo.se>
+References: <20240118071949.927089-1-jonas@kwiboo.se>
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+
+Some ethernet PHY require being reset before a phy-id can be read back
+on the MDIO bus. This can result in the following message being show
+on e.g. a Radxa ROCK Pi E v1.21 with a RTL8211F ethernet PHY.
+
+  Could not get PHY for ethernet@ff540000: addr -1
+
+Add support to designware ethernet driver to reset eth phy by calling
+the eth phy uclass function eth_phy_set_mdio_bus(). The call use NULL
+as bus parameter to not set a shared mdio bus reference that would be
+freed when probe fails. Also add a eth_phy_get_addr() call to try and
+get the phy addr from DT when DM_MDIO is disabled.
+
+This help fix ethernet on Radxa ROCK Pi E v1.21:
+
+  => mdio list
+  ethernet@ff540000:
+  1 - RealTek RTL8211F <--> ethernet@ff540000
+
+Upstream-Status: Submitted
+Reported-by: Trevor Woerner <twoerner@gmail.com>
+Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
+---
+ drivers/net/designware.c | 7 +++++++
+ 1 file changed, 7 insertions(+)
+
+diff --git a/drivers/net/designware.c b/drivers/net/designware.c
+index a174344b3ef5..9aa5d8a1409e 100644
+--- a/drivers/net/designware.c
++++ b/drivers/net/designware.c
+@@ -13,6 +13,7 @@
+ #include <cpu_func.h>
+ #include <dm.h>
+ #include <errno.h>
++#include <eth_phy.h>
+ #include <log.h>
+ #include <miiphy.h>
+ #include <malloc.h>
+@@ -576,6 +577,9 @@ static int dw_phy_init(struct dw_eth_dev *priv, void *dev)
+ 	struct phy_device *phydev;
+ 	int ret;
+ 
++	if (IS_ENABLED(CONFIG_DM_ETH_PHY))
++		eth_phy_set_mdio_bus(dev, NULL);
++
+ #if IS_ENABLED(CONFIG_DM_MDIO)
+ 	phydev = dm_eth_phy_connect(dev);
+ 	if (!phydev)
+@@ -583,6 +587,9 @@ static int dw_phy_init(struct dw_eth_dev *priv, void *dev)
+ #else
+ 	int phy_addr = -1;
+ 
++	if (IS_ENABLED(CONFIG_DM_ETH_PHY))
++		phy_addr = eth_phy_get_addr(dev);
++
+ #ifdef CONFIG_PHY_ADDR
+ 	phy_addr = CONFIG_PHY_ADDR;
+ #endif
+-- 
+2.43.0
+
+

recipes-bsp/u-boot/files/PATCH_2-2_rockchip_rk3328-rock-pi-e_Enable_DM_ETH_PHY_and_PHY_REALTEK.patch

@@ -0,0 +1,65 @@
+From: Jonas Karlman <jonas@kwiboo.se>
+To: Kever Yang <kever.yang@rock-chips.com>, Ramon Fried
+ <rfried.dev@gmail.com>, Joe Hershberger <joe.hershberger@ni.com>, Simon
+ Glass <sjg@chromium.org>, Banglang Huang <banglang.huang@foxmail.com>
+Cc: Trevor Woerner <twoerner@gmail.com>, u-boot@lists.denx.de, Jonas
+ Karlman <jonas@kwiboo.se>
+Subject: [PATCH 2/2] rockchip: rk3328-rock-pi-e: Enable DM_ETH_PHY and PHY_REALTEK
+Date: Thu, 18 Jan 2024 07:19:46 +0000
+Message-ID: <20240118071949.927089-3-jonas@kwiboo.se>
+X-Mailer: git-send-email 2.43.0
+In-Reply-To: <20240118071949.927089-1-jonas@kwiboo.se>
+References: <20240118071949.927089-1-jonas@kwiboo.se>
+MIME-Version: 1.0
+Content-Transfer-Encoding: 8bit
+X-Report-Abuse-To: abuse@forwardemail.net
+X-Report-Abuse: abuse@forwardemail.net
+X-Complaints-To: abuse@forwardemail.net
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+ 149.28.215.223
+X-ForwardEmail-ID: 65a8d121d66eecd94fbb6928
+
+Enable the DM_ETH_PHY and PHY_REALTEK now that the designware ethernet
+driver call eth_phy_set_mdio_bus() to assist with resetting the eth PHY
+during probe.
+
+Fixes ethernet on the v1.21 hw revision of Radxa ROCK Pi E:
+
+  => mdio list
+  ethernet@ff540000:
+  1 - RealTek RTL8211F <--> ethernet@ff540000
+  => net list
+  eth0 : ethernet@ff540000 86:e0:c0:ea:fa:a9 active
+  eth1 : ethernet@ff550000 86:e0:c0:ea:fa:a8
+  => dhcp
+  Speed: 1000, full duplex
+  BOOTP broadcast 1
+  BOOTP broadcast 2
+  BOOTP broadcast 3
+  DHCP client bound to address 192.168.1.114 (1004 ms)
+
+Upstream-Status: Submitted
+Reported-by: Trevor Woerner <twoerner@gmail.com>
+Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
+---
+ configs/rock-pi-e-rk3328_defconfig | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/configs/rock-pi-e-rk3328_defconfig b/configs/rock-pi-e-rk3328_defconfig
+index c0375beffec3..6dda900a9b42 100644
+--- a/configs/rock-pi-e-rk3328_defconfig
++++ b/configs/rock-pi-e-rk3328_defconfig
+@@ -76,6 +76,8 @@ CONFIG_SYS_I2C_ROCKCHIP=y
+ CONFIG_MISC=y
+ CONFIG_MMC_DW=y
+ CONFIG_MMC_DW_ROCKCHIP=y
++CONFIG_PHY_REALTEK=y
++CONFIG_DM_ETH_PHY=y
+ CONFIG_ETH_DESIGNWARE=y
+ CONFIG_GMAC_ROCKCHIP=y
+ CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+-- 
+2.43.0
+
+

recipes-bsp/u-boot/u-boot%.bbappend

@@ -1,3 +1,9 @@
+FILESEXTRAPATHS:prepend := "${THISDIR}/files:"
+SRC_URI += " \
+	file://PATCH_1-2_net_designware_Reset_eth_phy_before_phy_connect.patch \
+	file://PATCH_2-2_rockchip_rk3328-rock-pi-e_Enable_DM_ETH_PHY_and_PHY_REALTEK.patch \
+	"
+
 # various machines require the pyelftools library for parsing dtb files
 DEPENDS:append = " python3-pyelftools-native"
 DEPENDS:append:rk3308 = " u-boot-tools-native"