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22d34ac570
Rockchip provides a tool to customize the DDR bin blob which can prove to be extremely useful, for example if your HW doesn't follow the HW reference design and uses a different UART controller or UART mux for the serial console, or use a different baudrate. If RKBIN_DDR_RECONFIGURE is set to 1 for a machine, a ddrbin_params.txt needs to be provided for said machine and ddrbin_tool.py will be run against it to generate a new custom binary with the desired config. Note that future implementations may allow to provide configuration through a different mechanism than a simple and difficult to maintain/modify file. E.g. this doesn't really work well when one wants to have this in sync with SERIAL_CONSOLES for example. But that may be much harder to support as the serial controller index in SERIAL_CONSOLES does not necessarily match the hardware index expected by ddrbin_params.txt. It also doesn't provide the UART mux. In any case, I believe this is a decent start at allowing customization of the DDR bin blob without having to provide a blob directly in-tree. Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
88 lines
3.5 KiB
BlitzBasic
88 lines
3.5 KiB
BlitzBasic
DESCRIPTION = "Rockchip Firmware for DDR init (TPL in U-Boot terms)"
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require rockchip-rkbin.inc
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DDRBIN_DIR:rk3308 ?= "bin/rk33/"
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DDRBIN_VERS:rk3308 ?= "v2.10"
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DDRBIN_FILE:rk3308 ?= "rk3308_ddr_589MHz_uart4_m0_${DDRBIN_VERS}.bin"
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DDRBIN_DEPLOY_FILENAME:rk3308 ?= "ddr-rk3308.bin"
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DDRBIN_TOOL_SOC:rk3308 ?= "rk3308"
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do_deploy:rk3308() {
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# Prebuilt U-Boot TPL (DDR init)
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install -m 644 ${S}/${DDRBIN_DIR}${DDRBIN_FILE} ${DEPLOYDIR}/${DDRBIN_DEPLOY_FILENAME}
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}
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DDRBIN_DIR:rk3566 ?= "bin/rk35/"
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DDRBIN_VERS:rk3566 ?= "v1.23"
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DDRBIN_FILE:rk3566 ?= "rk3566_ddr_1056MHz_${DDRBIN_VERS}.bin"
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DDRBIN_DEPLOY_FILENAME:rk3566 ?= "ddr-rk3566.bin"
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DDRBIN_TOOL_SOC:rk3566 ?= "rk356x"
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do_deploy:rk3566() {
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# Prebuilt U-Boot TPL (DDR init)
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install -m 644 ${S}/${DDRBIN_DIR}${DDRBIN_FILE} ${DEPLOYDIR}/${DDRBIN_DEPLOY_FILENAME}
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}
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DDRBIN_DIR:rk3568 ?= "bin/rk35/"
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DDRBIN_VERS:rk3568 ?= "v1.23"
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DDRBIN_FILE:rk3568 ?= "rk3568_ddr_1560MHz_${DDRBIN_VERS}.bin"
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DDRBIN_DEPLOY_FILENAME:rk3568 ?= "ddr-rk3568.bin"
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DDRBIN_TOOL_SOC:rk3568 ?= "rk356x"
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do_deploy:rk3568() {
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# Prebuilt U-Boot TPL (DDR init)
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install -m 644 ${S}/${DDRBIN_DIR}${DDRBIN_FILE} ${DEPLOYDIR}/${DDRBIN_DEPLOY_FILENAME}
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}
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DDRBIN_DIR:rk3588s ?= "bin/rk35/"
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DDRBIN_VERS:rk3588s ?= "v1.18"
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DDRBIN_FILE:rk3588s ?= "rk3588_ddr_lp4_2112MHz_lp5_2400MHz_${DDRBIN_VERS}.bin"
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DDRBIN_DEPLOY_FILENAME:rk3588s ?= "ddr-rk3588.bin"
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DDRBIN_TOOL_SOC:rk3588s ?= "rk3588"
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do_deploy:rk3588s() {
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# Prebuilt U-Boot TPL (DDR init)
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install -m 644 ${S}/${DDRBIN_DIR}${DDRBIN_FILE} ${DEPLOYDIR}/${DDRBIN_DEPLOY_FILENAME}
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}
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# The following is only required if DDR bin blob needs to be modified
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# (e.g. different UART controller, UART mux, or baudrate)
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# RKBIN_DDR_RECONFIGURE = "1" if it needs to be modified, all below logic needs to
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# depend on that value be 1, and not run if 0.
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RKBIN_DDR_RECONFIGURE ?= "0"
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# The tool (ddrbin_tool.py) for modifying the DDR bin is from rockchip-rkbin-native...
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DEPENDS += "${@'rockchip-rkbin-native' if d.getVar('RKBIN_DDR_RECONFIGURE') == '1' else ''}"
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# ... and it expects a file as input, which is named ddrbin_param.txt in the tree.
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SRC_URI += "${@'file://ddrbin_param.txt' if d.getVar('RKBIN_DDR_RECONFIGURE') == '1' else ''}"
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python __anonymous() {
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# Because rockchip-rkbin.inc inherits bin_package and we need to run some step before
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# the install task re-enable do_configure task.
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# We could use
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# do_configure[noexec] = "${@'0' if d.getVar('RKBIN_DDR_RECONFIGURE') == '1' else '1'}"
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# but this spams the console with deprecation warnings, see
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# https://bugzilla.yoctoproject.org/show_bug.cgi?id=13808
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if d.getVar('RKBIN_DDR_RECONFIGURE') == '1':
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d.delVarFlag("do_configure", "noexec")
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}
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do_configure() {
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if [ "${RKBIN_DDR_RECONFIGURE}" = "1" ]; then
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# ddrbin_tool.py always modifies a date in the DDR blob, based on current time.
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# This is bad for reproducibility and hashequiv usage, so use the commit author
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# date of the last change made to the DDR bin.
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# DATE must be max 17-character long!
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RKBIN_DDR_DATE=$(git log --pretty=format:"%ad" --date=format:"%Y%m%d-%H:%M:%S" -1 -- ${S}/${DDRBIN_DIR}${DDRBIN_FILE})
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# DDRBIN_TOOL_SOC is mostly useless except for rk3528 for now. It needs to match one string in the global
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# chip_list array in ddrbin_tool.py.
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if [ -z "${DDRBIN_TOOL_SOC}" ]; then
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bbfatal "Non-empty DDRBIN_TOOL_SOC:<MACHINE> required!"
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fi
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# Modify blob with appropriate settings stored in ddrbin_params.txt
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ddrbin_tool.py ${DDRBIN_TOOL_SOC} ${UNPACKDIR}/ddrbin_param.txt ${S}/${DDRBIN_DIR}${DDRBIN_FILE} --verinfo_editable "${RKBIN_DDR_DATE}"
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fi
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}
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