baremetal-helloworld: Enable RISC-V 32 port

$ runqemu nographic
runqemu - INFO - Running bitbake -e ...
KERNEL: [tmp/deploy/images/qemuriscv32/baremetal-helloworld-image-qemuriscv32.bin]
MACHINE: [qemuriscv32]
runqemu - INFO - Running tmp/work/x86_64-linux/qemu-helper-native/1.0-r1/recipe-sysroot-native/usr/bin/qemu-system-riscv32

Hello OpenEmbedded on RISC-V 32!

(From OE-Core rev: d4cca7471f2167b56347fa7b1364bb84a200b1f5)

Signed-off-by: Alejandro Enedino Hernandez Samaniego <alejandro@enedino.org>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
This commit is contained in:
Alejandro Hernandez Samaniego 2021-08-07 22:14:51 -06:00 committed by Richard Purdie
parent 8ae0ee62ca
commit 650b720f19
2 changed files with 6 additions and 2 deletions

View File

@ -4,7 +4,7 @@ DESCRIPTION = "These are introductory examples to showcase the use of QEMU to ru
LICENSE = "MIT"
LIC_FILES_CHKSUM = "file://LICENSE;md5=39346640a23c701e4f459e05f56f4449"
SRCREV = "0bf9ea216e6f76be50726a3a74e527b7bbb0ad93"
SRCREV = "31b4e5a337018b4a00a7426b0e5ed83b81df30c7"
PV = "0.1+git${SRCPV}"
SRC_URI = "git://github.com/aehs29/baremetal-helloqemu.git;protocol=https;branch=master"
@ -28,13 +28,14 @@ inherit baremetal-image
# machine that QEMU uses on OE, e.g. -machine virt -cpu cortex-a57
# but the examples can also be run on other architectures/machines
# such as vexpress-a15 by overriding the setting on the machine.conf
COMPATIBLE_MACHINE = "qemuarmv5|qemuarm|qemuarm64|qemuriscv64"
COMPATIBLE_MACHINE = "qemuarmv5|qemuarm|qemuarm64|qemuriscv64|qemuriscv32"
BAREMETAL_QEMUARCH ?= ""
BAREMETAL_QEMUARCH:qemuarmv5 = "versatile"
BAREMETAL_QEMUARCH:qemuarm = "arm"
BAREMETAL_QEMUARCH:qemuarm64 = "aarch64"
BAREMETAL_QEMUARCH:qemuriscv64 = "riscv64"
BAREMETAL_QEMUARCH:qemuriscv32 = "riscv32"
EXTRA_OEMAKE:append = " QEMUARCH=${BAREMETAL_QEMUARCH} V=1"

View File

@ -82,12 +82,15 @@ QB_OPT_APPEND:append = " -nographic"
# RISC-V tunes set the BIOS, unset, and instruct QEMU to
# ignore the BIOS and boot from -kernel
QB_DEFAULT_BIOS:qemuriscv64 = ""
QB_DEFAULT_BIOS:qemuriscv32 = ""
QB_OPT_APPEND:append:qemuriscv64 = " -bios none"
QB_OPT_APPEND:append:qemuriscv32 = " -bios none"
# Use the medium-any code model for the RISC-V 64 bit implementation,
# since medlow can only access addresses below 0x80000000 and RAM
# starts at 0x80000000 on RISC-V 64
# Keep RISC-V 32 using -mcmodel=medlow (symbols lie between -2GB:2GB)
CFLAGS:append:qemuriscv64 = " -mcmodel=medany"