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633b403b6d
(From OE-Core rev: 6b9f2e078fb5653a1cedd64e90459e2f0780eb7e) Signed-off-by: Alexander Kanavin <alex@linutronix.de> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
51 lines
1.8 KiB
Diff
51 lines
1.8 KiB
Diff
From eb6d6579150bf4684603ce377c51e90ad3bb8109 Mon Sep 17 00:00:00 2001
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From: Khem Raj <raj.khem@gmail.com>
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Date: Sun, 15 Nov 2020 15:32:39 -0800
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Subject: [PATCH] numpy/core: Define RISCV-32 support
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Helps compile on riscv32
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Upstream-Status: Submitted [https://github.com/numpy/numpy/pull/17780]
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Signed-off-by: Khem Raj <raj.khem@gmail.com>
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---
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numpy/core/include/numpy/npy_cpu.h | 3 +++
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numpy/core/include/numpy/npy_endian.h | 1 +
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2 files changed, 4 insertions(+)
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diff --git a/numpy/core/include/numpy/npy_cpu.h b/numpy/core/include/numpy/npy_cpu.h
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index 78d229e..04be511 100644
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--- a/numpy/core/include/numpy/npy_cpu.h
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+++ b/numpy/core/include/numpy/npy_cpu.h
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@@ -19,6 +19,7 @@
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* NPY_CPU_ARCEB
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* NPY_CPU_RISCV64
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* NPY_CPU_LOONGARCH
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+ * NPY_CPU_RISCV32
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* NPY_CPU_WASM
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*/
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#ifndef NUMPY_CORE_INCLUDE_NUMPY_NPY_CPU_H_
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@@ -104,6 +105,8 @@
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#define NPY_CPU_ARCEB
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#elif defined(__riscv) && defined(__riscv_xlen) && __riscv_xlen == 64
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#define NPY_CPU_RISCV64
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+#elif defined(__riscv) && defined(__riscv_xlen) && __riscv_xlen == 32
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+ #define NPY_CPU_RISCV32
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#elif defined(__loongarch__)
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#define NPY_CPU_LOONGARCH
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#elif defined(__EMSCRIPTEN__)
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diff --git a/numpy/core/include/numpy/npy_endian.h b/numpy/core/include/numpy/npy_endian.h
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index 5e58a7f..0926212 100644
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--- a/numpy/core/include/numpy/npy_endian.h
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+++ b/numpy/core/include/numpy/npy_endian.h
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@@ -49,6 +49,7 @@
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|| defined(NPY_CPU_PPC64LE) \
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|| defined(NPY_CPU_ARCEL) \
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|| defined(NPY_CPU_RISCV64) \
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+ || defined(NPY_CPU_RISCV32) \
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|| defined(NPY_CPU_LOONGARCH) \
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|| defined(NPY_CPU_WASM)
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#define NPY_BYTE_ORDER NPY_LITTLE_ENDIAN
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--
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2.20.1
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