Commit Graph

6448 Commits

Author SHA1 Message Date
Jason Liu
f1bcbacde1 This is the 6.6.52 stable release
-----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEEZH8oZUiU471FcZm+ONu9yGCSaT4FAmbrDMgACgkQONu9yGCS
 aT68BA/7BBhU3hpHgh4SXEZyUDoz2dh/OTh3ycwz3KoXHZUrxhVN+skyZ2rFzAZs
 myBwKACF7FBxsNx/XT3257AlgOGjsUHn6aDklQ99Km/f7NQ4ueZb1GA0YGS2CraZ
 NfzpnR07fb6ydI7CF7xh9eCEe+k6pMOYlDe5xy82xZTAOk3LyY6TZBcydzfgjp3g
 oO0wObgVN/veFosqBmKnTQ8L8+YgRt8z29Y0aew6ay2y8xFDamcvD4qcX0Ys6c5z
 nozTDmZmIzI6457PMyqjSQ+80WxQEV5482w8e+fKVrLPeDzVINMPv2Jidz6E57Yr
 8kuwUBJFlh3dFtjTU4wCa95mztezLEqm02iw+8TnjoJZcIWrl6MuHHNIqzznEvwn
 CMdM5IoSLTkseQNwZZL5G6hBOIQGde+onUCA4+1QYcxKbP3AYjfg9RhEvs7RrW7A
 7bwS/EUnAvXwM6ULSit0GQE1KanK67dKuTNa3AJJamRELQLH0PlWNw8a5bQdBzUf
 emPIloMVbi6SALJrSwe3IARAHdi4TiavM4eHPeZK2oQn1p3PRDfOD2/KN0RsUq9P
 o2ORcGyUYuQQzhxur2Y6FBFljDczVMnro6QfVeXPjk33qEDYnKP7GT0gvgSFJ+r5
 FH6z8JZVvduPgX8Kn/ZbLih4um/R1xEd+a8fQijzVMAu/C/YjBc=
 =l9D8
 -----END PGP SIGNATURE-----

Merge tag 'v6.6.52' into lf-6.6.y

This is the 6.6.52 stable release

* tag 'v6.6.52': (90 commits)
  Linux 6.6.52
  riscv: dts: starfive: add assigned-clock* to limit frquency
  ASoC: meson: axg-card: fix 'use-after-free'
  ...
2024-09-24 11:50:01 +08:00
Jason Liu
239f62168d This is the 6.6.51 stable release
-----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEEZH8oZUiU471FcZm+ONu9yGCSaT4FAmbisF0ACgkQONu9yGCS
 aT5Y8xAAqS/rmrC+/qlFvbtAqK+KXLq9BIGvDHW2QHfCyMpSZ6isehVhh64apHE/
 /XvJ6a+2iPVp5o52iDTUKzbcDr3Jx/QwhS8Xa/HyQQy1rXIPpJNJb8Vuvkn/B2Cq
 cPCfTtfPZUUQTd09uAdBhy5NT8hsT2kSVpmSXDnahn9ih8k0tR40udw5Qf7xpWcf
 HqljbfonLP86mF/SB9m+VhDGF9fekujyb+0iS0OPE+TdvSjKB9ySoeL4PIeTSxrz
 goZdp9ygAYy8Bks825ztbfQszqIwceHU/xZRaUrGfOOk4A5kwTmbdUQu7ooMc+5F
 kbpifbewmY1UGn2KTxgj59xCjQ7HLQe+sqacy0/gALzRSajUNyjLn0n4w3UqaJWb
 pf+gwqHBLgDRfvWctggEdY2ApKgOlM9D7TTpWWB9uv1oR/g3PGfgehZgrMMPgPUw
 EZ8JiwnITfRaRFiH/vSR3aJKRj6qjb4mX3/U8HgGcACtyFfHgtuI7jzhnX36fRNO
 FG38bxSUMrJnlohghfBl6zyaruZBMHVaoQzs6MYZ7qrVvCbt3CHivJdaQ85nw0h7
 YHa2zYFfT0ztyaSMzWq6JatgI7BZfd8PjobhbRZADBBD39KC8aL8XLoDPnpzWMUY
 UDlK8n96gOKo0t8ILDWcIisCVGNogcHJlGppC8Fu7ZyKzYsMhN4=
 =OEL/
 -----END PGP SIGNATURE-----

Merge tag 'v6.6.51' into lf-6.6.y

This is the 6.6.51 stable release

* tag 'v6.6.51': (2369 commits)
  Linux 6.6.51
  Bluetooth: hci_sync: Fix UAF on hci_abort_conn_sync
  Bluetooth: hci_sync: Fix UAF on create_le_conn_complete
  ...

Signed-off-by: Jason Liu <jason.hui.liu@nxp.com>

 Conflicts:
	arch/arm64/boot/dts/freescale/imx8mp.dtsi
	arch/arm64/boot/dts/freescale/imx93.dtsi
	drivers/dma/fsl-edma-common.c
	drivers/dma/fsl-edma-common.h
	drivers/dma/fsl-edma.c
	drivers/irqchip/irq-imx-irqsteer.c
	drivers/perf/fsl_imx9_ddr_perf.c
	drivers/spi/spi-fsl-lpspi.c
	sound/soc/sof/imx/imx8m.c
2024-09-24 11:49:41 +08:00
Mika Westerberg
2a01f3b7b1 pinctrl: meteorlake: Add Arrow Lake-H/U ACPI ID
commit a366e46da1 upstream.

Intel Arrow Lake-H/U has the same GPIO hardware than Meteor Lake-P but
the ACPI ID is different. Add this new ACPI ID to the list of supported
devices.

Cc: stable@vger.kernel.org
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2024-09-18 19:24:10 +02:00
Hal Feng
c15123bbe3 pinctrl: starfive: jh7110: Correct the level trigger configuration of iev register
[ Upstream commit 639766ca10 ]

A mistake was made in level trigger register configuration. Correct it.

Fixes: 447976ab62 ("pinctrl: starfive: Add StarFive JH7110 sys controller driver")
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
Link: https://lore.kernel.org/20240812070108.100923-1-hal.feng@starfivetech.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2024-09-04 13:28:23 +02:00
Nícolas F. R. A. Prado
2ebdb6e987 pinctrl: mediatek: common-v2: Fix broken bias-disable for PULL_PU_PD_RSEL_TYPE
[ Upstream commit 166bf8af91 ]

Despite its name, commit fed74d7527 ("pinctrl: mediatek: common-v2:
Fix bias-disable for PULL_PU_PD_RSEL_TYPE") actually broke bias-disable
for PULL_PU_PD_RSEL_TYPE.

mtk_pinconf_bias_set_combo() tries every bias method supported by the
pin until one succeeds. For PULL_PU_PD_RSEL_TYPE pins, before the
breaking commit, mtk_pinconf_bias_set_rsel() would be called first to
try and set the RSEL value (as well as PU and PD), and if that failed,
the only other valid option was that bias-disable was specified, which
would then be handled by calling mtk_pinconf_bias_set_pu_pd() and
disabling both PU and PD.

The breaking commit misunderstood this logic and added an early "return
0" in mtk_pinconf_bias_set_rsel(). The result was that in the
bias-disable case, the bias was left unchanged, since by returning
success, mtk_pinconf_bias_set_combo() no longer tried calling
mtk_pinconf_bias_set_pu_pd() to disable the bias.

Since the logic for configuring bias-disable on PULL_PU_PD_RSEL_TYPE
pins required mtk_pinconf_bias_set_rsel() to fail first, in that case,
an error was printed to the log, eg:

  mt8195-pinctrl 10005000.pinctrl: Not support rsel value 0 Ohm for pin = 29 (GPIO29)

This is what the breaking commit actually got rid of, and likely part of
the reason why that commit was thought to be fixing functionality, while
in reality it was breaking it.

Instead of simply reverting that commit, restore the functionality but
in a way that avoids the error from being printed and makes the code
less confusing:
* Return 0 explicitly if a bias method was successful
* Introduce an extra function mtk_pinconf_bias_set_pu_pd_rsel() that
  calls both mtk_pinconf_bias_set_rsel() (only if needed) and
  mtk_pinconf_bias_set_pu_pd()
  * And analogously for the corresponding getters

Fixes: fed74d7527 ("pinctrl: mediatek: common-v2: Fix bias-disable for PULL_PU_PD_RSEL_TYPE")
Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Link: https://lore.kernel.org/20240808-mtk-rsel-bias-disable-fix-v1-1-1b4e85bf596c@collabora.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2024-09-04 13:28:23 +02:00
Ma Ke
4ed45fe99e pinctrl: single: fix potential NULL dereference in pcs_get_function()
commit 1c38a62f15 upstream.

pinmux_generic_get_function() can return NULL and the pointer 'function'
was dereferenced without checking against NULL. Add checking of pointer
'function' in pcs_get_function().

Found by code review.

Cc: stable@vger.kernel.org
Fixes: 571aec4df5 ("pinctrl: single: Use generic pinmux helpers for managing functions")
Signed-off-by: Ma Ke <make24@iscas.ac.cn>
Link: https://lore.kernel.org/20240808041355.2766009-1-make24@iscas.ac.cn
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2024-09-04 13:28:19 +02:00
Huang-Huang Bao
d80bdfaa48 pinctrl: rockchip: correct RK3328 iomux width flag for GPIO2-B pins
commit 128f71fe01 upstream.

The base iomux offsets for each GPIO pin line are accumulatively
calculated based off iomux width flag in rockchip_pinctrl_get_soc_data.
If the iomux width flag is one of IOMUX_WIDTH_4BIT, IOMUX_WIDTH_3BIT or
IOMUX_WIDTH_2BIT, the base offset for next pin line would increase by 8
bytes, otherwise it would increase by 4 bytes.

Despite most of GPIO2-B iomux have 2-bit data width, which can be fit
into 4 bytes space with write mask, it actually take 8 bytes width for
whole GPIO2-B line.

Commit e8448a6c81 ("pinctrl: rockchip: fix pinmux bits for RK3328
GPIO2-B pins") wrongly set iomux width flag to 0, causing all base
iomux offset for line after GPIO2-B to be calculated wrong. Fix the
iomux width flag to IOMUX_WIDTH_2BIT so the offset after GPIO2-B is
correctly increased by 8, matching the actual width of GPIO2-B iomux.

Fixes: e8448a6c81 ("pinctrl: rockchip: fix pinmux bits for RK3328 GPIO2-B pins")
Cc: stable@vger.kernel.org
Reported-by: Richard Kojedzinszky <richard@kojedz.in>
Closes: https://lore.kernel.org/linux-rockchip/4f29b743202397d60edfb3c725537415@kojedz.in/
Tested-by: Richard Kojedzinszky <richard@kojedz.in>
Signed-off-by: Huang-Huang Bao <i@eh5.me>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Daniel Golle <daniel@makrotopia.org>
Tested-by: Trevor Woerner <twoerner@gmail.com>
Link: https://lore.kernel.org/20240709105428.1176375-1-i@eh5.me
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2024-09-04 13:28:19 +02:00
Geert Uytterhoeven
09c5a17293 pinctrl: renesas: r8a779g0: Fix TPU suffixes
[ Upstream commit 3d144ef10a ]

The Timer Pulse Unit channels have two alternate pin groups:
"tpu_to[0-3]" and "tpu_to[0-3]_a".

Increase uniformity by adopting R-Car V4M naming:
  - Rename "tpu_to[0-3]_a" to "tpu_to[0-3]_b",
  - Rename "tpu_to[0-3]" to "tpu_to[0-3]_a",

Fixes: ad9bb2fec6 ("pinctrl: renesas: Initial R8A779G0 (R-Car V4H) PFC support")
Fixes: 050442ae4c ("pinctrl: renesas: r8a779g0: Add pins, groups and functions")
Fixes: 85a9cbe4c5 ("pinctrl: renesas: r8a779g0: Add missing TPU0TOx_A")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/0dd9428bc24e97e1001ed3976b1cb98966f5e7e3.1717754960.git.geert+renesas@glider.be
Signed-off-by: Sasha Levin <sashal@kernel.org>
2024-08-03 08:54:09 +02:00
Geert Uytterhoeven
798a182fb3 pinctrl: renesas: r8a779g0: Fix TCLK suffixes
[ Upstream commit bfd2428f3a ]

The Pin Multiplex attachment in Rev.1.10 of the R-Car V4H Series
Hardware User's Manual still has two alternate pins named both TCLK3
and TCLK4.  To differentiate, the pin control driver uses "TCLK[34]" and
"TCLK[34]_X".  In addition, there are alternate pins without suffix, and
with an "_A" or "_B" suffix.

Increase uniformity by adopting R-Car V4M naming:
  - Rename "TCLK2_B" to "TCLK2_C",
  - Rename "TCLK[12]_A" to "TCLK[12]_B",
  - Rename "TCLK[12]" to "TCLK[12]_A",
  - Rename "TCLK[34]_A" to "TCLK[34]_C",
  - Rename "TCLK[34]_X" to "TCLK[34]_A",
  - Rename "TCLK[34]" to "TCLK[34]_B".

Fixes: ad9bb2fec6 ("pinctrl: renesas: Initial R8A779G0 (R-Car V4H) PFC support")
Fixes: 0df46188a5 ("pinctrl: renesas: r8a779g0: Add missing TCLKx_A/TCLKx_B/TCLKx_X")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/2845ff1f8fe1fd8d23d2f307ad5e8eb8243da608.1717754960.git.geert+renesas@glider.be
Signed-off-by: Sasha Levin <sashal@kernel.org>
2024-08-03 08:54:09 +02:00
Geert Uytterhoeven
6b8ba65b09 pinctrl: renesas: r8a779g0: FIX PWM suffixes
[ Upstream commit 0aabdc9a4d ]

PWM channels 0, 2, 8, and 9 do not have alternate pins.
Remove their "_a" or "_b" suffixes to increase uniformity.

Fixes: c606c2fde2 ("pinctrl: renesas: r8a779g0: Add missing PWM")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/abb748e6e1e4e7d78beac7d96e7a0a3481b32e75.1717754960.git.geert+renesas@glider.be
Signed-off-by: Sasha Levin <sashal@kernel.org>
2024-08-03 08:54:09 +02:00
Geert Uytterhoeven
637cb96dc7 pinctrl: renesas: r8a779g0: Fix IRQ suffixes
[ Upstream commit c391dcde38 ]

The suffixes of the IRQ identifiers for external interrupts 0-3
are inconsistent:
  - "IRQ0" and "IRQ0_A",
  - "IRQ1" and "IRQ1_A",
  - "IRQ2" and "IRQ2_A",
  - "IRQ3" and "IRQ3_B".
The suffixes for external interrupts 4 and 5 do follow conventional
naming:
  - "IRQ4A" and IRQ4_B",
  - "IRQ5".

Fix this by adopting R-Car V4M naming:
  - Rename "IRQ[0-2]_A" to "IRQ[0-2]_B",
  - Rename "IRQ[0-3]" to "IRQ[0-3]_A".

Fixes: ad9bb2fec6 ("pinctrl: renesas: Initial R8A779G0 (R-Car V4H) PFC support")
Fixes: 1b23d8a478 ("pinctrl: renesas: r8a779g0: Add missing IRQx_A/IRQx_B")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/8ce9baf0a0f9346544a3ac801fd962c7c12fd247.1717754960.git.geert+renesas@glider.be
Signed-off-by: Sasha Levin <sashal@kernel.org>
2024-08-03 08:54:08 +02:00
Geert Uytterhoeven
37198b25de pinctrl: renesas: r8a779g0: Fix (H)SCIF3 suffixes
[ Upstream commit 5350f38150 ]

(H)SCIF instance 3 has two alternate pin groups: "hscif3" and
"hscif3_a", resp. "scif3" and "scif3_a", but the actual meanings of the
pins within the groups do not match.

Increase uniformity by adopting R-Car V4M naming:
  - Rename "hscif3_a" to "hscif3_b",
  - Rename "hscif3" to "hscif3_a",
  - Rename "scif3" to "scif3_b".

While at it, remove unneeded separators.

Fixes: ad9bb2fec6 ("pinctrl: renesas: Initial R8A779G0 (R-Car V4H) PFC support")
Fixes: 050442ae4c ("pinctrl: renesas: r8a779g0: Add pins, groups and functions")
Fixes: 213b713255 ("pinctrl: renesas: r8a779g0: Add missing HSCIF3_A")
Fixes: 49e4697656 ("pinctrl: renesas: r8a779g0: Add missing SCIF3")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/61fdde58e369e8070ffd3c5811c089e6219c7ecc.1717754960.git.geert+renesas@glider.be
Signed-off-by: Sasha Levin <sashal@kernel.org>
2024-08-03 08:54:08 +02:00
Geert Uytterhoeven
70b7259e6f pinctrl: renesas: r8a779g0: Fix (H)SCIF1 suffixes
[ Upstream commit 3cf834a166 ]

The Pin Multiplex attachment in Rev.1.10 of the R-Car V4H Series
Hardware User's Manual still has two alternate pin groups (GP0_14-18
and GP1_6-10) each named both HSCIF1 and SCIF1.  To differentiate, the
pin control driver uses "(h)scif1" and "(h)scif1_x", which were
considered temporary names until the conflict was sorted out.

Fix this by adopting R-Car V4M naming:
  - Rename "(h)scif1" to "(h)scif1_a",
  - Rename "(h)scif1_x" to "(h)scif1_b".

Adopt the R-Car V4M naming "(h)scif1_a" and "(h)scif1_b" to increase
uniformity.

While at it, remove unneeded separators.

Fixes: ad9bb2fec6 ("pinctrl: renesas: Initial R8A779G0 (R-Car V4H) PFC support")
Fixes: 050442ae4c ("pinctrl: renesas: r8a779g0: Add pins, groups and functions")
Fixes: cf4f789184 ("pinctrl: renesas: r8a779g0: Add missing HSCIF1_X")
Fixes: 9c151c2be9 ("pinctrl: renesas: r8a779g0: Add missing SCIF1_X")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/5009130d1867e12abf9b231c8838fd05e2b28bee.1717754960.git.geert+renesas@glider.be
Signed-off-by: Sasha Levin <sashal@kernel.org>
2024-08-03 08:54:08 +02:00
Geert Uytterhoeven
e59258c564 pinctrl: renesas: r8a779g0: Fix FXR_TXEN[AB] suffixes
[ Upstream commit 4976d61ca3 ]

The Pin Multiplex attachment in Rev.1.10 of the R-Car V4H Series
Hardware User's Manual still has two alternate pins named both
"FXR_TXEN[AB]".  To differentiate, the pin control driver uses
"FXR_TXEN[AB]" and "FXR_TXEN[AB]_X", which were considered temporary
names until the conflict was sorted out.

Fix this by adopting R-Car V4M naming:
  - Rename "FXR_TXEN[AB]" to "FXR_TXEN[AB]_A",
  - Rename "FXR_TXEN[AB]_X" to "FXR_TXEN[AB]_B".

Fixes: ad9bb2fec6 ("pinctrl: renesas: Initial R8A779G0 (R-Car V4H) PFC support")
Fixes: 1c2646b5ce ("pinctrl: renesas: r8a779g0: Add missing FlexRay")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/5e1e9abb46c311d4c54450d991072d6d0e66f14c.1717754960.git.geert+renesas@glider.be
Signed-off-by: Sasha Levin <sashal@kernel.org>
2024-08-03 08:54:08 +02:00
Geert Uytterhoeven
8cdbe6ebfd pinctrl: renesas: r8a779g0: Fix CANFD5 suffix
[ Upstream commit 77fa9007ac ]

CAN-FD instance 5 has two alternate pin groups: "canfd5" and "canfd5_b".
Rename the former to "canfd5_a" to increase uniformity.

While at it, remove the unneeded separator.

Fixes: ad9bb2fec6 ("pinctrl: renesas: Initial R8A779G0 (R-Car V4H) PFC support")
Fixes: 050442ae4c ("pinctrl: renesas: r8a779g0: Add pins, groups and functions")
Fixes: c2b4b2cd63 ("pinctrl: renesas: r8a779g0: Add missing CANFD5_B")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/10b22d54086ed11cdfeb0004583029ccf249bdb9.1717754960.git.geert+renesas@glider.be
Signed-off-by: Sasha Levin <sashal@kernel.org>
2024-08-03 08:54:08 +02:00
Peng Fan
e0ed0ea337 pinctrl: freescale: mxs: Fix refcount of child
[ Upstream commit 7f500f2011 ]

of_get_next_child() will increase refcount of the returned node, need
use of_node_put() on it when done.

Per current implementation, 'child' will be override by
for_each_child_of_node(np, child), so use of_get_child_count to avoid
refcount leakage.

Fixes: 17723111e6 ("pinctrl: add pinctrl-mxs support")
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Link: https://lore.kernel.org/20240504-pinctrl-cleanup-v2-18-26c5f2dc1181@nxp.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2024-08-03 08:54:07 +02:00
Yang Yingliang
a9b7175140 pinctrl: ti: ti-iodelay: fix possible memory leak when pinctrl_enable() fails
[ Upstream commit 9b401f4a71 ]

This driver calls pinctrl_register_and_init() which is not
devm_ managed, it will leads memory leak if pinctrl_enable()
fails. Replace it with devm_pinctrl_register_and_init().
And add missing of_node_put() in the error path.

Fixes: 5038a66dad ("pinctrl: core: delete incorrect free in pinctrl_enable()")
Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
Reviewed-by: Dan Carpenter <dan.carpenter@linaro.org>
Link: https://lore.kernel.org/r/20240606023704.3931561-4-yangyingliang@huawei.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2024-08-03 08:54:07 +02:00
Uwe Kleine-König
cbcdfab9b9 pinctrl: ti: ti-iodelay: Drop if block with always false condition
[ Upstream commit 88b3f10850 ]

ti_iodelay_remove() is only called after ti_iodelay_probe() completed
successfully. In this case platform_set_drvdata() was called with a
non-NULL argument and so platform_get_drvdata() won't return NULL.

Simplify by removing the if block with the always false condition.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Link: https://lore.kernel.org/r/20231009083856.222030-4-u.kleine-koenig@pengutronix.de
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Stable-dep-of: 9b401f4a71 ("pinctrl: ti: ti-iodelay: fix possible memory leak when pinctrl_enable() fails")
Signed-off-by: Sasha Levin <sashal@kernel.org>
2024-08-03 08:54:07 +02:00
Yang Yingliang
197c5c8035 pinctrl: single: fix possible memory leak when pinctrl_enable() fails
[ Upstream commit 8f773bfbdd ]

This driver calls pinctrl_register_and_init() which is not
devm_ managed, it will leads memory leak if pinctrl_enable()
fails. Replace it with devm_pinctrl_register_and_init().
And call pcs_free_resources() if pinctrl_enable() fails.

Fixes: 5038a66dad ("pinctrl: core: delete incorrect free in pinctrl_enable()")
Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
Reviewed-by: Dan Carpenter <dan.carpenter@linaro.org>
Link: https://lore.kernel.org/r/20240606023704.3931561-3-yangyingliang@huawei.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2024-08-03 08:54:07 +02:00
Yang Yingliang
99ae0689ab pinctrl: core: fix possible memory leak when pinctrl_enable() fails
[ Upstream commit ae1cf47599 ]

In devm_pinctrl_register(), if pinctrl_enable() fails in pinctrl_register(),
the "pctldev" has not been added to dev resources, so devm_pinctrl_dev_release()
can not be called, it leads memory leak.

Introduce pinctrl_uninit_controller(), call it in the error path to free memory.

Fixes: 5038a66dad ("pinctrl: core: delete incorrect free in pinctrl_enable()")
Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
Reviewed-by: Dan Carpenter <dan.carpenter@linaro.org>
Link: https://lore.kernel.org/r/20240606023704.3931561-2-yangyingliang@huawei.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2024-08-03 08:54:07 +02:00
Dmitry Yashin
d51dc9f949 pinctrl: rockchip: update rk3308 iomux routes
[ Upstream commit a8f2548548 ]

Some of the rk3308 iomux routes in rk3308_mux_route_data belong to
the rk3308b SoC. Remove them and correct i2c3 routes.

Fixes: 7825aeb7b2 ("pinctrl: rockchip: add rk3308 SoC support")
Signed-off-by: Dmitry Yashin <dmt.yashin@gmail.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20240515121634.23945-2-dmt.yashin@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2024-08-03 08:54:06 +02:00
Johan Hovold
c2a78811ff pinctrl: qcom: spmi-gpio: drop broken pm8008 support
commit 8da86499d4 upstream.

The SPMI GPIO driver assumes that the parent device is an SPMI device
and accesses random data when backcasting the parent struct device
pointer for non-SPMI devices.

Fortunately this does not seem to cause any issues currently when the
parent device is an I2C client like the PM8008, but this could change if
the structures are reorganised (e.g. using structure randomisation).

Notably the interrupt implementation is also broken for non-SPMI devices.

Also note that the two GPIO pins on PM8008 are used for interrupts and
reset so their practical use should be limited.

Drop the broken GPIO support for PM8008 for now.

Fixes: ea119e5a48 ("pinctrl: qcom-pmic-gpio: Add support for pm8008")
Cc: stable@vger.kernel.org	# 5.13
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Link: https://lore.kernel.org/r/20240529162958.18081-9-johan+linaro@kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2024-07-05 09:33:54 +02:00
Huang-Huang Bao
2838dfa529 pinctrl: rockchip: fix pinmux reset in rockchip_pmx_set
[ Upstream commit 4ea4d4808e ]

rockchip_pmx_set reset all pinmuxs in group to 0 in the case of error,
add missing bank data retrieval in that code to avoid setting mux on
unexpected pins.

Fixes: 14797189b3 ("pinctrl: rockchip: add return value to rockchip_set_mux")
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Huang-Huang Bao <i@eh5.me>
Link: https://lore.kernel.org/r/20240606125755.53778-5-i@eh5.me
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2024-07-05 09:33:44 +02:00
Huang-Huang Bao
b85dec60a3 pinctrl: rockchip: use dedicated pinctrl type for RK3328
[ Upstream commit 01b4b1d1ce ]

rk3328_pin_ctrl uses type of RK3288 which has a hack in
rockchip_pinctrl_suspend and rockchip_pinctrl_resume to restore GPIO6-C6
at assume, the hack is not applicable to RK3328 as GPIO6 is not even
exist in it. So use a dedicated pinctrl type to skip this hack.

Fixes: 3818e4a767 ("pinctrl: rockchip: Add rk3328 pinctrl support")
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Huang-Huang Bao <i@eh5.me>
Link: https://lore.kernel.org/r/20240606125755.53778-4-i@eh5.me
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2024-07-05 09:33:43 +02:00
Huang-Huang Bao
14f6c7bf21 pinctrl: rockchip: fix pinmux bits for RK3328 GPIO3-B pins
[ Upstream commit 5ef6914e0b ]

The pinmux bits for GPIO3-B1 to GPIO3-B6 pins are not explicitly
specified in RK3328 TRM, however we can get hint from pad name and its
correspinding IOMUX setting for pins in interface descriptions. The
correspinding IOMIX settings for these pins can be found in the same
row next to occurrences of following pad names in RK3328 TRM.

GPIO3-B1:  IO_TSPd5m0_CIFdata5m0_GPIO3B1vccio6
GPIO3-B2: IO_TSPd6m0_CIFdata6m0_GPIO3B2vccio6
GPIO3-B3: IO_TSPd7m0_CIFdata7m0_GPIO3B3vccio6
GPIO3-B4: IO_CARDclkm0_GPIO3B4vccio6
GPIO3-B5: IO_CARDrstm0_GPIO3B5vccio6
GPIO3-B6: IO_CARDdetm0_GPIO3B6vccio6

Add pinmux data to rk3328_mux_recalced_data as mux register offset for
these pins does not follow rockchip convention.

Signed-off-by: Huang-Huang Bao <i@eh5.me>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Fixes: 3818e4a767 ("pinctrl: rockchip: Add rk3328 pinctrl support")
Link: https://lore.kernel.org/r/20240606125755.53778-3-i@eh5.me
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2024-07-05 09:33:43 +02:00
Huang-Huang Bao
98db009476 pinctrl: rockchip: fix pinmux bits for RK3328 GPIO2-B pins
[ Upstream commit e8448a6c81 ]

The pinmux bits for GPIO2-B0 to GPIO2-B6 actually have 2 bits width,
correct the bank flag for GPIO2-B. The pinmux bits for GPIO2-B7 is
recalculated so it remain unchanged.

The pinmux bits for those pins are not explicitly specified in RK3328
TRM, however we can get hint from pad name and its correspinding IOMUX
setting for pins in interface descriptions. The correspinding IOMIX
settings for GPIO2-B0 to GPIO2-B6 can be found in the same row next to
occurrences of following pad names in RK3328 TRM.

GPIO2-B0: IO_SPIclkm0_GPIO2B0vccio5
GPIO2-B1: IO_SPItxdm0_GPIO2B1vccio5
GPIO2-B2: IO_SPIrxdm0_GPIO2B2vccio5
GPIO2-B3: IO_SPIcsn0m0_GPIO2B3vccio5
GPIO2-B4: IO_SPIcsn1m0_FLASHvol_sel_GPIO2B4vccio5
GPIO2-B5: IO_ I2C2sda_TSADCshut_GPIO2B5vccio5
GPIO2-B6: IO_ I2C2scl_GPIO2B6vccio5

This fix has been tested on NanoPi R2S for fixing confliting pinmux bits
between GPIO2-B7 with GPIO2-B5.

Signed-off-by: Huang-Huang Bao <i@eh5.me>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Fixes: 3818e4a767 ("pinctrl: rockchip: Add rk3328 pinctrl support")
Link: https://lore.kernel.org/r/20240606125755.53778-2-i@eh5.me
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2024-07-05 09:33:43 +02:00
Hagar Hemdan
4038c57bf6 pinctrl: fix deadlock in create_pinctrl() when handling -EPROBE_DEFER
[ Upstream commit adec57ff8e ]

In create_pinctrl(), pinctrl_maps_mutex is acquired before calling
add_setting(). If add_setting() returns -EPROBE_DEFER, create_pinctrl()
calls pinctrl_free(). However, pinctrl_free() attempts to acquire
pinctrl_maps_mutex, which is already held by create_pinctrl(), leading to
a potential deadlock.

This patch resolves the issue by releasing pinctrl_maps_mutex before
calling pinctrl_free(), preventing the deadlock.

This bug was discovered and resolved using Coverity Static Analysis
Security Testing (SAST) by Synopsys, Inc.

Fixes: 42fed7ba44 ("pinctrl: move subsystem mutex to pinctrl_dev struct")
Suggested-by: Maximilian Heyne <mheyne@amazon.de>
Signed-off-by: Hagar Hemdan <hagarhem@amazon.com>
Link: https://lore.kernel.org/r/20240604085838.3344-1-hagarhem@amazon.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2024-07-05 09:33:43 +02:00
Jason Liu
21efea47c1 This is the 6.6.34 stable release
-----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEEZH8oZUiU471FcZm+ONu9yGCSaT4FAmZu0U0ACgkQONu9yGCS
 aT4c2Q//SGn9+yEUml1/7nQUTND434ly4JPMdrR1jjJSKwxAsgzOYKCoUpzpXim8
 7mdKz7q1cXx/l+tfJgEDdJ8JzVS6ipJWAwF4vE+18zWZjEax/M3dgluZUUswXKYg
 Da76wSaNkfGiIewu8HV90LKAKaQoCR4ypyWG8CqDZkCnGJORUJA09GNDrKFhOodT
 f0TzjIvPw8E3rU2+HZfPmxUI0XQEzfVPWb5DK+0F7hcHw4ETcij7y0AInBkQ5bNt
 tFRCc462nT23e3jXJECWMbSXdRF57LlT8G9626Om0iS+TY7YD6PPNa7/bdqVHzcw
 hDmKE+xONslwvuzkYn2R9u+nc/dw/hJ8QI5j9QohbJCcXjcv8N3QeXoiLPjiDxxv
 1JVVi6emyKvKx26kjY/m0ZTZ/QWWwQlj/+R8Or/yIMMYZvPwyBUX3I8cZIQhyAg4
 n/fc2tFqmax0K6e9YOXj3sa+OlXx02DAC8oVToNrSS7HT5uhtoKT4vU1d+et2alo
 dFJAhklt27k+eV+Ayxo+RUaxUVggM0MAB67S7XUR0kylP2BeL2l9wMKVzZz2V5T4
 O9PHY1RpD8OGk7aZvlbZYIis7LBqVTXcaEB4l5QtSYM4RMON4BYb5QLEc0jYywzV
 U7GMNiKhhuwEHjiPD0cIXyeWeQzTlH9os5lhW8moVY9mtthGlr0=
 =zdH0
 -----END PGP SIGNATURE-----

Merge tag 'v6.6.34' into lf-6.6.y

This is the 6.6.34 stable release

* tag 'v6.6.34': (2530 commits)
  Linux 6.6.34
  smp: Provide 'setup_max_cpus' definition on UP too
  selftests: net: more strict check in net_helper
  ...

Signed-off-by: Jason Liu <jason.hui.liu@nxp.com>

 Conflicts:
	arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi
	drivers/net/ethernet/freescale/fec_ptp.c
	drivers/pmdomain/imx/imx8mp-blk-ctrl.c
	drivers/usb/dwc3/host.c
	tools/perf/util/pmu.c
2024-06-18 17:16:08 +08:00
Danila Tikhonov
cd283810f6 pinctrl: qcom: pinctrl-sm7150: Fix sdc1 and ufs special pins regs
[ Upstream commit 5ed79863fa ]

SDC1 and UFS_RESET special pins are located in the west memory bank.

SDC1 have address 0x359a000:
0x3500000 (TLMM BASE) + 0x0 (WEST) + 0x9a000 (SDC1_OFFSET) = 0x359a000

UFS_RESET have address 0x359f000:
0x3500000 (TLMM BASE) + 0x0 (WEST) + 0x9f000 (UFS_OFFSET) = 0x359a000

Fixes: b915395c9e ("pinctrl: qcom: Add SM7150 pinctrl driver")
Signed-off-by: Danila Tikhonov <danila@jiaxyga.com>
Message-ID: <20240423203245.188480-1-danila@jiaxyga.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2024-06-12 11:12:24 +02:00
Zeng Heng
026e24cf31 pinctrl: devicetree: fix refcount leak in pinctrl_dt_to_map()
[ Upstream commit a0cedbcc88 ]

If we fail to allocate propname buffer, we need to drop the reference
count we just took. Because the pinctrl_dt_free_maps() includes the
droping operation, here we call it directly.

Fixes: 91d5c5060e ("pinctrl: devicetree: fix null pointer dereferencing in pinctrl_dt_to_map")
Suggested-by: Dan Carpenter <dan.carpenter@linaro.org>
Signed-off-by: Zeng Heng <zengheng4@huawei.com>
Reviewed-by: Dan Carpenter <dan.carpenter@linaro.org>
Message-ID: <20240415105328.3651441-1-zengheng4@huawei.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2024-05-17 12:01:58 +02:00
Hans de Goede
fc8cbe3a58 pinctrl: baytrail: Fix selecting gpio pinctrl state
[ Upstream commit fed6d9a8e6 ]

For all the "score" pin-groups all the intel_pingroup-s to select
the non GPIO function are re-used for byt_score_gpio_groups[].

But this is incorrect since a pin-group includes the mode setting,
which for the non GPIO functions generally is 1, where as to select
the GPIO function mode must be set to 0.

So the GPIO function needs separate intel_pingroup-s with their own mode
value of 0.

Add a new PIN_GROUP_GPIO macro which adds a foo_gpio entry to each
pin-group defined this way and update byt_score_gpio_groups[] to point
to the new foo_gpio entries.

The "sus" usb_oc_grp usb_ulpi_grp and pcu_spi_grp pin-groups are special
because these have a non 0 mode value to select the GPIO functions and
these already have matching foo_gpio pin-groups, leave these are unchanged.

The pmu_clk "sus" groups added in commit 2f46d7f7e9 ("pinctrl: baytrail:
Add pinconf group + function for the pmu_clk") do need to use the new
PIN_GROUP_GPIO macro.

Fixes: 2f46d7f7e9 ("pinctrl: baytrail: Add pinconf group + function for the pmu_clk")
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2024-05-17 12:01:58 +02:00
Chen-Yu Tsai
30287d2018 pinctrl: mediatek: paris: Rework support for PIN_CONFIG_{INPUT,OUTPUT}_ENABLE
[ Upstream commit c5d3b64c56 ]

There is a misinterpretation of some of the PIN_CONFIG_* options in this
driver library. PIN_CONFIG_OUTPUT_ENABLE should refer to a buffer or
switch in the output direction of the electrical path. The MediaTek
hardware does not have such a thing. The driver incorrectly maps this
option to the GPIO function's direction.

Likewise, PIN_CONFIG_INPUT_ENABLE should refer to a buffer or switch in
the input direction. The hardware does have such a mechanism, and is
mapped to the IES bit. The driver however sets the direction in addition
to the IES bit, which is incorrect. On readback, the IES bit isn't even
considered.

Ironically, the driver does not support readback for PIN_CONFIG_OUTPUT,
while its readback of PIN_CONFIG_{INPUT,OUTPUT}_ENABLE is what it should
be doing for PIN_CONFIG_OUTPUT.

Rework support for these three options, so that PIN_CONFIG_OUTPUT_ENABLE
is completely removed, PIN_CONFIG_INPUT_ENABLE is only linked to the IES
bit, and PIN_CONFIG_OUTPUT is linked to the GPIO function's direction
and output level.

Fixes: 805250982b ("pinctrl: mediatek: add pinctrl-paris that implements the vendor dt-bindings")
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Message-ID: <20240327091336.3434141-3-wenst@chromium.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2024-05-17 12:01:57 +02:00
Chen-Yu Tsai
d025871736 pinctrl: mediatek: paris: Fix PIN_CONFIG_INPUT_SCHMITT_ENABLE readback
[ Upstream commit 08f66a8edd ]

In the generic pin config library, readback of some options are handled
differently compared to the setting of those options: the argument value
is used to convey enable/disable of an option in the set path, but
success or -EINVAL is used to convey if an option is enabled or disabled
in the debugfs readback path.

PIN_CONFIG_INPUT_SCHMITT_ENABLE is one such option. Fix the readback of
the option in the mediatek-paris library, so that the debugfs dump is
not showing "input schmitt enabled" for pins that don't have it enabled.

Fixes: 1bea6afbc8 ("pinctrl: mediatek: Refine mtk_pinconf_get()")
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Message-ID: <20240327091336.3434141-2-wenst@chromium.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2024-05-17 12:01:57 +02:00
Dan Carpenter
558c8039fd pinctrl: core: delete incorrect free in pinctrl_enable()
[ Upstream commit 5038a66dad ]

The "pctldev" struct is allocated in devm_pinctrl_register_and_init().
It's a devm_ managed pointer that is freed by devm_pinctrl_dev_release(),
so freeing it in pinctrl_enable() will lead to a double free.

The devm_pinctrl_dev_release() function frees the pindescs and destroys
the mutex as well.

Fixes: 6118714275 ("pinctrl: core: Fix pinctrl_register_and_init() with pinctrl_enable()")
Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Message-ID: <578fbe56-44e9-487c-ae95-29b695650f7c@moroto.mountain>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2024-05-17 12:01:57 +02:00
Jan Dakinevich
70b145d68e pinctrl/meson: fix typo in PDM's pin name
[ Upstream commit 368a90e651 ]

Other pins have _a or _x suffix, but this one doesn't have any. Most
likely this is a typo.

Fixes: dabad1ff85 ("pinctrl: meson: add pinctrl driver support for Meson-A1 SoC")
Signed-off-by: Jan Dakinevich <jan.dakinevich@salutedevices.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Message-ID: <20240325113058.248022-1-jan.dakinevich@salutedevices.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2024-05-17 12:01:57 +02:00
Billy Tsai
4b1357a277 pinctrl: pinctrl-aspeed-g6: Fix register offset for pinconf of GPIOR-T
[ Upstream commit c10cd03d69 ]

The register offset to disable the internal pull-down of GPIOR~T is 0x630
instead of 0x620, as specified in the Ast2600 datasheet v15
The datasheet can download from the official Aspeed website.

Fixes: 15711ba6ff ("pinctrl: aspeed-g6: Add AST2600 pinconf support")
Reported-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com>
Reviewed-by: Paul Menzel <pmenzel@molgen.mpg.de>
Reviewed-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Message-ID: <20240313092809.2596644-1-billy_tsai@aspeedtech.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2024-05-17 12:01:56 +02:00
Jindong Yue
14e9859743 MA-22143-7 pinctrl: scmi: Support modular imx pinctrl
When CONFIG_PINCTRL_IMX is m, the result of check
"#ifdef CONFIG_PINCTRL_IMX" is false, which invalidates
the extended imx dt map feature.

Use IS_ENABLED instead of ifdef to support
CONFIG_PINCTRL_IMX=m

Signed-off-by: Jindong Yue <jindong.yue@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2024-04-23 18:19:29 +09:00
Geert Uytterhoeven
56f5e36dac pinctrl: renesas: checker: Limit cfg reg enum checks to provided IDs
[ Upstream commit 3803584a4e ]

If the number of provided enum IDs in a variable width config register
description does not match the expected number, the checker uses the
expected number for validating the individual enum IDs.

However, this may cause out-of-bounds accesses on the array holding the
enum IDs, leading to bogus enum_id conflict warnings.  Worse, if the bug
is an incorrect bit field description (e.g. accidentally using "12"
instead of "-12" for a reserved field), thousands of warnings may be
printed, overflowing the kernel log buffer.

Fix this by limiting the enum ID check to the number of provided enum
IDs.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/c7385f44f2faebb8856bcbb4e908d846fc1531fb.1705930809.git.geert+renesas@glider.be
Signed-off-by: Sasha Levin <sashal@kernel.org>
2024-04-13 13:07:34 +02:00
Ming Qian
3ac7fccbf2 LF-11510: pinctrl: scmi: fix memory leak in freeing dt map
The configs are not freed in freeing dt map, which can lead to memory
leaks

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ming Qian <ming.qian@nxp.com>
Reviewed-by: TaoJiang <tao.jiang_2@nxp.com>
2024-04-01 15:21:34 +09:00
Haibo Chen
e14b8372ac LF-10473 pinctrl: devicetree: add multi gpios support for pinctrl-assert
One local patch add the pinctrl-assert support, but when porting to V6.6,
since the API of_get_named_gpio_flags() changes, can't handle the flags
any more, so find other method by using devm_gpiod_get_optional(), but
this API do not support multi-gpios, this patch use devm_gpiod_get_index()
to support multi gpios.

use flag GPIOD_OUT_HIGH when call devm_gpiod_get_index(), this API will
config the pad logic level according to dts setting, like GPIO_ACTIVE_LOW
or GPIO_ACTIVE_HIGH.

Lost this patch after V6.6 TC1, so add back here, and also correct the
logic of error check.

Fixes: 26bccb9f27 ("MLK-11749: pinctrl: support pinctrl setting assertion via gpios")
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
2024-04-01 14:11:04 +08:00
Jason Liu
039a4cdb2c Linux 6.6.23
-----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEE4n5dijQDou9mhzu83qZv95d3LNwFAmYDTh8ACgkQ3qZv95d3
 LNzBbhAAwSqAoBZBxApda8QQEVvF012dZG0btn0wJv2H3Bu8wasAhfD2pD5LxFZf
 Ru3EVgrBeupMKhZk/aeN5d2qSxn5mCiU4WnAwqDvjtsIicjmeeRaqcGGFFmZ6TyM
 KrK+NjxHu77L6dlkMZRLRugP/7WGGUI3G0fGj2HvJOlMRFHJSx8o4JeX1Yc10xDz
 MbySZBj4ZctjvP16dxehA44Grw08CTxnoPgrHn52TgncLGuQfcx+w+fXEDJfdRzP
 vS8D+8C4G8iwjyfKLnb/jytZR0jlVii3DkQXcIjUzGRQ4UEhfzvSn9C07zu80cPV
 iskQCo/IS1/2gD5M6OgVOjfR0yfF/NCOm692omEH6oQHjNu6QOxM2PpFpIYzm34r
 /4wnTMg58AMsNGp/D5bipl3X5B93pWDoCLq939ZU9688EaR1n/Xsh5+EXG0lKIux
 Eb4tk2z7zJt54/UQM+J2qhtJrqriflSl1dTBxpuZb2abUrq5ewQgNyqhb0hXBc5f
 F5SU5O+dkntQGcUQ1GBSWk5B5q8oXmqY9reIeuhhRYI0w0Y+Xt+jeQHhQSU0j7ne
 DLv5uG32HTR9p8z1jidJJY8VL3MuCpMzrfFkZsEUEut0haF8FhpGIxZ+YjNYcgRt
 f57z1Sf5Gzr+fpM1q8TesHI8+7MEh7Fel+elyWpvnidJfMNx4t8=
 =mu/j
 -----END PGP SIGNATURE-----

Merge tag 'v6.6.23' into lf-6.6.y

Linux 6.6.23

* tag 'v6.6.23': (630 commits)
  Linux 6.6.23
  x86/efistub: Don't clear BSS twice in mixed mode
  x86/efistub: Clear decompressor BSS in native EFI entrypoint
  ...

Signed-off-by: Jason Liu <jason.hui.liu@nxp.com>

 Conflicts:
	arch/arm64/boot/dts/freescale/imx8mp-evk.dts
	drivers/gpio/Kconfig
	drivers/spi/spi-imx.c
2024-04-01 11:00:10 +08:00
Théo Lebrun
37e0f758e0 gpio: nomadik: fix offset bug in nmk_pmx_set()
[ Upstream commit 53cf6b72e0 ]

Previously, the statement looked like:

    slpm[x] &= ~BIT(g->grp.pins[i]);

Where:
 - slpm is a unsigned int pointer;
 - g->grp.pins[i] is a pin number. It can grow to more than 32.

The expected shift amount is a pin bank offset.

This bug does not occur on every group or pin: the altsetting must be
NMK_GPIO_ALT_C and the pin must be 32 or above. It might have occured.
For example, in pinctrl-nomadik-db8500.c, pin group i2c3_c_2 has the
right altsetting and pins 229 and 230.

Fixes: dbfe8ca259 ("pinctrl/nomadik: implement pin multiplexing")
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com>
Link: https://lore.kernel.org/r/20240228-mbly-gpio-v2-5-3ba757474006@bootlin.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2024-03-26 18:19:54 -04:00
Geert Uytterhoeven
93664eb8d6 pinctrl: renesas: Allow the compiler to optimize away sh_pfc_pm
[ Upstream commit a6f06b909f ]

The conversion to DEFINE_NOIRQ_DEV_PM_OPS() lost the ability of the
compiler to optimize away the struct dev_pm_ops object when it is not
needed.

Fix this by replacing the use of pm_sleep_ptr() by a custom wrapper.

Fixes: 727eb02eb7 ("pinctrl: renesas: Switch to use DEFINE_NOIRQ_DEV_PM_OPS() helper")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/6238a78e32fa21f0c795406b6cba7bce7af92577.1708513940.git.geert+renesas@glider.be
Signed-off-by: Sasha Levin <sashal@kernel.org>
2024-03-26 18:19:50 -04:00
Chen-Yu Tsai
6ed98a594b pinctrl: mediatek: Drop bogus slew rate register range for MT8192
[ Upstream commit e15ab05a6b ]

The MT8192 does not support configuring pin slew rate. This is evident
from both the datasheet, and the fact that the driver points the slew
rate register range at the GPIO direction register range.

Drop the bogus setting.

Fixes: d32f38f2a8 ("pinctrl: mediatek: Add pinctrl driver for mt8192")
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20240131071910.3950450-2-wenst@chromium.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2024-03-26 18:19:45 -04:00
Chen-Yu Tsai
2969f5b83d pinctrl: mediatek: Drop bogus slew rate register range for MT8186
[ Upstream commit 3a29c87548 ]

The MT8186 does not support configuring pin slew rate. This is evident
from both the datasheet, and the fact that the driver points the slew
rate register range at the GPIO direction register range.

Drop the bogus setting.

Fixes: 8b483bda1e ("pinctrl: add pinctrl driver on mt8186")
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20240131071910.3950450-1-wenst@chromium.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2024-03-26 18:19:45 -04:00
Geert Uytterhoeven
d6786cf3cc pinctrl: renesas: r8a779g0: Add missing SCIF_CLK2 pin group/function
[ Upstream commit 68540257cd ]

R-Car V4H actually has two SCIF_CLK pins.
The second pin provides the SCIF_CLK signal for HSCIF2 and SCIF4.

Fixes: 050442ae4c ("pinctrl: renesas: r8a779g0: Add pins, groups and functions")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/6352ec9b63fdd38c2c70d8d203e46f21fbfeccdc.1705589612.git.geert+renesas@glider.be
Signed-off-by: Sasha Levin <sashal@kernel.org>
2024-03-26 18:19:44 -04:00
Jason Liu
8eb8dd316c This is the 6.6.20 stable release
-----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEEZH8oZUiU471FcZm+ONu9yGCSaT4FAmXjYIIACgkQONu9yGCS
 aT5mvw/9GnG2BWbZp9BgVzBnT00CXnIpiGlsoSU0I0Uiso3XqpNYBu7jIZ+vmsqz
 3H2bpkToEwJgg40I+w3iRaY84FWJZtl6HWtXydVQghQzXdA7qSuKBmbqQdUGKqZq
 Uqy7SFabkqQmlmF+RX1tYsgj7Vg3tqThERLUKQRhZIRa+Xek6Izi16RKEXcBNoXv
 vN+Q6AJ6vgjzHdw/UndsTH48bA/NofLlGapf7ZRGaSO7vY6bO5N23Xeg8gBIUh3M
 RHYf0ubKOvOw6LfZrE8BAbLd9Om2IHRAwHTqvDUNaIOl6y7exwCCIMK2lDdlzQ3W
 7gug4HzlQjVz93OtL8MjLnfINOO7en65gyqvwit9N7O7nJKvuIMtt5vVam+h4ikB
 xF/QmFj95GNeRLwBmOJxOS89KyC8BrjE3PfYtL1mUO9joH8vZBccon6WIV7C2u5M
 d+0UglxC4lNTJ3s3FcnrzEKCn5YaE8WvFYQX0xvFQL3GWGDkyrNaafqoz19a8yd2
 ndf3xUh5QKYWI2UGhqV6FdfYC9BolEh/niMKrJYCEJ6BroO3nzh1L8keC+MHbJwp
 Yuu9FCT+vNDKfR/HQwUhUGX/3wyBKb8jqzDXUB2s4FLPUSBX+/RAso13FWua1TGd
 E432ZXaobuUx3+kHsqB+0dc99QVblnMFMPEoM4ye3lYHzq8PDJ0=
 =7IL4
 -----END PGP SIGNATURE-----

Merge tag 'v6.6.20' into lf-6.6.y

This is the 6.6.20 stable release

* tag 'v6.6.20': (3154 commits)
  Linux 6.6.20
  fs/ntfs3: fix build without CONFIG_NTFS3_LZX_XPRESS
  Linux 6.6.19
  ...

Signed-off-by: Jason Liu <jason.hui.liu@nxp.com>

 Conflicts:
	arch/arm64/boot/dts/freescale/imx8mm.dtsi
	arch/arm64/boot/dts/freescale/imx8mq.dtsi
	drivers/clk/imx/clk-imx8qxp.c
	drivers/dma/fsl-edma.c
	drivers/firmware/arm_scmi/perf.c
	drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c
	drivers/net/ethernet/freescale/dpaa2/dpaa2-switch.c
	drivers/net/ethernet/freescale/fec_main.c
	drivers/scsi/scsi_error.c
	drivers/spi/spi-imx.c
	sound/soc/fsl/fsl_sai.c
2024-03-11 14:59:44 +08:00
Andy Shevchenko
6eef17a3c6 pinctrl: baytrail: Fix types of config value in byt_pin_config_set()
[ Upstream commit 1a856a22e6 ]

When unpacked, the config value is split to two of different types.
Fix the types accordingly.

Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2024-02-05 20:14:30 +00:00
Patrick Rudolph
406cea6443 pinctrl: cy8c95x0: Fix get_pincfg
[ Upstream commit 94c71705cc ]

Invert the register value for PIN_CONFIG_OUTPUT_ENABLE to return
the opposite of PIN_CONFIG_INPUT_ENABLE.

Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Link: https://lore.kernel.org/r/20231219125120.4028862-3-patrick.rudolph@9elements.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2024-01-20 11:51:46 +01:00
Patrick Rudolph
5f0a16617f pinctrl: cy8c95x0: Fix regression
[ Upstream commit 04dfca968c ]

Commit 1fa3df901f ("pinctrl: cy8c95x0: Remove custom ->set_config()")
removed support for PIN_CONFIG_INPUT_ENABLE and
PIN_CONFIG_OUTPUT.

Add the following options to restore functionality:
- PIN_CONFIG_INPUT_ENABLE
- PIN_CONFIG_OUTPUT_ENABLE

Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Link: https://lore.kernel.org/r/20231219125120.4028862-2-patrick.rudolph@9elements.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2024-01-20 11:51:46 +01:00