8d310c9107
Make the SIRQ polarity for Aspeed AST24xx/25xx VUART configurable via sysfs. This setting need to be changed on specific host platforms depending on the selected host interface (LPC / eSPI). The setting is configurable via sysfs rather than device-tree to stay in line with other related configurable settings. On AST2500 the VUART SIRQ polarity can be auto-configured by reading a bit from a configuration register, e.g. the LPC/eSPI interface configuration bit. Tested: Verified on TYAN S7106 mainboard. Signed-off-by: Oskar Senft <osk@google.com> Link: https://lore.kernel.org/r/20190905144130.220713-1-osk@google.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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What: /sys/bus/platform/drivers/aspeed-vuart/*/lpc_address Date: April 2017 Contact: Jeremy Kerr jk@ozlabs.org Description: Configures which IO port the host side of the UART will appear on the host <-> BMC LPC bus. Users: OpenBMC. Proposed changes should be mailed to openbmc@lists.ozlabs.org
What: /sys/bus/platform/drivers/aspeed-vuart/*/sirq Date: April 2017 Contact: Jeremy Kerr jk@ozlabs.org Description: Configures which interrupt number the host side of the UART will appear on the host <-> BMC LPC bus. Users: OpenBMC. Proposed changes should be mailed to openbmc@lists.ozlabs.org
What: /sys/bus/platform/drivers/aspeed-vuart/*/sirq_polarity Date: July 2019 Contact: Oskar Senft osk@google.com Description: Configures the polarity of the serial interrupt to the host via the BMC LPC bus. Set to 0 for active-low or 1 for active-high. Users: OpenBMC. Proposed changes should be mailed to openbmc@lists.ozlabs.org