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The PTT can only filter the traced TLP headers by the Root Ports or the Requester ID of the Endpoint, which are located on the same PCIe core of the PTT device. The filter value used is derived from the BDF number of the supported Root Port or the Endpoint. It's not friendly enough for the users since it requires the user to be familiar enough with the platform and calculate the filter value manually. This patch export the available filters through sysfs. Each available filters is presented as an individual file with the name of the BDF number of the related PCIe device. The files are created under $(PTT PMU dir)/available_root_port_filters and $(PTT PMU dir)/available_requester_filters respectively. The filter value can be known by reading the related file. Then the users can easily know the available filters for trace and get the filter values without calculating. Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Yicong Yang <yangyicong@hisilicon.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230621092804.15120-4-yangyicong@huawei.com
5.0 KiB
What: /sys/devices/hisi_ptt<sicl_id>_<core_id>/tune Date: October 2022 KernelVersion: 6.1 Contact: Yicong Yang yangyicong@hisilicon.com Description: This directory contains files for tuning the PCIe link parameters(events). Each file is named after the event of the PCIe link.
See Documentation/trace/hisi-ptt.rst for more information.
What: /sys/devices/hisi_ptt<sicl_id>_<core_id>/tune/qos_tx_cpl Date: October 2022 KernelVersion: 6.1 Contact: Yicong Yang yangyicong@hisilicon.com Description: (RW) Controls the weight of Tx completion TLPs, which influence the proportion of outbound completion TLPs on the PCIe link. The available tune data is [0, 1, 2]. Writing a negative value will return an error, and out of range values will be converted to 2. The value indicates a probable level of the event.
What: /sys/devices/hisi_ptt<sicl_id>_<core_id>/tune/qos_tx_np Date: October 2022 KernelVersion: 6.1 Contact: Yicong Yang yangyicong@hisilicon.com Description: (RW) Controls the weight of Tx non-posted TLPs, which influence the proportion of outbound non-posted TLPs on the PCIe link. The available tune data is [0, 1, 2]. Writing a negative value will return an error, and out of range values will be converted to 2. The value indicates a probable level of the event.
What: /sys/devices/hisi_ptt<sicl_id>_<core_id>/tune/qos_tx_p Date: October 2022 KernelVersion: 6.1 Contact: Yicong Yang yangyicong@hisilicon.com Description: (RW) Controls the weight of Tx posted TLPs, which influence the proportion of outbound posted TLPs on the PCIe link. The available tune data is [0, 1, 2]. Writing a negative value will return an error, and out of range values will be converted to 2. The value indicates a probable level of the event.
What: /sys/devices/hisi_ptt<sicl_id>_<core_id>/tune/rx_alloc_buf_level Date: October 2022 KernelVersion: 6.1 Contact: Yicong Yang yangyicong@hisilicon.com Description: (RW) Control the allocated buffer watermark for inbound packets. The packets will be stored in the buffer first and then transmitted either when the watermark reached or when timed out. The available tune data is [0, 1, 2]. Writing a negative value will return an error, and out of range values will be converted to 2. The value indicates a probable level of the event.
What: /sys/devices/hisi_ptt<sicl_id>_<core_id>/tune/tx_alloc_buf_level Date: October 2022 KernelVersion: 6.1 Contact: Yicong Yang yangyicong@hisilicon.com Description: (RW) Control the allocated buffer watermark of outbound packets. The packets will be stored in the buffer first and then transmitted either when the watermark reached or when timed out. The available tune data is [0, 1, 2]. Writing a negative value will return an error, and out of range values will be converted to 2. The value indicates a probable level of the event.
What: /sys/devices/hisi_ptt<sicl_id>_<core_id>/root_port_filters Date: May 2023 KernelVersion: 6.5 Contact: Yicong Yang yangyicong@hisilicon.com Description: This directory contains the files providing the PCIe Root Port filters information used for PTT trace. Each file is named after the supported Root Port device name ::..
See the description of the "filter" in Documentation/trace/hisi-ptt.rst
for more information.
What: /sys/devices/hisi_ptt<sicl_id>_<core_id>/root_port_filters/multiselect Date: May 2023 KernelVersion: 6.5 Contact: Yicong Yang yangyicong@hisilicon.com Description: (Read) Indicates if this kind of filter can be selected at the same time as others filters, or must be used on it's own. 1 indicates the former case and 0 indicates the latter.
What: /sys/devices/hisi_ptt<sicl_id>_<core_id>/root_port_filters/ Date: May 2023 KernelVersion: 6.5 Contact: Yicong Yang yangyicong@hisilicon.com Description: (Read) Indicates the filter value of this Root Port filter, which can be used to control the TLP headers to trace by the PTT trace.
What: /sys/devices/hisi_ptt<sicl_id>_<core_id>/requester_filters Date: May 2023 KernelVersion: 6.5 Contact: Yicong Yang yangyicong@hisilicon.com Description: This directory contains the files providing the PCIe Requester filters information used for PTT trace. Each file is named after the supported Endpoint device name ::..
See the description of the "filter" in Documentation/trace/hisi-ptt.rst
for more information.
What: /sys/devices/hisi_ptt<sicl_id>_<core_id>/requester_filters/multiselect Date: May 2023 KernelVersion: 6.5 Contact: Yicong Yang yangyicong@hisilicon.com Description: (Read) Indicates if this kind of filter can be selected at the same time as others filters, or must be used on it's own. 1 indicates the former case and 0 indicates the latter.
What: /sys/devices/hisi_ptt<sicl_id>_<core_id>/requester_filters/ Date: May 2023 KernelVersion: 6.5 Contact: Yicong Yang yangyicong@hisilicon.com Description: (Read) Indicates the filter value of this Requester filter, which can be used to control the TLP headers to trace by the PTT trace.