linux-imx/Documentation/ABI/testing/sysfs-driver-intel-i915-hwmon
Ashutosh Dixit 4ed22f1e52 drm/i915/hwmon: Use 0 to designate disabled PL1 power limit
On ATSM the PL1 limit is disabled at power up. The previous uapi assumed
that the PL1 limit is always enabled and therefore did not have a notion of
a disabled PL1 limit. This results in erroneous PL1 limit values when the
PL1 limit is disabled. For example at power up, the disabled ATSM PL1 limit
was previously shown as 0 which means a low PL1 limit whereas the limit
being disabled actually implies a high effective PL1 limit value.

To get round this problem, the PL1 limit uapi is expanded to include a
special value 0 to designate a disabled PL1 limit. A read value of 0 means
that the PL1 power limit is disabled, writing 0 disables the limit.

The link between this patch and the bugs mentioned below is as follows:
* Because on ATSM the PL1 power limit is disabled on power up and there
  were no means to enable it, we previously implemented the means to
  enable the limit when the PL1 hwmon entry (power1_max) was written to.
* Now there is a IGT igt@i915_hwmon@hwmon_write which (a) reads orig value
  from all hwmon sysfs  (b) does a bunch of random writes and finally (c)
  restores the orig value read. On ATSM since the orig value is 0, when
  the IGT restores the 0 value, the PL1 limit is now enabled with a value
  of 0.
* PL1 limit of 0 implies a low PL1 limit which causes GPU freq to fall to
  100 MHz. This causes GuC FW load and several IGT's to start timing out
  and gives rise to these Intel CI bugs. After this patch, writing 0 would
  disable the PL1 limit instead of enabling it, avoiding the freq drop
  issue.

v2: Add explanation for bugs mentioned below (Rodrigo)
v3: Eliminate race during PL1 disable and verify (Tvrtko)
    Change return to -ENODEV if verify fails (Tvrtko)

Link: https://gitlab.freedesktop.org/drm/intel/-/issues/8062
Link: https://gitlab.freedesktop.org/drm/intel/-/issues/8060
Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230401024146.1826092-1-ashutosh.dixit@intel.com
2023-04-03 13:28:49 -04:00

2.7 KiB

What: /sys/devices/.../hwmon/hwmon/in0_input Date: February 2023 KernelVersion: 6.2 Contact: intel-gfx@lists.freedesktop.org Description: RO. Current Voltage in millivolt.

	Only supported for particular Intel i915 graphics platforms.

What: /sys/devices/.../hwmon/hwmon/power1_max Date: February 2023 KernelVersion: 6.2 Contact: intel-gfx@lists.freedesktop.org Description: RW. Card reactive sustained (PL1/Tau) power limit in microwatts.

	The power controller will throttle the operating frequency
	if the power averaged over a window (typically seconds)
	exceeds this limit. A read value of 0 means that the PL1
	power limit is disabled, writing 0 disables the
	limit. Writing values > 0 will enable the power limit.

	Only supported for particular Intel i915 graphics platforms.

What: /sys/devices/.../hwmon/hwmon/power1_rated_max Date: February 2023 KernelVersion: 6.2 Contact: intel-gfx@lists.freedesktop.org Description: RO. Card default power limit (default TDP setting).

	Only supported for particular Intel i915 graphics platforms.

What: /sys/devices/.../hwmon/hwmon/power1_max_interval Date: February 2023 KernelVersion: 6.2 Contact: intel-gfx@lists.freedesktop.org Description: RW. Sustained power limit interval (Tau in PL1/Tau) in milliseconds over which sustained power is averaged.

	Only supported for particular Intel i915 graphics platforms.

What: /sys/devices/.../hwmon/hwmon/power1_crit Date: February 2023 KernelVersion: 6.2 Contact: intel-gfx@lists.freedesktop.org Description: RW. Card reactive critical (I1) power limit in microwatts.

	Card reactive critical (I1) power limit in microwatts is exposed
	for client products. The power controller will throttle the
	operating frequency if the power averaged over a window exceeds
	this limit.

	Only supported for particular Intel i915 graphics platforms.

What: /sys/devices/.../hwmon/hwmon/curr1_crit Date: February 2023 KernelVersion: 6.2 Contact: intel-gfx@lists.freedesktop.org Description: RW. Card reactive critical (I1) power limit in milliamperes.

	Card reactive critical (I1) power limit in milliamperes is
	exposed for server products. The power controller will throttle
	the operating frequency if the power averaged over a window
	exceeds this limit.

	Only supported for particular Intel i915 graphics platforms.

What: /sys/devices/.../hwmon/hwmon/energy1_input Date: February 2023 KernelVersion: 6.2 Contact: intel-gfx@lists.freedesktop.org Description: RO. Energy input of device or gt in microjoules.

	For i915 device level hwmon devices (name "i915") this
	reflects energy input for the entire device. For gt level
	hwmon devices (name "i915_gtN") this reflects energy input
	for the gt.

	Only supported for particular Intel i915 graphics platforms.