
add support for i.MX8DXL/QXP/QM Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com> Acked-by: Rahul Kumar Yadav <rahulkumar.yadav@nxp.com> Acked-by: Vabhav Sharma <vabhav.sharma@nxp.com> Acked-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com> Acked-by: Jason Liu <jason.hui.liu@nxp.com>
2.3 KiB
SPDX-License-Identifier: GPL-2.0-only
config IMX_DSP tristate "IMX DSP Protocol driver" depends on IMX_MBOX help This enables DSP IPC protocol between host AP (Linux) and the firmware running on DSP. DSP exists on some i.MX8 processors (e.g i.MX8QM, i.MX8QXP).
It acts like a doorbell. Client might use shared memory to
exchange information with DSP side.
config IMX_SCU bool "IMX SCU Protocol driver" depends on IMX_MBOX select SOC_BUS help The System Controller Firmware (SCFW) is a low-level system function which runs on a dedicated Cortex-M core to provide power, clock, and resource management. It exists on some i.MX8 processors. e.g. i.MX8QM (QM, QP), and i.MX8QX (QXP, DX).
This driver manages the IPC interface between host CPU and the
SCU firmware running on M4.
config IMX_SCU_PD bool "IMX SCU Power Domain driver" depends on IMX_SCU help The System Controller Firmware (SCFW) based power domain driver.
config IMX_ISPMU tristate "IMX ISP MU Protocol driver" depends on IMX_MBOX help The ISP Firmware is a low-level code that manages the ISP core and runs on a dedicated Cortex-M core to provide queue and resource management of the ISP core.
This driver manages the IPC interface between host CPU and the
ISP firmware running on M0+ core.
config IMX_SEC_ENCLAVE tristate "i.MX Embedded Secure Enclave - EdgeLock Enclave Firmware driver." depends on IMX_MBOX && ARCH_MXC && ARM64 select FW_LOADER default m if ARCH_MXC
help
It is possible to use APIs exposed by the iMX Secure Enclave HW IP called:
- EdgeLock Enclave Firmware (for i.MX8ULP, i.MX93, i.MX95),
- SECO (for i.MX8DXL, i.MXQM, i.MXQXP),
like base, HSM, V2X & SHE using the SAB protocol via the shared Messaging
Unit. This driver exposes these interfaces via a set of file descriptors
allowing to configure shared memory, send and receive messages.
config IMX_ELE_TRNG bool "i.MX ELE True Random Number Generator" depends on IMX_SEC_ENCLAVE default y select CRYPTO_RNG select HW_RANDOM
help
With platforms having secure enclave as the only true source for
generating true random number, the config CONFIG_ELE_TRNG needs to be enabled.
This config helps provides kernel-side support for the Random Number generation,
through NXP hardware IP for secure-enclave(s), called EdgeLock Enclave.