de750c69a7
If the phylink_pcs is in the MLO_AN_C73 mode, then the Lynx PCS makes use of the AN/LT block to advertise the supported backplane link modes using clause 73 autoneg. Note that we could also be advertising BASE-CR link modes (for SFP28 modules) but we don't have a way of detecting the medium type, so we just hardcode backplane (BASE-K) for now. Note that we find out whether we operate in MLO_AN_C73 mode a bit late (later than lynx_pcs_create()). So we need mtip_backplane_create() to not actually do anything until we know that C73 is required, and delay any configuration until the phylink state machine kicks in. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
1.1 KiB
SPDX-License-Identifier: GPL-2.0-only
PCS Layer Configuration
menu "PCS device drivers"
config MTIP_BACKPLANE_PHY tristate "MoreThanIP copper backplane PHYs" help Enable support for the MoreThanIP copper backplane Auto-Negotiation and Link Training blocks, as implemented on the QorIQ and Layerscape SoCs.
config PCS_XPCS tristate select PHYLINK help This module provides helper functions for Synopsys DesignWare XPCS controllers.
config PCS_LYNX depends on MTIP_BACKPLANE_PHY || MTIP_BACKPLANE_PHY=n tristate help This module provides helpers to phylink for managing the Lynx PCS which is part of the Layerscape and QorIQ Ethernet SERDES.
config PCS_MTK_LYNXI tristate select REGMAP help This module provides helpers to phylink for managing the LynxI PCS which is part of MediaTek's SoC and Ethernet switch ICs.
config PCS_RZN1_MIIC tristate "Renesas RZ/N1 MII converter" depends on OF && (ARCH_RZN1 || COMPILE_TEST) help This module provides a driver for the MII converter that is available on RZ/N1 SoCs. This PCS converts MII to RMII/RGMII or can be set in pass-through mode for MII.
endmenu