mirror of
git://git.yoctoproject.org/linux-yocto.git
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Allwinner Device Tree changes for 6.18
This tag contains two DT binding header changes that are shared with the clk tree. In this cycle we gained support for the MCU PRCM clock and reset controller on the A523/A527/T527 family of SoCs, the NPU which is a Vivante GC9000 IP block, and the NPU clock that was missing. The other PRCM clock controller gained default bus clock rate settings. These were not configured in the upstream U-boot bootloader, leading to them running at slower rates. The assigned rates are from the user manual. There is also a new board, the NetCube Systems Nagami SoM and two of its carrier boards. The A523 family development boards now have their internal RTC clocks configured correctly, so that the RTC does not drift wildly. The missing functions for the AXP717 on these boards are added. Missing reset GPIOs and delays for Ethernet PHYs are added. Last, the Cubie A5E now has its LEDs described and usable. An overlay for the Orange Pi Zero interface (addon) board was added. This can be used with the Orange Pi Zero and Zero Plus 2. Default audio routing for these two boards (to be used with the addon) were added to complement the overlay. -----BEGIN PGP SIGNATURE----- iQJCBAABCgAsFiEE2nN1m/hhnkhOWjtHOJpUIZwPJDAFAmjK7T8OHHdlbnNAY3Np ZS5vcmcACgkQOJpUIZwPJDAs/A//dN+3oLNSH1Ua72LdQgOBdmW9V5NmTXQNZUob pKrWnLN5ouZ8bID6o7uQWPngDWGSD0YnDTnsvWWNKS+HPk+JHFDClE1L3+/hLqsQ aXYMr0YdwS0HaiIm3/wCvIH45CIUgPTWnX6uVE9yxsJ8ERwEhO2n08oAcl5wB+x8 ry43T62Xf2u5RpIoxPfKvilMWXewg09LFOzBw9Bp/O0jE5sBYUEDzne5KTtCDg6y /g7n3oD5025v5F6xRWE4NkAXQavayNjPLehXjwxg+WX4OcitRXO3JW3CEv3OvOpQ selj3ueY/PEH6DJxRCHYZeIE63bwH1sMLl6Qj/IWnajO1dHNhADCvCswCGtBU/R+ bJJBaCbjqwYfJ1/8L3Sv6/zwqptl2rNw5aHOfR0AloaIxIqYVWy2LARkI5ba3Ke8 oq+BAlXNkK3MtOGVXGumqoZzOzQEHc0on/WkUMch652zNlRwzviBS6hzZkkreTSH Vk6+Ioy3xbReEq/CnozjUFEOtqiT9jwMFFEBlgpZBcQY/tHTvyrduRKfQWEK9I0f WZwAskmJ56euhr0TZOeA5OfsN/lIISNm8z4wtXCZr9wmAm39xSiFkIIpT/YECUtJ 1wOT0ZbqH7Dcwem9HjL1rlGRPPzdEHNdmFDplQ0mQWSZI9lSpkVq7z7PgNlj41Y4 /aM1/t0= =3psf -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmjTAHQACgkQmmx57+YA GNlbBg/+J2hd4556leePHdJFGU043Dm/OB/e3GRyNBGt0z4ynWyG8+NcJpiRKeGa Mx5kUGJtSPT9jdXNvdw5cm2RUEoJC/wG8aRnYq04V/sg2L82+MuzrYKHf7NXyWWK wjTr6kULZCfLho/MIg1ejgGGEf7XBaH3bNm0gLwr51j/22JijAHnrxWR5xSE29TX zLT09eLrgrXmfE7e2DX4CUfuqEBKHzHhYKBLDz/TzHgqXy/1R9BL9C30PhHmawyO zOr8a/mmwNGQF54NCikTg8JMFowi3LJlcGnVrxdSQoPYYMKxo6tOgKfh5Dd+VUuM QVRiceadcOAsFrlOYukiopw5rEkhvhjK8U+/xMXC0p/0VZXTS4VrbCYSSouV/Q60 KtPpBLlMhXXQfPd4AkGeYictK+BwFFKVs4ZIMGJQgMIHeu7SREYrg4cQSYz2aylu PdPl1Jij37ZPFE8Y9aa9mwjGMgtl+5/oHUBbEnhtqe42d2ImAGPoFXfbgV3i1vDv ioWRrT4ieQ9L88oz3yZC/+f5/1ScKiu1XtLENW7OABiMy9mDALxIpvH+w0u0mQzM 5rE4Juw/6TA6d2kw2PI6UoQ6+kF1I8pZ6xXtlJohwT2z1/a7qc/xnPokulFujr7P OEJe4MG16AXCiE4F5jL0DkoWIdSLB+6LJW81UDJ3Z+tb6sp4VoY= =7iP3 -----END PGP SIGNATURE----- Merge tag 'sunxi-dt-for-6.18' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into soc/dt Allwinner Device Tree changes for 6.18 This tag contains two DT binding header changes that are shared with the clk tree. In this cycle we gained support for the MCU PRCM clock and reset controller on the A523/A527/T527 family of SoCs, the NPU which is a Vivante GC9000 IP block, and the NPU clock that was missing. The other PRCM clock controller gained default bus clock rate settings. These were not configured in the upstream U-boot bootloader, leading to them running at slower rates. The assigned rates are from the user manual. There is also a new board, the NetCube Systems Nagami SoM and two of its carrier boards. The A523 family development boards now have their internal RTC clocks configured correctly, so that the RTC does not drift wildly. The missing functions for the AXP717 on these boards are added. Missing reset GPIOs and delays for Ethernet PHYs are added. Last, the Cubie A5E now has its LEDs described and usable. An overlay for the Orange Pi Zero interface (addon) board was added. This can be used with the Orange Pi Zero and Zero Plus 2. Default audio routing for these two boards (to be used with the addon) were added to complement the overlay. * tag 'sunxi-dt-for-6.18' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: arm64: dts: allwinner: sun55i: Complete AXP717A sub-functions arm64: dts: allwinner: t527: orangepi-4a: hook up external 32k crystal arm64: dts: allwinner: t527: avaota-a1: hook up external 32k crystal arm64: dts: allwinner: a527: cubie-a5e: Drop external 32.768 KHz crystal arm64: dts: sun55i: a523: Assign standard clock rates to PRCM bus clocks ARM: dts: sunxi: add support for NetCube Systems Nagami Keypad Carrier ARM: dts: sunxi: add support for NetCube Systems Nagami Basic Carrier ARM: dts: sunxi: add support for NetCube Systems Nagami SoM riscv: dts: allwinner: d1s-t113: Add pinctrl's required by NetCube Systems Nagami SoM dt-bindings: arm: sunxi: Add NetCube Systems Nagami SoM and carrier board bindings ARM: dts: allwinner: Add Orange Pi Zero Interface Board overlay ARM: dts: allwinner: orangepi-zero-plus2: Add default audio routing ARM: dts: allwinner: orangepi-zero: Add default audio routing arm64: dts: allwinner: a523: Add NPU device node arm64: dts: allwinner: a523: Add MCU PRCM CCU node dt-bindings: clock: sun55i-a523-ccu: Add A523 MCU CCU clock controller dt-bindings: clock: sun55i-a523-ccu: Add missing NPU module clock arm64: dts: allwinner: t527: avaota-a1: Add ethernet PHY reset setting arm64: dts: allwinner: a527: cubie-a5e: Add ethernet PHY reset setting arm64: dts: allwinner: a527: cubie-a5e: Add LEDs Link: https://lore.kernel.org/r/aMrtuZg8HlR--TAt@wens.tw Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
commit
17752efeca
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@ -595,6 +595,14 @@ properties:
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- const: netcube,kumquat
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- const: allwinner,sun8i-v3s
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- description: NetCube Systems Nagami SoM based boards
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items:
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- enum:
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- netcube,nagami-basic-carrier
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- netcube,nagami-keypad-carrier
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- const: netcube,nagami
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- const: allwinner,sun8i-t113s
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- description: NextThing Co. CHIP
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items:
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- const: nextthing,chip
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@ -19,6 +19,7 @@ properties:
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compatible:
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enum:
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- allwinner,sun55i-a523-ccu
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- allwinner,sun55i-a523-mcu-ccu
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- allwinner,sun55i-a523-r-ccu
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reg:
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@ -26,11 +27,11 @@ properties:
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clocks:
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minItems: 4
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maxItems: 5
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maxItems: 9
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clock-names:
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minItems: 4
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maxItems: 5
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maxItems: 9
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required:
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- "#clock-cells"
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@ -63,6 +64,38 @@ allOf:
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- const: iosc
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- const: losc-fanout
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- if:
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properties:
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compatible:
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enum:
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- allwinner,sun55i-a523-mcu-ccu
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then:
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properties:
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clocks:
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items:
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- description: High Frequency Oscillator (usually at 24MHz)
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- description: Low Frequency Oscillator (usually at 32kHz)
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- description: Internal Oscillator
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- description: Audio PLL (4x)
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- description: Peripherals PLL 0 (300 MHz output)
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- description: DSP module clock
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- description: MBUS clock
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- description: PRCM AHB clock
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- description: PRCM APB0 clock
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clock-names:
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items:
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- const: hosc
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- const: losc
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- const: iosc
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- const: pll-audio0-4x
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- const: pll-periph0-300m
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- const: dsp
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- const: mbus
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- const: r-ahb
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- const: r-apb0
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- if:
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properties:
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compatible:
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@ -182,6 +182,7 @@ dtb-$(CONFIG_MACH_SUN7I) += \
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sun7i-a20-wits-pro-a20-dkt.dtb
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# Enables support for device-tree overlays for all pis
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DTC_FLAGS_sun8i-h2-plus-orangepi-zero := -@
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DTC_FLAGS_sun8i-h3-orangepi-lite := -@
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DTC_FLAGS_sun8i-h3-bananapi-m2-plus := -@
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DTC_FLAGS_sun8i-h3-nanopi-m1-plus := -@
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@ -199,6 +200,7 @@ DTC_FLAGS_sun8i-h3-nanopi-r1 := -@
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DTC_FLAGS_sun8i-h3-orangepi-pc := -@
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DTC_FLAGS_sun8i-h3-bananapi-m2-plus-v1.2 := -@
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DTC_FLAGS_sun8i-h3-orangepi-pc-plus := -@
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DTC_FLAGS_sun8i-t113s-netcube-nagami-basic-carrier := -@
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DTC_FLAGS_sun8i-v3s-netcube-kumquat := -@
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dtb-$(CONFIG_MACH_SUN8I) += \
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sun8i-a23-evb.dtb \
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@ -225,6 +227,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \
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sun8i-h2-plus-libretech-all-h3-cc.dtb \
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sun8i-h2-plus-orangepi-r1.dtb \
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sun8i-h2-plus-orangepi-zero.dtb \
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sun8i-h2-plus-orangepi-zero-interface-board.dtb \
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sun8i-h3-bananapi-m2-plus.dtb \
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sun8i-h3-bananapi-m2-plus-v1.2.dtb \
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sun8i-h3-beelink-x2.dtb \
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@ -244,6 +247,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \
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sun8i-h3-orangepi-plus.dtb \
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sun8i-h3-orangepi-plus2e.dtb \
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sun8i-h3-orangepi-zero-plus2.dtb \
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sun8i-h3-orangepi-zero-plus2-interface-board.dtb \
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sun8i-h3-rervision-dvk.dtb \
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sun8i-h3-zeropi.dtb \
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sun8i-h3-emlid-neutis-n5h3-devboard.dtb \
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@ -257,6 +261,8 @@ dtb-$(CONFIG_MACH_SUN8I) += \
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sun8i-s3-lichee-zero-plus.dtb \
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sun8i-s3-pinecube.dtb \
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sun8i-t113s-mangopi-mq-r-t113.dtb \
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sun8i-t113s-netcube-nagami-basic-carrier.dtb \
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sun8i-t113s-netcube-nagami-keypad-carrier.dtb \
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sun8i-t3-cqa3t-bv3.dtb \
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sun8i-v3-sl631-imx179.dtb \
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sun8i-v3s-anbernic-rg-nano.dtb \
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@ -264,6 +270,10 @@ dtb-$(CONFIG_MACH_SUN8I) += \
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sun8i-v3s-licheepi-zero-dock.dtb \
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sun8i-v3s-netcube-kumquat.dtb \
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sun8i-v40-bananapi-m2-berry.dtb
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sun8i-h2-plus-orangepi-zero-interface-board-dtbs += \
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sun8i-h2-plus-orangepi-zero.dtb sun8i-orangepi-zero-interface-board.dtbo
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sun8i-h3-orangepi-zero-plus2-interface-board-dtbs += \
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sun8i-h3-orangepi-zero-plus2.dtb sun8i-orangepi-zero-interface-board.dtbo
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dtb-$(CONFIG_MACH_SUN9I) += \
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sun9i-a80-optimus.dtb \
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sun9i-a80-cubieboard4.dtb
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@ -112,6 +112,20 @@
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};
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};
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/*
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* Audio input/output is exposed on the 13-pin header and can't be used for
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* anything else. However, adapter boards may use different audio routing.
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* - https://linux-sunxi.org/Xunlong_Orange_Pi_Zero#Expansion_Port
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* - Allwinner H3 Datasheet, section 3.1. Pin Characteristics
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*/
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&codec {
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allwinner,audio-routing =
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"Line Out", "LINEOUT",
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"MIC1", "Mic",
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"Mic", "MBIAS";
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status = "disabled";
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};
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&cpu0 {
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cpu-supply = <®_vdd_cpux>;
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};
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@ -99,6 +99,20 @@
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};
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};
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/*
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* Audio input/output is exposed on the 13-pin header and can't be used for
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* anything else. However, adapter boards may use different audio routing.
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* - http://www.orangepi.org/html/hardWare/computerAndMicrocontrollers/details/Orange-Pi-Zero-Plus-2.html
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* - Allwinner H3 Datasheet, section 3.1. Pin Characteristics
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*/
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&codec {
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allwinner,audio-routing =
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"Line Out", "LINEOUT",
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"MIC1", "Mic",
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"Mic", "MBIAS";
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status = "disabled";
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};
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&de {
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status = "okay";
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};
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@ -0,0 +1,46 @@
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// SPDX-License-Identifier: (GPL-2.0-or-later OR X11)
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/*
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* Copyright (C) 2025 J. Neuschäfer <j.ne@posteo.net>
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*
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* Devicetree overlay for the Orange Pi Zero Interface board (OP0014).
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*
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* https://orangepi.com/index.php?route=product/product&product_id=871
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*
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* This overlay applies to the following base files:
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*
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* - arch/arm/boot/dts/allwinner/sun8i-h2-plus-orangepi-zero.dts
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* - arch/arm/boot/dts/allwinner/sun8i-h3-orangepi-zero-plus2.dts
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*/
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/dts-v1/;
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/plugin/;
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&codec {
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status = "okay";
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};
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&de {
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status = "okay";
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};
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&ehci2 {
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status = "okay";
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};
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&ehci3 {
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status = "okay";
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};
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&ir {
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pinctrl-names = "default";
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pinctrl-0 = <&r_ir_rx_pin>;
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status = "okay";
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};
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&ohci2 {
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status = "okay";
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};
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&ohci3 {
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status = "okay";
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};
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@ -0,0 +1,67 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (C) 2025 Lukas Schmid <lukas.schmid@netcube.li>
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*/
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/dts-v1/;
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#include "sun8i-t113s-netcube-nagami.dtsi"
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/ {
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model = "NetCube Systems Nagami Basic Carrier Board";
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compatible = "netcube,nagami-basic-carrier", "netcube,nagami",
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"allwinner,sun8i-t113s";
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};
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&can0 {
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status = "okay";
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};
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&can1 {
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status = "okay";
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};
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&ehci0 {
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status = "okay";
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};
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&ehci1 {
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status = "okay";
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};
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&i2c2 {
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status = "okay";
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||||
};
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&i2s1 {
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status = "okay";
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};
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&mmc0 {
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vmmc-supply = <®_vcc3v3>;
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broken-cd;
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disable-wp;
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bus-width = <4>;
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status = "okay";
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||||
};
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||||
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&ohci0 {
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status = "okay";
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};
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&ohci1 {
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status = "okay";
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||||
};
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&spi1 {
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status = "okay";
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||||
};
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||||
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&usb_otg {
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||||
dr_mode = "otg";
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||||
status = "okay";
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||||
};
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||||
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||||
&usbphy {
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||||
usb0_id_det-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */
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||||
status = "okay";
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||||
};
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||||
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@ -0,0 +1,129 @@
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|||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
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||||
* Copyright (C) 2025 Lukas Schmid <lukas.schmid@netcube.li>
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*/
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||||
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/dts-v1/;
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||||
#include "sun8i-t113s-netcube-nagami.dtsi"
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||||
|
||||
#include <dt-bindings/input/input.h>
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#include <dt-bindings/leds/common.h>
|
||||
|
||||
/ {
|
||||
model = "NetCube Systems Nagami Keypad Carrier Board";
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||||
compatible = "netcube,nagami-keypad-carrier", "netcube,nagami",
|
||||
"allwinner,sun8i-t113s";
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||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
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||||
|
||||
led_status_red: led-status-red {
|
||||
gpios = <&pio 3 16 GPIO_ACTIVE_HIGH>; /* PD16 */
|
||||
color = <LED_COLOR_ID_RED>;
|
||||
function = LED_FUNCTION_STATUS;
|
||||
};
|
||||
|
||||
led_status_green: led-status-green {
|
||||
gpios = <&pio 3 22 GPIO_ACTIVE_HIGH>; /* PD22 */
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
function = LED_FUNCTION_STATUS;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
status = "okay";
|
||||
|
||||
tca8418: keypad@34 {
|
||||
compatible = "ti,tca8418";
|
||||
reg = <0x34>;
|
||||
interrupts-extended = <&pio 5 6 IRQ_TYPE_EDGE_FALLING>; /* PF6 */
|
||||
linux,keymap = <MATRIX_KEY(0x03, 0x00, KEY_NUMERIC_A)
|
||||
MATRIX_KEY(0x03, 0x01, KEY_NUMERIC_1)
|
||||
MATRIX_KEY(0x03, 0x02, KEY_NUMERIC_2)
|
||||
MATRIX_KEY(0x03, 0x03, KEY_NUMERIC_3)
|
||||
MATRIX_KEY(0x02, 0x00, KEY_NUMERIC_B)
|
||||
MATRIX_KEY(0x02, 0x01, KEY_NUMERIC_4)
|
||||
MATRIX_KEY(0x02, 0x02, KEY_NUMERIC_5)
|
||||
MATRIX_KEY(0x02, 0x03, KEY_NUMERIC_6)
|
||||
MATRIX_KEY(0x01, 0x00, KEY_NUMERIC_C)
|
||||
MATRIX_KEY(0x01, 0x01, KEY_NUMERIC_7)
|
||||
MATRIX_KEY(0x01, 0x02, KEY_NUMERIC_8)
|
||||
MATRIX_KEY(0x01, 0x03, KEY_NUMERIC_9)
|
||||
MATRIX_KEY(0x00, 0x00, KEY_NUMERIC_D)
|
||||
MATRIX_KEY(0x00, 0x01, KEY_CLEAR)
|
||||
MATRIX_KEY(0x00, 0x02, KEY_NUMERIC_0)
|
||||
MATRIX_KEY(0x00, 0x03, KEY_OK)
|
||||
>;
|
||||
keypad,num-rows = <4>;
|
||||
keypad,num-columns = <4>;
|
||||
};
|
||||
};
|
||||
|
||||
&pio {
|
||||
gpio-line-names = "", "", "", "", // PA
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "", // PB
|
||||
"", "", "UART3_TX", "UART3_RX",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "eMMC_CLK", "eMMC_CMD", // PC
|
||||
"eMMC_D2", "eMMC_D1", "eMMC_D0", "eMMC_D3",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "", // PD
|
||||
"", "", "", "",
|
||||
"", "USB_SEC_EN", "", "",
|
||||
"", "", "", "",
|
||||
"LED_STATUS_RED", "", "", "",
|
||||
"I2C2_SCL", "I2C2_SDA", "LED_STATUS_GREEN", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"ETH_CRSDV", "ETH_RXD0", "ETH_RXD1", "ETH_TXCK", // PE
|
||||
"ETH_TXD0", "ETH_TXD1", "ETH_TXEN", "",
|
||||
"ETH_MDC", "ETH_MDIO", "QWIIC_nINT", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "", // PF
|
||||
"", "", "KEY_nINT", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"ESP_CLK", "ESP_CMD", "ESP_D0", "ESP_D1", // PG
|
||||
"ESP_D2", "ESP_D3", "UART1_TXD", "UART1_RXD",
|
||||
"ESP_nBOOT", "ESP_nRST", "I2C3_SCL", "I2C3_SDA",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "";
|
||||
};
|
||||
|
||||
&usb_otg {
|
||||
dr_mode = "peripheral";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbphy {
|
||||
status = "okay";
|
||||
};
|
||||
250
arch/arm/boot/dts/allwinner/sun8i-t113s-netcube-nagami.dtsi
Normal file
250
arch/arm/boot/dts/allwinner/sun8i-t113s-netcube-nagami.dtsi
Normal file
|
|
@ -0,0 +1,250 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (C) 2025 Lukas Schmid <lukas.schmid@netcube.li>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
#include "sun8i-t113s.dtsi"
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
/ {
|
||||
model = "NetCube Systems Nagami SoM";
|
||||
compatible = "netcube,nagami", "allwinner,sun8i-t113s";
|
||||
|
||||
aliases {
|
||||
serial1 = &uart1; // ESP32 Bootloader UART
|
||||
serial3 = &uart3; // Console UART on Card Edge
|
||||
ethernet0 = &emac;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial3:115200n8";
|
||||
};
|
||||
|
||||
/* module wide 3.3V supply directly from the card edge */
|
||||
reg_vcc3v3: regulator-3v3 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc-3v3";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
/* SY8008 DC/DC regulator on the board, also supplying VDD-SYS */
|
||||
reg_vcc_core: regulator-core {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc-core";
|
||||
regulator-min-microvolt = <880000>;
|
||||
regulator-max-microvolt = <880000>;
|
||||
vin-supply = <®_vcc3v3>;
|
||||
};
|
||||
|
||||
/* USB0 MUX to switch connect to Card-Edge only after BootROM */
|
||||
usb0_sec_mux: mux-controller{
|
||||
compatible = "gpio-mux";
|
||||
#mux-control-cells = <0>;
|
||||
mux-gpios = <&pio 3 9 GPIO_ACTIVE_HIGH>; /* PD9 */
|
||||
idle-state = <1>; /* USB connected to Card-Edge by default */
|
||||
};
|
||||
|
||||
/* Reset of ESP32 */
|
||||
wifi_pwrseq: wifi-pwrseq {
|
||||
compatible = "mmc-pwrseq-simple";
|
||||
reset-gpios = <&pio 6 9 GPIO_ACTIVE_LOW>; /* PG9 */
|
||||
post-power-on-delay-ms = <1500>;
|
||||
power-off-delay-us = <200>;
|
||||
};
|
||||
};
|
||||
|
||||
&cpu0 {
|
||||
cpu-supply = <®_vcc_core>;
|
||||
};
|
||||
|
||||
&cpu1 {
|
||||
cpu-supply = <®_vcc_core>;
|
||||
};
|
||||
|
||||
&dcxo {
|
||||
clock-frequency = <24000000>;
|
||||
};
|
||||
|
||||
&emac {
|
||||
nvmem-cells = <ð0_macaddress>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
phy-handle = <&lan8720a>;
|
||||
phy-mode = "rmii";
|
||||
pinctrl-0 = <&rmii_pe_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Default I2C Interface on Card-Edge */
|
||||
&i2c2 {
|
||||
pinctrl-0 = <&i2c2_pd_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
/* Exposed as the QWIIC connector and used by the internal EEPROM */
|
||||
&i2c3 {
|
||||
pinctrl-0 = <&i2c3_pg_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
|
||||
eeprom0: eeprom@50 {
|
||||
compatible = "atmel,24c02"; /* actually it's a 24AA02E48 */
|
||||
reg = <0x50>;
|
||||
pagesize = <16>;
|
||||
read-only;
|
||||
vcc-supply = <®_vcc3v3>;
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
eth0_macaddress: macaddress@fa {
|
||||
reg = <0xfa 0x06>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/* Default I2S Interface on Card-Edge */
|
||||
&i2s1 {
|
||||
pinctrl-0 = <&i2s1_pins>, <&i2s1_din0_pin>, <&i2s1_dout0_pin>;
|
||||
pinctrl-names = "default";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
/* Phy is on SoM. MDI signals pre-magnetics are on the card edge */
|
||||
&mdio {
|
||||
lan8720a: ethernet-phy@0 {
|
||||
compatible = "ethernet-phy-ieee802.3-c22";
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
/* Default SD Interface on Card-Edge */
|
||||
&mmc0 {
|
||||
pinctrl-0 = <&mmc0_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
/* Connected to the on-board ESP32 */
|
||||
&mmc1 {
|
||||
pinctrl-0 = <&mmc1_pins>;
|
||||
pinctrl-names = "default";
|
||||
vmmc-supply = <®_vcc3v3>;
|
||||
bus-width = <4>;
|
||||
non-removable;
|
||||
mmc-pwrseq = <&wifi_pwrseq>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Connected to the on-board eMMC */
|
||||
&mmc2 {
|
||||
pinctrl-0 = <&mmc2_pins>;
|
||||
pinctrl-names = "default";
|
||||
vmmc-supply = <®_vcc3v3>;
|
||||
vqmmc-supply = <®_vcc3v3>;
|
||||
bus-width = <4>;
|
||||
non-removable;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pio {
|
||||
vcc-pb-supply = <®_vcc3v3>;
|
||||
vcc-pc-supply = <®_vcc3v3>;
|
||||
vcc-pd-supply = <®_vcc3v3>;
|
||||
vcc-pe-supply = <®_vcc3v3>;
|
||||
vcc-pf-supply = <®_vcc3v3>;
|
||||
vcc-pg-supply = <®_vcc3v3>;
|
||||
|
||||
gpio-line-names = "", "", "", "", // PA
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "CAN0_TX", "CAN0_RX", // PB
|
||||
"CAN1_TX", "CAN1_RX", "UART3_TX", "UART3_RX",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "eMMC_CLK", "eMMC_CMD", // PC
|
||||
"eMMC_D2", "eMMC_D1", "eMMC_D0", "eMMC_D3",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "", // PD
|
||||
"", "", "", "",
|
||||
"", "USB_SEC_EN", "SPI1_CS", "SPI1_CLK",
|
||||
"SPI1_MOSI", "SPI1_MISO", "SPI1_HOLD", "SPI1_WP",
|
||||
"PD16", "", "", "",
|
||||
"I2C2_SCL", "I2C2_SDA", "PD22", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"ETH_CRSDV", "ETH_RXD0", "ETH_RXD1", "ETH_TXCK", // PE
|
||||
"ETH_TXD0", "ETH_TXD1", "ETH_TXEN", "",
|
||||
"ETH_MDC", "ETH_MDIO", "QWIIC_nINT", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"SD_D1", "SD_D0", "SD_CLK", "SD_CLK", // PF
|
||||
"SD_D3", "SD_D2", "PF6", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"ESP_CLK", "ESP_CMD", "ESP_D0", "ESP_D1", // PG
|
||||
"ESP_D2", "ESP_D3", "UART1_TXD", "UART1_RXD",
|
||||
"ESP_nBOOT", "ESP_nRST", "I2C3_SCL", "I2C3_SDA",
|
||||
"I2S1_WS", "I2S1_CLK", "I2S1_DIN0", "I2S1_DOUT0",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "";
|
||||
};
|
||||
|
||||
/* Remove the unused CK pin from the pinctl as it is unconnected */
|
||||
&rmii_pe_pins {
|
||||
pins = "PE0", "PE1", "PE2", "PE3", "PE4",
|
||||
"PE5", "PE6", "PE8", "PE9";
|
||||
};
|
||||
|
||||
/* Default SPI Interface on Card-Edge */
|
||||
&spi1 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
pinctrl-0 = <&spi1_pins>, <&spi1_hold_pin>, <&spi1_wp_pin>;
|
||||
pinctrl-names = "default";
|
||||
cs-gpios = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
/* Connected to the Bootloader/Console of the ESP32 */
|
||||
&uart1 {
|
||||
pinctrl-0 = <&uart1_pg6_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Console/Debug UART on Card-Edge */
|
||||
&uart3 {
|
||||
pinctrl-0 = <&uart3_pb_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};
|
||||
|
|
@ -4,8 +4,10 @@
|
|||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/clock/sun6i-rtc.h>
|
||||
#include <dt-bindings/clock/sun55i-a523-ccu.h>
|
||||
#include <dt-bindings/clock/sun55i-a523-mcu-ccu.h>
|
||||
#include <dt-bindings/clock/sun55i-a523-r-ccu.h>
|
||||
#include <dt-bindings/reset/sun55i-a523-ccu.h>
|
||||
#include <dt-bindings/reset/sun55i-a523-mcu-ccu.h>
|
||||
#include <dt-bindings/reset/sun55i-a523-r-ccu.h>
|
||||
#include <dt-bindings/power/allwinner,sun55i-a523-ppu.h>
|
||||
#include <dt-bindings/power/allwinner,sun55i-a523-pck-600.h>
|
||||
|
|
@ -624,6 +626,8 @@
|
|||
"pll-audio";
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
assigned-clocks = <&r_ccu CLK_R_AHB>, <&r_ccu CLK_R_APB0>;
|
||||
assigned-clock-rates = <200000000>, <100000000>;
|
||||
};
|
||||
|
||||
nmi_intc: interrupt-controller@7010320 {
|
||||
|
|
@ -690,5 +694,42 @@
|
|||
clock-names = "bus", "hosc", "ahb";
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
mcu_ccu: clock-controller@7102000 {
|
||||
compatible = "allwinner,sun55i-a523-mcu-ccu";
|
||||
reg = <0x7102000 0x200>;
|
||||
clocks = <&osc24M>,
|
||||
<&rtc CLK_OSC32K>,
|
||||
<&rtc CLK_IOSC>,
|
||||
<&ccu CLK_PLL_AUDIO0_4X>,
|
||||
<&ccu CLK_PLL_PERIPH0_300M>,
|
||||
<&ccu CLK_DSP>,
|
||||
<&ccu CLK_MBUS>,
|
||||
<&r_ccu CLK_R_AHB>,
|
||||
<&r_ccu CLK_R_APB0>;
|
||||
clock-names = "hosc",
|
||||
"losc",
|
||||
"iosc",
|
||||
"pll-audio0-4x",
|
||||
"pll-periph0-300m",
|
||||
"dsp",
|
||||
"mbus",
|
||||
"r-ahb",
|
||||
"r-apb0";
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
};
|
||||
|
||||
npu: npu@7122000 {
|
||||
compatible = "vivante,gc";
|
||||
reg = <0x07122000 0x1000>;
|
||||
interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mcu_ccu CLK_BUS_MCU_NPU_ACLK>,
|
||||
<&ccu CLK_NPU>,
|
||||
<&mcu_ccu CLK_BUS_MCU_NPU_HCLK>;
|
||||
clock-names = "bus", "core", "reg";
|
||||
resets = <&mcu_ccu RST_BUS_MCU_NPU>;
|
||||
power-domains = <&ppu PD_NPU>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -6,6 +6,7 @@
|
|||
#include "sun55i-a523.dtsi"
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/leds/common.h>
|
||||
|
||||
/ {
|
||||
model = "Radxa Cubie A5E";
|
||||
|
|
@ -20,11 +21,28 @@
|
|||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
ext_osc32k: ext-osc32k-clk {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <32768>;
|
||||
clock-output-names = "ext_osc32k";
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
power-led {
|
||||
function = LED_FUNCTION_POWER;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
gpios = <&r_pio 0 4 GPIO_ACTIVE_LOW>; /* PL4 */
|
||||
default-state = "on";
|
||||
linux,default-trigger = "heartbeat";
|
||||
};
|
||||
|
||||
use-led {
|
||||
function = LED_FUNCTION_ACTIVITY;
|
||||
color = <LED_COLOR_ID_BLUE>;
|
||||
gpios = <&r_pio 0 5 GPIO_ACTIVE_LOW>; /* PL5 */
|
||||
};
|
||||
};
|
||||
|
||||
iio-hwmon {
|
||||
compatible = "iio-hwmon";
|
||||
io-channels = <&axp717_adc 3>, /* vsys_v */
|
||||
<&axp717_adc 4>; /* pmic_temp */
|
||||
};
|
||||
|
||||
reg_vcc5v: vcc5v {
|
||||
|
|
@ -75,6 +93,9 @@
|
|||
ext_rgmii_phy: ethernet-phy@1 {
|
||||
compatible = "ethernet-phy-ieee802.3-c22";
|
||||
reg = <1>;
|
||||
reset-gpios = <&pio 7 8 GPIO_ACTIVE_LOW>; /* PH8 */
|
||||
reset-assert-us = <10000>;
|
||||
reset-deassert-us = <150000>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -125,6 +146,17 @@
|
|||
bldoin-supply = <®_vcc5v>;
|
||||
cldoin-supply = <®_vcc5v>;
|
||||
|
||||
axp717_adc: adc {
|
||||
compatible = "x-powers,axp717-adc";
|
||||
#io-channel-cells = <1>;
|
||||
};
|
||||
|
||||
battery-power {
|
||||
compatible = "x-powers,axp717-battery-power-supply";
|
||||
/* charger mode design but has no battery terminal */
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
regulators {
|
||||
/* Supplies the "little" cluster (1.4 GHz cores) */
|
||||
reg_dcdc1: dcdc1 {
|
||||
|
|
@ -228,6 +260,10 @@
|
|||
regulator-name = "vdd-cpus";
|
||||
};
|
||||
};
|
||||
|
||||
usb-power {
|
||||
compatible = "x-powers,axp717-usb-power-supply";
|
||||
};
|
||||
};
|
||||
|
||||
axp323: pmic@36 {
|
||||
|
|
|
|||
|
|
@ -27,6 +27,12 @@
|
|||
clock-output-names = "ext_osc32k";
|
||||
};
|
||||
|
||||
iio-hwmon {
|
||||
compatible = "iio-hwmon";
|
||||
io-channels = <&axp717_adc 3>, /* vsys_v */
|
||||
<&axp717_adc 4>; /* pmic_temp */
|
||||
};
|
||||
|
||||
reg_vcc12v: vcc12v {
|
||||
/* DC input jack */
|
||||
compatible = "regulator-fixed";
|
||||
|
|
@ -85,6 +91,9 @@
|
|||
ext_rgmii_phy: ethernet-phy@1 {
|
||||
compatible = "ethernet-phy-ieee802.3-c22";
|
||||
reg = <1>;
|
||||
reset-gpios = <&pio 7 8 GPIO_ACTIVE_LOW>; /* PH8 */
|
||||
reset-assert-us = <10000>;
|
||||
reset-deassert-us = <150000>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -146,6 +155,17 @@
|
|||
bldoin-supply = <®_vcc5v>;
|
||||
cldoin-supply = <®_vcc5v>;
|
||||
|
||||
axp717_adc: adc {
|
||||
compatible = "x-powers,axp717-adc";
|
||||
#io-channel-cells = <1>;
|
||||
};
|
||||
|
||||
battery-power {
|
||||
compatible = "x-powers,axp717-battery-power-supply";
|
||||
/* no battery; output used for dcdc4 instead */
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
regulators {
|
||||
/* Supplies the "little" cluster (1.4 GHz cores) */
|
||||
reg_dcdc1: dcdc1 {
|
||||
|
|
@ -252,6 +272,12 @@
|
|||
regulator-name = "vdd-cpus";
|
||||
};
|
||||
};
|
||||
|
||||
usb-power {
|
||||
compatible = "x-powers,axp717-usb-power-supply";
|
||||
/* 12V-5V buck converter can supply up to 5A */
|
||||
input-current-limit-microamp = <3250000>;
|
||||
};
|
||||
};
|
||||
|
||||
axp323: pmic@36 {
|
||||
|
|
@ -306,6 +332,14 @@
|
|||
vcc-pm-supply = <®_aldo3>;
|
||||
};
|
||||
|
||||
&rtc {
|
||||
clocks = <&r_ccu CLK_BUS_R_RTC>, <&osc24M>,
|
||||
<&r_ccu CLK_R_AHB>, <&ext_osc32k>;
|
||||
clock-names = "bus", "hosc", "ahb", "ext-osc32k";
|
||||
assigned-clocks = <&rtc CLK_OSC32K>;
|
||||
assigned-clock-rates = <32768>;
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart0_pb_pins>;
|
||||
|
|
|
|||
|
|
@ -40,6 +40,13 @@
|
|||
};
|
||||
};
|
||||
|
||||
iio-hwmon {
|
||||
compatible = "iio-hwmon";
|
||||
io-channels = <&axp717_adc 3>, /* vsys_v */
|
||||
<&axp717_adc 4>, /* pmic_temp */
|
||||
<&axp717_adc 7>; /* bkup_batt_v */
|
||||
};
|
||||
|
||||
wifi_pwrseq: pwrseq {
|
||||
compatible = "mmc-pwrseq-simple";
|
||||
reset-gpios = <&r_pio 1 1 GPIO_ACTIVE_LOW>; /* PM1 */
|
||||
|
|
@ -174,6 +181,17 @@
|
|||
bldoin-supply = <®_vcc5v>;
|
||||
cldoin-supply = <®_vcc5v>;
|
||||
|
||||
axp717_adc: adc {
|
||||
compatible = "x-powers,axp717-adc";
|
||||
#io-channel-cells = <1>;
|
||||
};
|
||||
|
||||
battery-power {
|
||||
compatible = "x-powers,axp717-battery-power-supply";
|
||||
/* no battery; output used for dcdc4 instead */
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
regulators {
|
||||
/* Supplies the "little" cluster (1.4 GHz cores) */
|
||||
reg_dcdc1: dcdc1 {
|
||||
|
|
@ -288,6 +306,11 @@
|
|||
regulator-name = "vdd-cpus-usb-0v9";
|
||||
};
|
||||
};
|
||||
|
||||
usb-power {
|
||||
compatible = "x-powers,axp717-usb-power-supply";
|
||||
input-current-limit-microamp = <3000000>;
|
||||
};
|
||||
};
|
||||
|
||||
axp323: pmic@36 {
|
||||
|
|
@ -346,6 +369,14 @@
|
|||
vcc-pm-supply = <®_bldo2>;
|
||||
};
|
||||
|
||||
&rtc {
|
||||
clocks = <&r_ccu CLK_BUS_R_RTC>, <&osc24M>,
|
||||
<&r_ccu CLK_R_AHB>, <&ext_osc32k>;
|
||||
clock-names = "bus", "hosc", "ahb", "ext-osc32k";
|
||||
assigned-clocks = <&rtc CLK_OSC32K>;
|
||||
assigned-clock-rates = <32768>;
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart0_pb_pins>;
|
||||
|
|
|
|||
|
|
@ -78,6 +78,36 @@
|
|||
function = "dsi";
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
i2c2_pd_pins: i2c2-pd-pins {
|
||||
pins = "PD20", "PD21";
|
||||
function = "i2c2";
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
i2c3_pg_pins: i2c3-pg-pins {
|
||||
pins = "PG10", "PG11";
|
||||
function = "i2c3";
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
i2s1_pins: i2s1-pins {
|
||||
pins = "PG12", "PG13";
|
||||
function = "i2s1";
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
i2s1_din0_pin: i2s1-din0-pin {
|
||||
pins = "PG14";
|
||||
function = "i2s1_din";
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
i2s1_dout0_pin: i2s1-dout0-pin {
|
||||
pins = "PG15";
|
||||
function = "i2s1_dout";
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
lcd_rgb666_pins: lcd-rgb666-pins {
|
||||
pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5",
|
||||
|
|
@ -126,6 +156,24 @@
|
|||
function = "spi0";
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
spi1_pins: spi1-pins {
|
||||
pins = "PD10", "PD11", "PD12", "PD13";
|
||||
function = "spi1";
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
spi1_hold_pin: spi1-hold-pin {
|
||||
pins = "PD14";
|
||||
function = "spi1";
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
spi1_wp_pin: spi1-wp-pin {
|
||||
pins = "PD15";
|
||||
function = "spi1";
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
uart1_pg6_pins: uart1-pg6-pins {
|
||||
pins = "PG6", "PG7";
|
||||
|
|
|
|||
|
|
@ -185,5 +185,6 @@
|
|||
#define CLK_FANOUT0 176
|
||||
#define CLK_FANOUT1 177
|
||||
#define CLK_FANOUT2 178
|
||||
#define CLK_NPU 179
|
||||
|
||||
#endif /* _DT_BINDINGS_CLK_SUN55I_A523_CCU_H_ */
|
||||
|
|
|
|||
54
include/dt-bindings/clock/sun55i-a523-mcu-ccu.h
Normal file
54
include/dt-bindings/clock/sun55i-a523-mcu-ccu.h
Normal file
|
|
@ -0,0 +1,54 @@
|
|||
/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
|
||||
/*
|
||||
* Copyright (C) 2025 Chen-Yu Tsai <wens@csie.org>
|
||||
*/
|
||||
|
||||
#ifndef _DT_BINDINGS_CLK_SUN55I_A523_MCU_CCU_H_
|
||||
#define _DT_BINDINGS_CLK_SUN55I_A523_MCU_CCU_H_
|
||||
|
||||
#define CLK_MCU_PLL_AUDIO1 0
|
||||
#define CLK_MCU_PLL_AUDIO1_DIV2 1
|
||||
#define CLK_MCU_PLL_AUDIO1_DIV5 2
|
||||
#define CLK_MCU_AUDIO_OUT 3
|
||||
#define CLK_MCU_DSP 4
|
||||
#define CLK_MCU_I2S0 5
|
||||
#define CLK_MCU_I2S1 6
|
||||
#define CLK_MCU_I2S2 7
|
||||
#define CLK_MCU_I2S3 8
|
||||
#define CLK_MCU_I2S3_ASRC 9
|
||||
#define CLK_BUS_MCU_I2S0 10
|
||||
#define CLK_BUS_MCU_I2S1 11
|
||||
#define CLK_BUS_MCU_I2S2 12
|
||||
#define CLK_BUS_MCU_I2S3 13
|
||||
#define CLK_MCU_SPDIF_TX 14
|
||||
#define CLK_MCU_SPDIF_RX 15
|
||||
#define CLK_BUS_MCU_SPDIF 16
|
||||
#define CLK_MCU_DMIC 17
|
||||
#define CLK_BUS_MCU_DMIC 18
|
||||
#define CLK_MCU_AUDIO_CODEC_DAC 19
|
||||
#define CLK_MCU_AUDIO_CODEC_ADC 20
|
||||
#define CLK_BUS_MCU_AUDIO_CODEC 21
|
||||
#define CLK_BUS_MCU_DSP_MSGBOX 22
|
||||
#define CLK_BUS_MCU_DSP_CFG 23
|
||||
#define CLK_BUS_MCU_NPU_HCLK 24
|
||||
#define CLK_BUS_MCU_NPU_ACLK 25
|
||||
#define CLK_MCU_TIMER0 26
|
||||
#define CLK_MCU_TIMER1 27
|
||||
#define CLK_MCU_TIMER2 28
|
||||
#define CLK_MCU_TIMER3 29
|
||||
#define CLK_MCU_TIMER4 30
|
||||
#define CLK_MCU_TIMER5 31
|
||||
#define CLK_BUS_MCU_TIMER 32
|
||||
#define CLK_BUS_MCU_DMA 33
|
||||
#define CLK_MCU_TZMA0 34
|
||||
#define CLK_MCU_TZMA1 35
|
||||
#define CLK_BUS_MCU_PUBSRAM 36
|
||||
#define CLK_MCU_MBUS_DMA 37
|
||||
#define CLK_MCU_MBUS 38
|
||||
#define CLK_MCU_RISCV 39
|
||||
#define CLK_BUS_MCU_RISCV_CFG 40
|
||||
#define CLK_BUS_MCU_RISCV_MSGBOX 41
|
||||
#define CLK_MCU_PWM0 42
|
||||
#define CLK_BUS_MCU_PWM0 43
|
||||
|
||||
#endif /* _DT_BINDINGS_CLK_SUN55I_A523_MCU_CCU_H_ */
|
||||
30
include/dt-bindings/reset/sun55i-a523-mcu-ccu.h
Normal file
30
include/dt-bindings/reset/sun55i-a523-mcu-ccu.h
Normal file
|
|
@ -0,0 +1,30 @@
|
|||
/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
|
||||
/*
|
||||
* Copyright (C) 2025 Chen-Yu Tsai <wens@csie.org>
|
||||
*/
|
||||
|
||||
#ifndef _DT_BINDINGS_RST_SUN55I_A523_MCU_CCU_H_
|
||||
#define _DT_BINDINGS_RST_SUN55I_A523_MCU_CCU_H_
|
||||
|
||||
#define RST_BUS_MCU_I2S0 0
|
||||
#define RST_BUS_MCU_I2S1 1
|
||||
#define RST_BUS_MCU_I2S2 2
|
||||
#define RST_BUS_MCU_I2S3 3
|
||||
#define RST_BUS_MCU_SPDIF 4
|
||||
#define RST_BUS_MCU_DMIC 5
|
||||
#define RST_BUS_MCU_AUDIO_CODEC 6
|
||||
#define RST_BUS_MCU_DSP_MSGBOX 7
|
||||
#define RST_BUS_MCU_DSP_CFG 8
|
||||
#define RST_BUS_MCU_NPU 9
|
||||
#define RST_BUS_MCU_TIMER 10
|
||||
#define RST_BUS_MCU_DSP_DEBUG 11
|
||||
#define RST_BUS_MCU_DSP 12
|
||||
#define RST_BUS_MCU_DMA 13
|
||||
#define RST_BUS_MCU_PUBSRAM 14
|
||||
#define RST_BUS_MCU_RISCV_CFG 15
|
||||
#define RST_BUS_MCU_RISCV_DEBUG 16
|
||||
#define RST_BUS_MCU_RISCV_CORE 17
|
||||
#define RST_BUS_MCU_RISCV_MSGBOX 18
|
||||
#define RST_BUS_MCU_PWM0 19
|
||||
|
||||
#endif /* _DT_BINDINGS_RST_SUN55I_A523_MCU_CCU_H_ */
|
||||
Loading…
Reference in New Issue
Block a user