Commit Graph

696 Commits

Author SHA1 Message Date
Pankaj Gupta
1ed1a4c7d1 LF-15735: drivers: crypto: caam: fix mx8ulp caam probe
Fixes a bug in the CAAM probe on i.MX8ULP.

Due to the change of device-tree node name of secure-enclave,
was not updated in CAAM driver.

Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
2025-07-01 22:01:29 +05:30
Nikhil Singla
771523316e LF-11540: Update object field of struct tagged_object
Issue:
-- Memory corruption issue on CAAM tagged key driver when
used CONFIG_FORTIFY_SOURCE to harden memory/str functions.

Fix:
-- Updated object field in struct tagged_object from
   char variable to flexible char array to resolve overflow error.
-- Updated address reference to the object field accordingly.

Signed-off-by: Nikhil Singla <nikhil.singla@nxp.com>
2024-04-01 09:18:50 +02:00
Kshitiz Varshney
3da4363a26 caamhash.c: Added Check for offloading hash operations on CAAM
This commit adds CRYPTO_ALG_KERN_DRIVER_ONLY flag which offloads hash
operations on CAAM hardware.

Signed-off-by: Kshitiz Varshney <kshitiz.varshney@nxp.com>
2024-01-17 10:28:27 +01:00
Dong Aisheng
6a286d5ba3 LF-10426 crypto: caam: use new imx8ulp ele compatible string
The ele compatible string has been changed since the commit 99c79d49cb
("LF-10329: arm64: dts: imx8ulp-evk: added nxp secure enclave firmware")
So need update the driver accordingly.

Reviewed-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
2023-11-03 14:28:55 +08:00
Gaurav Jain
138638223a crypto: caam/jr - fix Chacha20 + Poly1305 self test failure
key buffer is not copied in chachapoly_setkey function,
results in wrong output for encryption/decryption operation.

fix this by memcpy the key in caam_ctx key arrary

Fixes: d6bbd4eea2 ("crypto: caam/jr - add support for Chacha20 + Poly1305")
Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
2023-10-30 17:37:37 +08:00
Gaurav Jain
e9f5e0c8fb LF-9911 crypto: caam/qi2 - fix Chacha20 + Poly1305 self test failure
key buffer is not copied in chachapoly_setkey function,
results in wrong output for encryption/decryption operation.

fix this by memcpy the key in caam_ctx key arrary

Fixes: c10a533679 ("crypto: caam/qi2 - add support for Chacha20 + Poly1305")
Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
2023-10-30 17:37:37 +08:00
Meenakshi Aggarwal
b49130a754 LF-10152: crypto:caam suspend/resume crash dump on imx8ulp
Fix PM resume issue on imx8ulp board

Add check for scu_en which will bypass the save/restore
caam state in kernel

Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
2023-10-30 17:37:37 +08:00
Meenakshi Aggarwal
f5ad044909 crypto/caam: compilation error fix
Add changes introduced by
commit-id:623814c0408771399c4209db73f60685f7cf1d14
in non-upstream patches

Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
2023-10-30 17:37:37 +08:00
Meenakshi Aggarwal
30753292bf LF-9578: crypto : caam : Fix crash in self test
Replace non-dma API with dma API

Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
2023-10-30 17:37:37 +08:00
Vabhav Sharma
2ea72d2ba8 LF-6722: drivers/crypto: caam/snvs: SNVS state during linux boot
SNVS HP state is read incorrectly because there is Software dependency
between SECVIO and CAAM driver.

Added code to read SNVS version ID register which contain non-zero
constants to identify the endianness of the device. This register includes
a 16-bit field called IP_ID, and seems to have one of four different values
0x003A, 0x003C, 0x003E or 0x003F.

Signed-off-by: Vabhav Sharma <vabhav.sharma@nxp.com>
Reviewed-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Reviewed-by: Horia Geanta <horia.geanta@nxp.com>
2023-10-30 17:37:37 +08:00
Vabhav Sharma
4d74b8dc00 LF-6118-3: crypto: caam: read entropy delay from device tree
Read entropy-delay property from device tree for
TRNG configuration.

update the value if entry is missing in DT.

Signed-off-by: Vabhav Sharma <vabhav.sharma@nxp.com>
Reviewed-by: Gaurav Jain <gaurav.jain@nxp.com>
Reviewed-by: Horia Geanta <horia.geanta@nxp.com>
2023-10-30 17:37:37 +08:00
Pankaj Gupta
2c6d276b53 crypto: caam/qi - use QBMan (NXP) SDK driver
Update caam/qi to work with QBMan from NXP SDK.
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>

Squashed "crypto: caam/qi - fix FD congestion weight" fix.
Signed-off-by: Vlad Pelin <vlad.pelin@nxp.com>

Solved rebase conflicts.

CAAM QI : Reverting the NAPI changes to work with SDK QI:

- Changes from f84754dbc5
  Author: Sebastian Andrzej Siewior bigeasy@linutronix.de
  Date:   Mon Nov 2 00:22:55 2020 +0100

  soc/fsl/qbman: Add an argument to signal if NAPI processing is required.

  typedef enum qman_cb_dqrr_result (*qman_cb_dqrr)(struct qman_portal *qm,
                                          struct qman_fq *fq,
  -                                       const struct qm_dqrr_entry *dqrr);
  +                                       const struct qm_dqrr_entry *dqrr,
  +                                       bool sched_napi);

- reverting the complet commit de3f5d9e27.
  Author: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
  Date:   Mon Nov 2 00:22:57 2020 +0100

    crypto: caam: Replace in_irq() usage.

Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Reviewed-by: Leo Li <leoyang.li@nxp.com>
2023-10-30 17:37:37 +08:00
Pankaj Gupta
d420f224ee MLK-25247 crypto: caam check for inaccess to controller's register page
iMX8ULP have a EdgeLock Enclave(ELE) that control access to
caam controller's register page.
At all, if the ELE release access to CAAM controller's register page,
it will release to secure-world only.

caam driver needs to be aware of ELE f/w presence, since some things
are done differently:

1. clocks are turned on automatically for iMX8ULP.
   there exists the caam clock gating bit,
   but it is not advised to gate the clock at linux,
   as optee-os or any other entity might be using it.

2. there is no access to caam controller's register page

3. as a consequence of "2.", part of the initialization is moved
   in f/w (TF-A etc.), e.g. RNG initialization

Signed-off-by: Varun Sethi <v.sethi@nxp.com>
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
2023-10-30 17:37:37 +08:00
Pankaj Gupta
cc19bb9c41 Revert "MLK-25247 crypto: caam check for inaccess to controller's register page"
This reverts commit d5923eb5d8.
2023-10-30 17:37:37 +08:00
Horia Geantă
04c3c66b00 LF-5355 crypto: caam/qi2 - fix typo in tls algorithm registration
Fix the typos when trying to register tls algorithms:
-"tls11(hmac(sha1),cbc(aes))" uses OP_ALG_ALGSEL_SHA256
instead of OP_ALG_ALGSEL_SHA1
-"tls12(hmac(sha256),cbc(aes))" uses OP_ALG_ALGSEL_SHA1
instead of OP_ALG_ALGSEL_SHA256

Fixes: c3eb2dcfb0 ("crypto: caam - added support for TLS1.1 & TLS1.2")
Verified-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
2023-10-30 17:37:36 +08:00
Kshitiz Varshney
ba1b47c47b LF-5095: crypto-caam: Solved 0x00 issue in caam-keygen
Caam-keygen application is passing key value in uint8_t array (in case of
hex input) but kernel is calculating length with the help of strlen()
function.
Hence, replaced strlen() function with actual key_value_len which is a
member variable of structure caam_keygen_cmd (passed by user-space
application to kernel).

Fixes: 3af836d4b3 ("MLK-24420-3 crypto: caam - add ioctl calls for black keys and blobs generation")
Signed-off-by: Kshitiz Varshney <kshitiz.varshney@nxp.com>
Reviewed-by: Horia Geantă <horia.geanta@nxp.com>
2023-10-30 17:37:36 +08:00
Gaurav Jain
a2c4b39b40 LF-4946 crypto: caam: set bus frequency high during hwrng operation.
issue:
when bus frequency set to low, error reported duing hwrng operation.
"Busfreq OPTEE set from 533000000 to 24000000 start..."
"Busfreq OPTEE set to 24000000 done! cpu=0"
"caam_jr 30902000.jr: 2000005b: CCB: desc idx 0: RNG: Hardware error"

fix:
TRNG configuration fails to work with low bus frequency(24Mhz).
so request high bus frequency before hwrng operation start
and release high bus frequency after completion of hwrng operation.

Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Signed-off-by: Varun Sethi <V.Sethi@nxp.com>
Signed-off-by: Horia Geanta <horia.geanta@nxp.com>
Reviewed-by: Horia Geantă <horia.geanta@nxp.com>
2023-10-30 17:37:36 +08:00
Pankaj Gupta
74ca2ec3bd LF-4832 iMX8ULP caam: fix for failure in probe
For iMX8ULP, Nomenclature changes for Secure Enclave
driver, from imx8ulp-s400 to imx-sentnl.

Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Reviewed-by: Horia Geantă <horia.geanta@nxp.com>
2023-10-30 17:37:36 +08:00
Pankaj Gupta
0a756eeb94 crypto: caam - added support for TLS1.1 & TLS1.2
Enabled the support for TLS1.2 algorithms offload

        - aes-128-cbc-hmac-sha256
        - aes-256-cbc-hmac-sha256

Enabled the support of TLS1.1 algorithms offload

        - aes-128-cbc-hmac-sha1
        - aes-256-cbc-hmac-sha1

Support for the obsolete TLS1.0 is removed from the caam
driver.

Signed-off-by: Arun Pathak <arun.pathak@nxp.com>
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
2023-10-30 17:37:36 +08:00
Pankaj Gupta
3796662428 MLK-25247 crypto: caam check for inaccess to controller's register page
iMX8ULP have a S400 that control access to caam controller's register
page.
At all, if the S400 release access to CAAM controller's register page,
it will release to secure-world only.

caam driver needs to be aware of S400 f/w presence, since some things
are done differently:

1. clocks are turned on automatically for iMX8ULP.
there exists the caam clock gating bit, but it is not advised to gate the clock
at linux, as optee-os or any other entity might be using it.

2. there is no access to caam controller's register page

3. as a consequence of "2.", part of the initialization is moved
in f/w (TF-A etc.), e.g. RNG initialization

Signed-off-by: Varun Sethi <v.sethi@nxp.com>
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
2023-10-30 17:37:36 +08:00
Horia Geantă
82c9731a49 LF-3093-2 crypto: caam - fix sm_test in case no job rings available
In case no job rings are available, secure memory structures are not
initialized, since caam_jr_probe()->init_misc_func()->caam_sm_startup()
is not called.
This could happen if all job ring devices bind to the jr uio driver
instead of the caam/jr driver.
Running sm_test in this case will lead to a crash.

Add a check to verify that SM has been initialized - if not the tests
will be skipped.

Reported-by: Gaurav Jain <gaurav.jain@nxp.com>
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Reviewed-by: Gaurav Jain <gaurav.jain@nxp.com>
2023-10-30 17:37:36 +08:00
Horia Geantă
16107add45 LF-3093-1 crypto: caam/jr - fix caam-keygen exit / clean-up
Introduction
===

Currently we are facing some limitations in the caam/jr module lifecycle.
There are some discussion in upstream:
Link: https://lore.kernel.org/linux-crypto/20190904023515.7107-13-andrew.smirnov@gmail.com
Link: https://lore.kernel.org/linux-crypto/20191105151353.6522-1-andrew.smirnov@gmail.com
but in the end it all seems to get down to implementations not being able
to gracefully unregister crypto algorithms from crypto API while there are
users / allocated tfms (cra_refcnt > 1).

[*] OTOH functionalities in caam/jr that don't interact with crypto API
(like Secure Memory or black keys / blobs generation) don't face this
limitation.

Issue at hand
===

When unloading the caam_jr module, the .remove callback for the last JR
device exits with -EBUSY (see "Introduction" above) and doesn't perform
the clean-up (crypto algorithms unregistering etc.).

One side effect of this is leeding to an oops, which occurs due to a
corruption in the linked list of "misc devices"
(drivers/char/misc.c - misc_list):
1. caam_jr module is unloaded without calling unregister_algs()->
caam_keygen_exit()->misc_deregister() for the last job ring device;
this leaves a dangling entry in the misc_list double-linked list
2. rng_core module is unloaded and calls misc_deregister(); this implies
removing the corresponding entry in the misc_list; while doing this the
dangling entry is accessed - which leads to an oops since the address is
no longer valid (address points to the caam_jr module address space,
but caam_jr has been previously unloaded).

Fix this by moving the clean-up of non-crypto related functionalities [*]
before crypto related ones.

Fixes: 3af836d4b3 ("MLK-24420-3 crypto: caam - add ioctl calls for black keys and blobs generation")
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Reviewed-by: Gaurav Jain <gaurav.jain@nxp.com>
2023-10-30 17:37:36 +08:00
Iuliana Prodan
69afd2d4dd MLK-24420-3 crypto: caam - add ioctl calls for black keys and blobs generation
This patch adds the Kernel support for the caam-keygen user-space
application. It has two IOCTL calls for key and blob generation and
import a black key from a blob.

This support is included in CRYPTO_DEV_FSL_CAAM_TK_API (tagged key
support).

Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
Reviewed-by: Horia Geantă <horia.geanta@nxp.com>
(cherry picked from commit 60baeafa83)

Squashed fixes:
dd746ff046 ("MLK-24496 crypto: caam - add tag object header to blob")
b8c49eddfd ("MLK-24517-3 crypto: caam - add null terminator to temporary buffer")
d7c41169bc ("MLK-24517-4 crypto: caam - validate arguments received from user-space")

Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
Reviewed-by: Horia Geantă <horia.geanta@nxp.com>
2023-10-30 17:37:36 +08:00
Iuliana Prodan
e60fcf9fdb MLK-24420-2 crypto: caam - add support for black keys and blobs
CAAM's Black Key mechanism is intended for protection
of user keys against bus snooping. This automatically
encapsulates and decapsulates cryptographic keys ''on-the-fly''
in an encrypted data structure called a Black Key.
Before a value is copied from a Key Register to memory,
CAAM will automatically encrypt the key as a Black Key
(encrypted key) using the current value in the JDKEKR or
TDKEKR as the encryption key.

CAAM's built-in Blob Protocol provides a method for protecting
user-defined data across system power cycles. CAAM protects data
in a data structure called a Blob, which provides both confidentiality
and integrity protection. The data to be protected is encrypted so that
it can be safely placed into non-volatile storage before the SoC is
powered down.

This patch includes the support to generate a black key from random or
from a plaintext. Also one can encapsulate it into a blob or decapsulate
a black key from a blob.
The key and blob generation descriptors are exported into a separate file,
such that they could be shared with other interfaces (qi, qi2).

This feature has support only for black keys, encapsulated in
black blobs in General Memory.

In caamkeyblob_test.c file is a test that validates the above
operations: create a black key from plaintext or from random,
encapsulate and decapsulate a blob and compare the obtained black key.
This test is configured as a kernel module.

Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com>
Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
Reviewed-by: Horia Geantă <horia.geanta@nxp.com>
(cherry picked from commit 84287c5d3b)

Squashed fixes:
9c24012e6b ("MLK-24496 crypto: caam - fix blob encapsulation/decapsulation")
cd078fac33 ("MLK-24517-1 crypto: caam - removed unnecessary validation of black key for blob decapsulation")
8888926c54 ("MLK-24517-2 crypto: caam - removed unnecessary validation of black key for blob encapsulation")
e4b484ce2d ("MLK-24497 crypto: caam - update job descriptor with inline commands")

Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
Reviewed-by: Horia Geantă <horia.geanta@nxp.com>

Squashed LF commit (rebase-v5.10-rc2/crypto/caam):
035f5933cc45 ("crypto: caam: change kzfree to kfree_sensitive")

Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
2023-10-30 17:37:36 +08:00
Iuliana Prodan
2ca0865718 MLK-24420-1 crypto: caam - update tagged keys functionality and tk transformations for skcipher
Tagged keys are keys that contain metadata indicating what
they are and how to handle them using the new added tag_object API.
A tag object represents the metadata (or simply a header/configuration)
and the actual data (e.g. black key) obtained from hardware.
The support, for tagged keys, to skcipher algorithms, is done by
adding new transformations, with tk prefix to distinguish
between plaintext and tagged keys.
The tk_ transformations can be used directly by their name:
struct sockaddr_alg sa = {
.salg_family = AF_ALG,
.salg_type = "skcipher", /* this selects the symmetric cipher */
.salg_name = "tk(cbc(aes))" /* this is the cipher name */
};
or for dm-crypt, e.g. using dmsetup:
dmsetup -v create encrypted --table "0 $(blockdev --getsz /dev/mmcblk2p10)
crypt capi:tk(cbc(aes))-plain :32:logon:seckey 0 /dev/mmcblk2p10 0 1
sector_size:512".
tk_ transformations will know how to handle tagged keys, by loading the
proper settings for KEY command.

The API expects that the object (the actual data) from a tag object
to be a buffer (defined by address and size).

Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
Reviewed-by: Horia Geantă <horia.geanta@nxp.com>
(cherry picked from commit 04cab5a13d)

Squashed fix:
9ca04c0a00 ("MLK-24497 crypto: caam - update tagged object functionality by adding red key length")

Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
Reviewed-by: Horia Geantă <horia.geanta@nxp.com>
2023-10-30 17:37:35 +08:00
Sandeep Malik
01bba8a807 crypto: caam - add CAAM job ring UIO support
This patch add the support for job ring UIO so
that userspace drivers can have access to the
caam job rings

Signed-off-by: Sandeep Malik <Sandeep.Malik@nxp.com>
Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>

crypto: caam - build config changes (squash to UIO)

Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
2023-10-30 17:37:35 +08:00
Radu Alexe
3a0b71b1ee crypto: caam - add caam_dma device on caam_probe
Dynamically create a platform device for the caam_dma driver
at caam_probe() time.

Signed-off-by: Radu Alexe <radu.alexe@nxp.com>
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>

Use devres for caam_dma platform device unregistering.

Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
2023-10-30 17:37:35 +08:00
Radu Alexe
36016684ee crypto: caam - add functionality used by the caam_dma driver
The caam_dma is a memcpy DMA driver based on the DMA functionality of
the CAAM hardware block. It creates a DMA channel for each JR of the
CAAM. This patch adds functionality that is used by the caam_dma that is
not yet part of the JR driver.

Signed-off-by: Radu Alexe <radu.alexe@nxp.com>
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
2023-10-30 17:37:35 +08:00
Radu Alexe
1f18c7e6ce crypto: caam/qi2 - add support for TLS 1.0 record
TLS 1.0 descriptors run on SEC 4.x or higher. For now, only
tls10(hmac(sha1),cbc(aes)) algorithm is registered by the driver.

Known limitations:
 - when src == dst - there should be no element in the src scatterlist
   array that contains both associated data and message data.
 - when src != dst - associated data is not copied from source into
   destination.
 - for decryption when src != dst the size of the destination should be
   large enough so that the buffer may contain the decrypted authenc and
padded data.

Signed-off-by: Radu Alexe <radu.alexe@nxp.com>
Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com>
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
2023-10-30 17:37:35 +08:00
Radu Alexe
ee6a5f5533 crypto: caam/qi - add support for TLS 1.0 record
TLS 1.0 descriptors run on SEC 4.x or higher.
For now, only tls10(hmac(sha1),cbc(aes)) algorithm
is registered by the driver.

Known limitations:
 - when src == dst - there should be no element in the src scatterlist array
   that contains both associated data and message data.
 - when src != dst - associated data is not copied from source into
   destination.
 - for decryption when src != dst the size of the destination should be
   large enough so that the buffer may contain the decrypted authenc and
   padded data.

Signed-off-by: Tudor Ambarus <tudor-dan.ambarus@nxp.com>
Signed-off-by: Cristian Stoica <cristian.stoica@nxp.com>
Signed-off-by: Alex Porosanu <alexandru.porosanu@nxp.com>
Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com>
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Radu Alexe <radu.alexe@nxp.com>
2023-10-30 17:37:35 +08:00
Radu Alexe
e12b2fd111 crypto: caam - add support for MOVEB command
CHAs of SEC work natively in BE mode. When moving
data to the alignment blocks, swapping is needed
for LE platforms. This is done by means of the MOVEB
command. This patch adds support
to DCL for this command.

Signed-off-by: Alex Porosanu <alexandru.porosanu@freescale.com>
Signed-off-by: Radu Alexe <radu.alexe@nxp.com>
2023-10-30 17:37:35 +08:00
Horia Geantă
0755f82a1f crypto: caam/qi2 - add OPR (Order Preservation) support
During driver upstreaming OPR was removed due to lacking users.
Add OPR back, since in LSDK / LSDK-based ADKs there is at least
one user (ASF / VortiQa IPsec).

Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
2023-10-30 17:37:35 +08:00
Horia Geantă
ff85b67b3c crypto: caam/qi2 - add (unused) dpseci API
During driver upstreaming all unused dpseci API was trimmed down.
Add the API back to be in sync with files provided by MC f/w release.

Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
2023-10-30 17:37:35 +08:00
Franck LENORMAND
e4a5027bb7 MLK-19801-2 crypto: caam - add support of tagged keys in caamalg
A tagged key is a key which has been tagged with metadata
using tag_object.h API.

We add the support for these keys to caamalg.

For each algo of caamalg which supports tagged keys , it is done by:
 - Creating a modified version of the algo
 - Registering the modified version
 - When the modified transform is used, it gets
   the load parameter of the key.

Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com>
(cherry picked from commit 88dee97d985890dbf37cafa7934c476d0ecfd0b3)
(Vipul: Fixed merge conflicts)
Conflicts:
	drivers/crypto/caam/caamalg.c
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
(cherry picked from commit 5adebac40a)

-port from ablkcipher to current skcipher implementation
-since in linux-imx true key_inline was always true: a. simplify
the descriptors and b. use key_cmd_opt to differentiate b/w tk and non-tk
cases
-change commit headline prefix

Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
2023-10-30 17:37:35 +08:00
Franck LENORMAND
ecbfbf984c MLK-19801-1 crypto: caam - add tag functionality
Add functions to tag an object with metadata(configuration).

It is possible to:
 - create metadata:
	- init_tag_object_header
	- init_blackey_conf
	- set_tag_object_conf
 - retrieve metadata:
	- get_tag_object_conf
	- get_blackey_conf

The API expects an object to be a space a memory
with an address and a size.

The implementation of the tag is currently exposed
but users shouldn't access it directly, they should
use the functions provided.

Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com>
(cherry picked from commit ebbb132da8e7f9de7f3d375eff8d87f684feb1eb)
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
(cherry picked from commit 8b6f6b4474)

-make tag functionality depend on JR
-change commit headline prefix

Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
2023-10-30 17:37:35 +08:00
Steve Cornelius
7cab0da0e4 MLKU-25-3 crypto: caam - add Secure Memory support
This is a squash of the following i.MX BSP commits
(rel_imx_4.19.35_1.1.0_rc2)

1.  ae8175a3f1 ("MLK-9710-10 Add CCM defs for FIFO_STORE instruction")
2.  9512280d06 ("MLK-9769-11 Add SM register defs, and expanded driver-private storage.")
3.  a9dc44de81 ("MLK-9769-10 Add Blob command bitdefs.")
4.  8f6a17b419 ("ENGR00289885 [iMX6Q] Add Secure Memory and SECVIO support.")
5.  c7d4f9db10 ("MLK-9710-11 Add internal key cover and external blob export/import to prototype SM-API")
6.  568e449edf ("MLK-9710-12 Adapt sm_test as a black-key handling example")
7.  f42f12d9cb ("MLK-9710-13 Correct size in BLOB_OVERHEAD definition")
8.  022fc2b33f ("MLK-9710-14 Un-pad cache sizes for blob export/import")
9.  8d3e8c3c4d ("MLK-9710-15 Correct size of padded key buffers")
10. 997fb2ff88 ("MLK-9710-5 Unregister Secure Memory platform device upon shutdown")
11. 5316249198 ("MLK-10897-1 ARM: imx7d: Add CAAM support for i.mx7d")
12. 07566f42a4 ("MLK-11103 Missing register in Secure memory configuration v1")
13. 3004636304 ("MLK-12302 caam: Secure Memory platform device creation crashes")
14. 0e6ed5a819 ("MLK-13779 crypto: caam - initialize kslock spinlock")
15. b1254b6b5f ("Add missing NULL checks in CAAM sm")
16. 61f57509bc ("MLK-17992: caam: sm: Fix compilation warnings")
17. 41cf3d4c58 ("MLK-15473-1: crypto: caam: Add CAAM driver support for iMX8 soc family")
18. bb87424812 ("MLK-17253-1: crypto: caam: Fix computation of SM pages addresses")
19. 308796dfae ("MLK-17253-2: crypto: caam: Use correct memory function for Secure Memory")
20. ba2cb6b5fb ("MLK-17732-2: SM store: Support iMX8QX and iMX8QM")
21. de710d376a ("MLK-17674-1: sm_store remove CONFIG_OF")
22. cfcae64743 ("MLK-17674-2: CAAM SM : get base address from device tree")
23. f49ebbd5ee ("MLK-17992: caam: sm: Fix compilation warnings")
24. 345ead4338 ("MLK-17841: crypto: caam: Correct bugs in Secure Memory")
25. c17811f3ff ("MLK-18082: crypto: caam: sm: Fix encap/decap function to handle errors")
26. 41bcba1d4c ("MLK-18082: crypto: caam: sm: Fix descriptor running functions")
27. b7385ab947 ("MLK-20204: drivers: crypto: caam: sm: Remove deadcode")
28. 1d749430cb ("MLK-20204: drivers: crypto: caam: sm: test: Dealloc keyslot properly")
29. 6a5c2d9d35 ("crypto: caam - lower SM test verbosity")
30. 1a6bc92c0c ("MLK-21617: crypto: caam - update SM test error handling")

Signed-off-by: Dan Douglass <dan.douglass@nxp.com>
Signed-off-by: Victoria Milhoan <vicki.milhoan@freescale.com>
Signed-off-by: Steve Cornelius <steve.cornelius@nxp.com>
Signed-off-by: Octavian Purdila <octavian.purdila@nxp.com>
Signed-off-by: Radu Solea <radu.solea@nxp.com>
Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com>
Signed-off-by: Aymen Sghaier <aymen.sghaier@nxp.com>
Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com>

and LF commits (lf-5.4.y-1.0.0-rc2):
31. 4d3a0772bf ("LFV-26 crypto: caam - fix Secure Memory driver init")
32. 97dc4e4fa4 ("LF-63-1 crypto: caam - fix SM test init")

and LF commit (lf-5.4.y-1.0.1-rc1):
33. fabf6de666 ("LF-1602 crypto: caam - fix signals handling in sm_store")

and LF commit (rebase-20200703/crypto/caam):
34. 8d85d700e8d2 ("LF-1116-3 crypto: caam - update the check for the return code of caam_jr_enqueue function")

and LF commit (rebase-20200918/crypto/caam):
35. bfeb0bffc35a ("crypto: caam - build config changes")

and LF commit
36. LF-2487 crypto: caam - fix pointer cast in sm_keystore_slot_import
	( https://linux.nxdi.nxp.com/patchwork/patch/71174/ )

that have been reworked:

4.
-make SM depend on JR
-enable SM, SECVIO only on i.MX SoCs
-fix resource leak - add off_node_put() where needed
-remove unused sm_size

Split commit in three:
1 - SNVS/SECVIO driver
2 - Secure Memory driver
3 - DT changes

11.
Clock handling dropped - logic already upstream.

17.
Keep only Secure Memory related changes.
Changes related to page 0 registers have been added previously.
Other changes are dropped.

21.
Always use first jr in ctrlpriv->jr[] array to access registers
in page 0 (aliased in jr page), irrespective of SCU presence.

35.
Split the patch in three (SECVIO, SM, UIO)

Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
2023-10-30 17:37:35 +08:00
Horia Geantă
3e0e4550c7 MLKU-38-3 crypto: caam - add SNVS / SECVIO support
This is a squash of the following i.MX BSP commits
(rel_imx_4.19.35_1.1.0_rc2)

1. 8f6a17b419 ("ENGR00289885 [iMX6Q] Add Secure Memory and SECVIO support.")
2. 8433c811e9 ("MLK-9710-18 snvs - make SECVIO module device tree correct")
3. 35bbc34e99 ("MLK-9769-23 Replace SECVIO of_irq_to_resource() with irq_of_parse_and_map()")
4. 3ac6edcd92 ("MLK-11360-01 crypto: caam_snvs: add snvs clock management")
5. 9d9ca7a03e ("MLK-11922 i.mx6: Linux 3.14.28 CAAM & SNVS enabled by default. JTAG, DS-5 attachment causes exceptions")
6. fcdaabf1bb ("MLK-17412-01: Fix secvio driver to have same driver name as DTS")

Signed-off-by: Dan Douglass <dan.douglass@nxp.com>
Signed-off-by: Victoria Milhoan <vicki.milhoan@freescale.com>
Signed-off-by: Steve Cornelius <steve.cornelius@nxp.com>
Signed-off-by: Fugang Duan <andy.duan@nxp.com>
Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com>

and LF commits (lf-5.4.y-1.0.1-rc1):

7. 5560b49b53 ("LF-644 crypto: caam - initialize svlock spinlock")
8. ab44d61204 ("MLK-23774 crypto: caam - fix SNVS / SECVIO building as module")

and LF commits (rebase-20200918/crypto/caam):
9.  35b042de1df6 ("crypto: caam - fix snvs clk prepare+enable")
10. bfeb0bffc35a ("crypto: caam - build config changes")

and LF commit
11. MLK-21689 crypto: caam - make snvs clock optional

that have been reworked:

1.
-make SM depend on JR
-enable SM, SECVIO only on i.MX SoCs
-fix resource leak - add off_node_put() where needed

Split commit in three:
- SNVS/SECVIO driver
- Secure Memory driver
- DT changes

3.
JR changes dropped - no longer needed, already upstream in
commit 549077d7d8 ("crypto: caam - check irq_of_parse_and_map for errors")

4.
Split the patch in two:
-DT bindings changes
-driver changes

5.
Fixed conflicts in imx7d.dtsi - added caam_sm and irq_sec_vio nodes.

10.
Split the patch in three (SECVIO, SM, UIO)

Split commit in 3:
-SECVIO/SNVS driver changes
-SECVIO/SNVS DT changes
-Secure Memory DT changes

Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
2023-10-30 17:37:35 +08:00
Horia Geantă
4122956226 MLKU-114-2 crypto: caam - SCU firmware support
Some i.MX8 processors, e.g. i.MX8QM (QM, QP), i.MX8QX (QXP, DX) have a
System Controller Firmware (SCFW) running on a dedicated Cortex-M core
that provides power, clock, and resource management.

caam driver needs to be aware of SCU f/w presence, since some things
are done differently:

1. clocks are under SCU f/w control and are turned on automatically

2. there is no access to controller's register page (note however that
some registers are aliased in job rings' register pages)

It's worth mentioning that due to this, MCFGR[PS] cannot be read
and driver assumes MCFGR[PS] = b'0 - engine using 32-bit address pointers.
This is in sync with the limitation imposed by the
SECO (Security Controller) ROM and f/w running on a dedicated Cortex-M.

3. as a consequence of "2.", part of the initialization is moved in
other f/w (SCU, TF-A etc.), e.g. RNG initialization

Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
2023-10-30 17:37:34 +08:00
Horia Geantă
9c82cca5f1 crypto: caam/qi2 - refactor skipcher, aead {en,de}crypt ops
Commit 1984aaeec3 ("crypto: caam - fix return code in completion callbacks")
made changes in the skcipher and aead *_done() callbacks,
practically the *_encrypt_done() and *_decrypt_done() being the same.

Refactor code such that identical code is removed.
After this it makes sense to refactor also skipcher, aead {en,de}crypt ops.

Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Reviewed-by: Iuliana Prodan <iuliana.prodan@nxp.com>
2023-10-30 17:37:34 +08:00
Linus Torvalds
68cf01760b This update includes the following changes:
API:
 
 - Move crypto engine callback from tfm ctx into algorithm object.
 - Fix atomic sleep bug in crypto_destroy_instance.
 - Move lib/mpi into lib/crypto.
 
 Algorithms:
 
 - Add chacha20 and poly1305 implementation for powerpc p10.
 
 Drivers:
 
 - Add AES skcipher and aead support to starfive.
 - Add Dynamic Boost Control support to ccp.
 - Add support for STM32P13 platform to stm32.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEn51F/lCuNhUwmDeSxycdCkmxi6cFAmTsZkMACgkQxycdCkmx
 i6furw//e6kYK1CTOqidPM6nI0KK1Ok204VXu56H0wM4THZ09ZwcbDNKpvI6vjMi
 XZkKthiayl/1okmpRVP0rPqMWDtxajeu6IUAQqqFGUFU8R7AqCDrOd+te+zlSFWG
 16ySNQO47RND0OzNqZ4ojgCC0n9RpP+zOfndmderZ4EnfXSbodwGUwkcuE7Z96cP
 jNoainO2iwlyMZPlVynrw61O3RxGu/s/ch+uY1mV+TyvAAWoOlzt57gYUs3eGduz
 4Ky+0Ubctg3sfBaqA2Hg6GjtAqG/QUssRyj8YgsFMrgXPHDTbLh6abej39wWo4gz
 ZdC7Bm47hV/yfVdWe2iq3/5iqdILEdPBh3fDh6NNsZ1Jlm3aEZpH9rEXm0k4X2MJ
 A9NDAFVj8dAYVZza7+Y8jPc8FNe+HqN9HYip/2K7g68WAJGWnMc9lq9qGwGmg1Gl
 dn6yM27AgH8B+UljWYM9FS1ZFsc8KCudJavRZqA2d0W3rbXVWAoBBp83ii0yX1Nm
 ZPAblAYMZCDeCtrVrDYKLtGn566rfpCrv3R5cppwHLksGJsDxgWrjG47l9uy5HXI
 u05jiXT11R+pjIU2Wv5qsiUIhyvli6AaiFYHIdZ8fWaovPAOdhrCrN3IryvUVHj/
 LqMcnmW1rWGNYN9pqHn0sQZ730ZJIma0klhTZOn8HPJNbiK68X0=
 =LbcA
 -----END PGP SIGNATURE-----

Merge tag 'v6.6-p1' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6

Pull crypto updates from Herbert Xu:
 "API:
   - Move crypto engine callback from tfm ctx into algorithm object
   - Fix atomic sleep bug in crypto_destroy_instance
   - Move lib/mpi into lib/crypto

  Algorithms:
   - Add chacha20 and poly1305 implementation for powerpc p10

  Drivers:
   - Add AES skcipher and aead support to starfive
   - Add Dynamic Boost Control support to ccp
   - Add support for STM32P13 platform to stm32"

* tag 'v6.6-p1' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: (149 commits)
  Revert "dt-bindings: crypto: qcom,prng: Add SM8450"
  crypto: chelsio - Remove unused declarations
  X.509: if signature is unsupported skip validation
  crypto: qat - fix crypto capability detection for 4xxx
  crypto: drivers - Explicitly include correct DT includes
  crypto: engine - Remove crypto_engine_ctx
  crypto: zynqmp - Use new crypto_engine_op interface
  crypto: virtio - Use new crypto_engine_op interface
  crypto: stm32 - Use new crypto_engine_op interface
  crypto: jh7110 - Use new crypto_engine_op interface
  crypto: rk3288 - Use new crypto_engine_op interface
  crypto: omap - Use new crypto_engine_op interface
  crypto: keembay - Use new crypto_engine_op interface
  crypto: sl3516 - Use new crypto_engine_op interface
  crypto: caam - Use new crypto_engine_op interface
  crypto: aspeed - Remove non-standard sha512 algorithms
  crypto: aspeed - Use new crypto_engine_op interface
  crypto: amlogic - Use new crypto_engine_op interface
  crypto: sun8i-ss - Use new crypto_engine_op interface
  crypto: sun8i-ce - Use new crypto_engine_op interface
  ...
2023-08-29 11:23:29 -07:00
Rob Herring
b0cc7491c9 crypto: drivers - Explicitly include correct DT includes
The DT of_device.h and of_platform.h date back to the separate
of_platform_bus_type before it as merged into the regular platform bus.
As part of that merge prepping Arm DT support 13 years ago, they
"temporarily" include each other. They also include platform_device.h
and of.h. As a result, there's a pretty much random mix of those include
files used throughout the tree. In order to detangle these headers and
replace the implicit includes with struct declarations, users need to
explicitly include the correct includes.

Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2023-08-23 11:04:23 +08:00
Herbert Xu
623814c040 crypto: caam - Use new crypto_engine_op interface
Use the new crypto_engine_op interface where the callback is stored
in the algorithm object.

Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2023-08-18 17:01:10 +08:00
Herbert Xu
4ac1a2d88d crypto: caam - Include internal/engine.h
Inlucde internal/engine.h because this driver uses directly
accesses attributes inside struct crypto_engine.

Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2023-08-18 17:01:10 +08:00
Horia Geantă
23d422a4f1 crypto: caam/jr - fix shared IRQ line handling
There are cases when the interrupt status register (JRINTR) is non-zero,
even though:
1. An interrupt was generated, but it was masked OR
2. There was no interrupt generated at all
for the corresponding job ring.

1. The case when interrupt is masked (JRCFGR_LS[IMSK]=1b'1)
while other events have happened and are being accounted for, e.g.
-JRINTR[HALT]=2b'10 - input job ring underwent a flush of all on-going
jobs and processing of still-existing jobs (sitting in the ring) has been
halted
-JRINTR[HALT]=2b'01 - input job ring is currently undergoing a flush
-JRINTR[ENTER_FAIL]=1b'1 - SecMon / SNVS transitioned to FAIL MODE
It doesn't matter whether these events would assert the interrupt signal
or not, interrupt is anyhow masked.

2. The case when interrupt is not masked (JRCFGR_LS[IMSK]=1b'0), however
the events accounted for in JRINTR do not generate interrupts, e.g.:
-JRINTR[HALT]=2b'01
-JRINTR[ENTER_FAIL]=1b'1 and JRCFGR_MS[FAIL_MODE]=1b'0

Currently in these cases, when the JR interrupt handler is invoked (as a
consequence of JR sharing the interrupt line with other devices - e.g.
the two JRs on i.MX7ULP) it continues execution instead of returning
IRQ_NONE.
This could lead to situations like interrupt handler clearing JRINTR (and
thus also the JRINTR[HALT] field) while corresponding job ring is
suspended and then that job ring failing on resume path, due to expecting
JRINTR[HALT]=b'10 and reading instead JRINTR[HALT]=b'00.

Fix this by checking status of JRINTR[JRI] in the JR interrupt handler.
If JRINTR[JRI]=1b'0, there was no interrupt generated for this JR and
handler must return IRQ_NONE.

Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Reviewed-by: Gaurav Jain <gaurav.jain@nxp.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2023-08-18 17:01:09 +08:00
Iuliana Prodan
e47e6d2aaa crypto: caam - increase the domain of write memory barrier to full system
In caam_jr_enqueue, under heavy DDR load, smp_wmb() or dma_wmb()
fail to make the input ring be updated before the CAAM starts
reading it. So, CAAM will process, again, an old descriptor address
and will put it in the output ring. This will make caam_jr_dequeue()
to fail, since this old descriptor is not in the software ring.
To fix this, use wmb() which works on the full system instead of
inner/outer shareable domains.

Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Reviewed-by: Gaurav Jain <gaurav.jain@nxp.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2023-08-18 17:01:08 +08:00
Gaurav Jain
e306852047 crypto: caam - fix unchecked return value error
error:
Unchecked return value (CHECKED_RETURN)
check_return: Calling sg_miter_next without checking return value

fix:
added check if(!sg_miter_next)

Fixes: 8a2a0dd35f ("crypto: caam - strip input zeros from RSA input buffer")
Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Reviewed-by: Gaurav Jain <gaurav.jain@nxp.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2023-08-18 17:01:08 +08:00
Arnd Bergmann
b52c8c72dd crypto: caam - fix PM operations definition
The newly added PM operations use the deprecated SIMPLE_DEV_PM_OPS() macro,
causing a warning in some configurations:

drivers/crypto/caam/ctrl.c:828:12: error: 'caam_ctrl_resume' defined but not used [-Werror=unused-function]
  828 | static int caam_ctrl_resume(struct device *dev)
      |            ^~~~~~~~~~~~~~~~
drivers/crypto/caam/ctrl.c:818:12: error: 'caam_ctrl_suspend' defined but not used [-Werror=unused-function]
  818 | static int caam_ctrl_suspend(struct device *dev)
      |            ^~~~~~~~~~~~~~~~~
drivers/crypto/caam/jr.c:732:12: error: 'caam_jr_resume' defined but not used [-Werror=unused-function]
  732 | static int caam_jr_resume(struct device *dev)
      |            ^~~~~~~~~~~~~~
drivers/crypto/caam/jr.c:687:12: error: 'caam_jr_suspend' defined but not used [-Werror=unused-function]
  687 | static int caam_jr_suspend(struct device *dev)
      |            ^~~~~~~~~~~~~~~

Use the normal DEFINE_SIMPLE_DEV_PM_OPS() variant now, and use pm_ptr() to
completely eliminate the structure in configs without CONFIG_PM.

Fixes: 322d74752c ("crypto: caam - add power management support")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2023-08-18 16:55:25 +08:00
Herbert Xu
83874b8e97 Revert "crypto: caam - adjust RNG timing to support more devices"
This reverts commit ef492d0803.

This patch breaks the RNG on i.MX8MM.

Reported-by: Bastian Krause <bst@pengutronix.de>
Link: https://lore.kernel.org/all/e1f3f073-9d5e-1bae-f4f8-08dc48adad62@pengutronix.de/
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2023-08-18 16:47:02 +08:00
Horia Geanta
322d74752c crypto: caam - add power management support
Add support for suspend and resume operation for PM in CAAM driver.

When the CAAM goes in suspend, the hardware is considered to do nothing.

On some platforms, the power of the CAAM is not turned off so it keeps
its configuration.
On other platforms, it doesn't so it is necessary to save the state of
the CAAM:
 - JRs MID
 - Address of input and output rings

Signed-off-by: Horia Geanta <horia.geanta@nxp.com>
Signed-off-by: Victoria Milhoan <vicki.milhoan@freescale.com>
Signed-off-by: Dan Douglass <dan.douglass@nxp.com>
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com>
Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Reviewed-by: Gaurav Jain <gaurav.jain@nxp.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2023-08-04 16:59:55 +08:00
Franck LENORMAND
9a6913feb4 crypto: caam - Change structure type representing DECO MID
The structure partid is not suitable to represent the DECO MID register.

This patch replace partid by masterid which is more appropriate.

Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com>
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Reviewed-by: Gaurav Jain <gaurav.jain@nxp.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2023-08-04 16:59:55 +08:00