Auto-update LICENSE file with current recipe licenses

layer.conf: update for the whinlatter release series

.github/workflows/backport.yaml

@@ -0,0 +1,28 @@
+name: Backport labeled merged pull requests
+on:
+  pull_request_target:
+    types: [closed]
+jobs:
+  build:
+    name: Create backport PRs
+    runs-on: ubuntu-latest
+    # Only run when pull request is merged
+    # or when a comment containing `/backport` is created
+    if: github.event.pull_request.merged
+    steps:
+      - uses: actions/checkout@v2
+        with:
+          # Required to find all branches
+          fetch-depth: 0
+      - name: Create backport PRs
+        # Should be kept in sync with `version`
+        uses: zeebe-io/backport-action@v0.0.4
+        with:
+          # Required
+          # Version of the backport-action
+          # Must equal the version in `uses`
+          # Recommended: latest tag or `master`
+          version: v0.0.4
+
+          github_token: ${{ secrets.GITHUB_TOKEN }}
+          github_workspace: ${{ github.workspace }}

.github/workflows/update-license-file.yml

@@ -0,0 +1,35 @@
+name: Update LICENSE file
+
+on:
+  push:
+    paths:
+      - "**/*.bb"
+      - "**/*.inc"
+  schedule:
+    - cron: "0 0 * * *" # Runs daily at midnight
+  workflow_dispatch: # Allows manual run
+
+jobs:
+  update-license:
+    runs-on: ubuntu-latest
+
+    steps:
+      - name: Checkout repository
+        uses: actions/checkout@v3
+
+      - name: Run license generation script
+        run: |
+          ./scripts/generate-license-file
+
+      - name: Commit and push LICENSE file
+        run: |
+          git config --local user.name "github-actions[bot]"
+          git config --local user.email "github-actions[bot]@users.noreply.github.com"
+          git add LICENSE
+          if ! git diff-index --quiet HEAD; then
+            git commit -m "Auto-update LICENSE file with current recipe licenses"
+            git push
+          fi
+
+        env:
+          GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}

.gitignore

@@ -1 +1,5 @@
 *~
+*.bak
+*.orig
+*.rej
+*.swp

LICENSE

@@ -0,0 +1,20 @@
+# License Information
+
+This file lists all licenses used by recipes in the meta-freescale-3rdparty layer.
+
+./recipes-kernel/linux/linux-boundary_6.1.bb: LICENSE = "GPL-2.0-only"
+./recipes-kernel/kernel-module-mcc-toradex/kernel-module-mcc-toradex_1.06+toradex2.bb: LICENSE = "GPL-2.0-only"
+./recipes-connectivity/ti-18xx-wlconf/ti-18xx-wlconf_8.7.3.bb: LICENSE = "GPL-2.0-only"
+./recipes-bsp/broadcom-nvram-config/broadcom-nvram-config.inc: LICENSE = "Proprietary"
+./recipes-bsp/libmcc/libmcc_1.05.1.bb: LICENSE = "GPL-2.0-only | BSD"
+./recipes-bsp/imx-atf/imx-atf-boundary_2.8.bb: LICENSE = "BSD-3-Clause"
+./recipes-bsp/atf/qoriq-atf_1.5.bb: LICENSE = "BSD"
+./recipes-bsp/u-boot/u-boot-script-qoriq_2019.10.bb: LICENSE = "MIT"
+./recipes-bsp/u-boot/u-boot-script-toradex_2020.07.bb: LICENSE = "MIT"
+./recipes-bsp/u-boot/u-boot-qoriq_2019.10.bb: LICENSE = "GPL-2.0-only & BSD-3-Clause & BSD-2-Clause & LGPL-2.0-only & LGPL-2.1-only"
+./recipes-bsp/u-boot/u-boot-toradex_2020.07.bb: LICENSE = "GPL-2.0-or-later"
+./recipes-bsp/u-boot/u-boot-variscite_2018.03.bb: LICENSE = "GPL-2.0-or-later"
+./recipes-bsp/u-boot/u-boot-boundary-common_2022.04.inc: LICENSE = "GPL-2.0-or-later"
+./recipes-bsp/u-boot/u-boot-kontron_2020.01.bb: LICENSE = "GPL-2.0-or-later"
+./recipes-bsp/mqxboot/mqxboot_1.0.1.bb: LICENSE = "GPL-2.0-only | BSD"
+./recipes-core/net-persistent-mac/net-persistent-mac.bb: LICENSE = "MIT"

README

@@ -7,31 +7,32 @@ use with OpenEmbedded and/or Yocto Freescale's BSP layer.
 This layer depends on:
 
 URI: git://git.openembedded.org/openembedded-core
-branch: danny
+branch: master
 revision: HEAD
 
-URI: git://git.yoctoproject.org/meta-fsl-arm
-branch: danny
+URI: git://git.yoctoproject.org/meta-freescale
+branch: master
 revision: HEAD
 
 Contributing
 ------------
 
-To contribute to this layer you should the patches for review to the
-mailing list.
+Please submit any patches against the `meta-freescale-3rdparty` layer by
+using the GitHub pull-request feature.  Fork the repo, make a branch,
+do the work, rebase from upstream, create the pull request.
+
+For some useful guidelines to be followed when submitting patches,
+please refer to:
+http://openembedded.org/wiki/Commit_Patch_Message_Guidelines
+
+Pull requests will be discussed within the GitHub pull-request
+infrastructure. If you want to get informed on new PRs and the
+follow-up discussions please use GitHub's notification system.
 
 Mailing list:
 
-    https://lists.yoctoproject.org/listinfo/meta-freescale
+    https://lists.yoctoproject.org/g/meta-freescale
 
 Source code:
 
-    https://github.com/Freescale/meta-fsl-arm-extra
-
-When creating a patch of the last commit, use
-
-    git format-patch -s --subject-prefix='meta-fsl-arm-extra][PATCH' -1
-
-To send it to the community, use
-
-    git send-email --to meta-freescale@yoctoproject.org <generated patch>
+    https://github.com/Freescale/meta-freescale-3rdparty

classes/image_types_digi.bbclass

@@ -0,0 +1,51 @@
+inherit image_types
+
+do_image_boot_ubifs[depends] += " \
+    mtd-utils-native:do_populate_sysroot \
+    u-boot:do_deploy \
+    virtual/kernel:do_deploy \
+"
+
+IMAGE_CMD:boot.ubifs() {
+	BOOTIMG_FILES_SYMLINK="${DEPLOY_DIR_IMAGE}/${KERNEL_IMAGETYPE}-${MACHINE}.bin"
+	if [ -n "${KERNEL_DEVICETREE}" ]; then
+		for DTB in ${KERNEL_DEVICETREE}; do
+			# Remove potential sub-folders
+			DTB="$(basename ${DTB})"
+			if [ -e "${DEPLOY_DIR_IMAGE}/${DTB}" ]; then
+				BOOTIMG_FILES_SYMLINK="${BOOTIMG_FILES_SYMLINK} ${DEPLOY_DIR_IMAGE}/${DTB}"
+			fi
+		done
+	fi
+
+	# Create temporary folder
+	TMP_BOOTDIR="$(mktemp -d ${IMGDEPLOYDIR}/boot.XXXXXX)"
+
+	# Hard-link BOOTIMG_FILES into the temporary folder with the symlink filename
+	for item in ${BOOTIMG_FILES_SYMLINK}; do
+		orig="$(readlink -e ${item})"
+		ln "${orig}" "${TMP_BOOTDIR}/$(basename ${item})"
+	done
+
+	# Hard-link extlinux.conf file if available
+	if [ "${UBOOT_EXTLINUX}" = "1" ]; then
+		mkdir -p ${TMP_BOOTDIR}/${UBOOT_EXTLINUX_INSTALL_DIR}
+		orig="$(readlink -e ${DEPLOY_DIR_IMAGE}/${UBOOT_EXTLINUX_CONF_NAME})"
+		ln "${orig}" "${TMP_BOOTDIR}${UBOOT_EXTLINUX_INSTALL_DIR}/${UBOOT_EXTLINUX_CONF_NAME}"
+	fi
+
+	# Hard-link boot script if available
+	if [ -n "${UBOOT_BOOTSCRIPT}" ]; then
+		orig="$(readlink -e ${DEPLOY_DIR_IMAGE}/${UBOOT_BOOTSCRIPT})"
+		ln "${orig}" "${TMP_BOOTDIR}/${UBOOT_BOOTSCRIPT}"
+	fi
+
+	# Build UBIFS boot image out of temp folder
+	mkfs.ubifs -r "${TMP_BOOTDIR}" -o "${IMGDEPLOYDIR}/${IMAGE_NAME}.boot.ubifs" ${MKUBIFS_BOOT_ARGS}
+
+	# Remove the temporary folder
+	rm -rf ${TMP_BOOTDIR}
+}
+
+# Remove the default ".rootfs." suffix for 'boot.ubifs' images
+do_image_boot_ubifs[imgsuffix] = "."

conf/layer.conf

@@ -5,8 +5,9 @@ BBPATH .= ":${LAYERDIR}"
 BBFILES += "${LAYERDIR}/recipes-*/*/*.bb \
             ${LAYERDIR}/recipes-*/*/*.bbappend"
 
-BBFILE_COLLECTIONS += "fsl-arm-extra"
-BBFILE_PATTERN_fsl-arm-extra := "^${LAYERDIR}/"
-BBFILE_PRIORITY_fsl-arm-extra = "4"
+BBFILE_COLLECTIONS += "freescale-3rdparty"
+BBFILE_PATTERN_freescale-3rdparty := "^${LAYERDIR}/"
+BBFILE_PRIORITY_freescale-3rdparty = "4"
 
-LAYERDEPENDS_fsl-arm-extra = "core fsl-arm"
+LAYERSERIES_COMPAT_freescale-3rdparty = "walnascar whinlatter"
+LAYERDEPENDS_freescale-3rdparty = "core freescale-layer"

conf/machine/apalis-imx6.conf

@@ -0,0 +1,43 @@
+#@TYPE: Machine
+#@NAME: Toradex Apalis iMX6Q/D
+#@SOC: i.MX6Q
+#@DESCRIPTION: Machine configuration for Toradex Apalis iMX6 SOM
+#@MAINTAINER: Max Krummenacher <max.krummenacher@toradex.com>
+
+MACHINEOVERRIDES =. "mx6q:"
+
+include conf/machine/include/imx-base.inc
+include conf/machine/include/arm/armv7a/tune-cortexa9.inc
+
+PREFERRED_PROVIDER_virtual/kernel:use-nxp-bsp ??= "linux-toradex"
+KBUILD_DEFCONFIG:use-nxp-bsp ?= "apalis_imx6_defconfig"
+KERNEL_DEVICETREE += " \
+    imx6q-apalis-eval.dtb imx6q-apalis-ixora.dtb \
+    imx6q-apalis-ixora-v1.1.dtb \
+"
+KERNEL_DEVICETREE:append:use-nxp-bsp = " imx6q-apalis-ixora-v1.2.dtb"
+
+KERNEL_IMAGETYPE = "zImage"
+# The kernel lives in a seperate FAT partition, don't deploy it in /boot/
+RRECOMMENDS:${KERNEL_PACKAGE_NAME}-base = ""
+
+IMX_DEFAULT_BOOTLOADER = "u-boot-toradex"
+PREFERRED_RPROVIDER_u-boot-default-script = "u-boot-script-toradex"
+
+UBOOT_SUFFIX = "img"
+SPL_BINARY = "SPL"
+# The SPL configures the DDR RAM depending on the module it runs on. Thus there
+# is no need to distingush between the different module types.
+UBOOT_CONFIG ??= "spl"
+UBOOT_CONFIG[spl] = "apalis_imx6_defconfig,,u-boot.img"
+UBOOT_MAKE_TARGET = ""
+UBOOT_ENTRYPOINT:use-mainline-bsp = "0x10008000"
+
+IMAGE_FSTYPES += "tar.xz"
+# wic support
+IMAGE_BOOT_FILES:append = " boot.scr-${MACHINE};boot.scr"
+WKS_FILE_DEPENDS:append = " u-boot-default-script"
+WKS_FILE = "sdimage-bootpart.wks"
+
+MACHINE_FEATURES += "screen usbgadget usbhost vfat ext2 alsa touchscreen wifi bluetooth 3g pci"
+MACHINE_FIRMWARE:remove = "firmware-imx-epdc"

conf/machine/cfa10036.conf

@@ -1,7 +0,0 @@
-#@TYPE: Machine
-#@NAME: Crystalfontz CFA-10036
-#@SOC: i.MX28
-#@DESCRIPTION: Machine configuration for CFA-10036
-#@MAINTAINER: Alexandre Belloni <alexandre.belloni@free-electrons.com>
-
-include conf/machine/include/cfa10036.inc

conf/machine/cfa10037.conf

@@ -1,10 +0,0 @@
-#@TYPE: Machine
-#@NAME: Crystalfontz CFA-10037
-#@SOC: i.MX28
-#@DESCRIPTION: Machine configuration for CFA-10037
-#@MAINTAINER: Alexandre Belloni <alexandre.belloni@free-electrons.com>
-
-include conf/machine/include/cfa10036.inc
-
-KERNEL_DEVICETREE += "imx28-cfa10037.dtb"
-

conf/machine/cfa10049.conf

@@ -1,12 +0,0 @@
-#@TYPE: Machine
-#@NAME: Crystalfontz CFA-10049
-#@SOC: i.MX28
-#@DESCRIPTION: Machine configuration for CFA-10049
-#@MAINTAINER: Alexandre Belloni <alexandre.belloni@free-electrons.com>
-
-include conf/machine/include/cfa10036.inc
-
-KERNEL_DEVICETREE += "imx28-cfa10049.dtb"
-
-MACHINE_FEATURES += "touchscreen"
-

conf/machine/cfa10055.conf

@@ -1,12 +0,0 @@
-#@TYPE: Machine
-#@NAME: Crystalfontz CFA-10055
-#@SOC: i.MX28
-#@DESCRIPTION: Machine configuration for CFA-10055
-#@MAINTAINER: Alexandre Belloni <alexandre.belloni@free-electrons.com>
-
-include conf/machine/include/cfa10036.inc
-
-KERNEL_DEVICETREE += "imx28-cfa10055.dtb"
-
-MACHINE_FEATURES += "touchscreen"
-

conf/machine/cfa10056.conf

@@ -1,12 +0,0 @@
-#@TYPE: Machine
-#@NAME: Crystalfontz CFA-10056
-#@SOC: i.MX28
-#@DESCRIPTION: Machine configuration for CFA-10056
-#@MAINTAINER: Alexandre Belloni <alexandre.belloni@free-electrons.com>
-
-include conf/machine/include/cfa10036.inc
-
-KERNEL_DEVICETREE += "imx28-cfa10056.dtb"
-
-MACHINE_FEATURES += "screen"
-

conf/machine/cfa10057.conf

@@ -1,12 +0,0 @@
-#@TYPE: Machine
-#@NAME: Crystalfontz CFA-10057
-#@SOC: i.MX28
-#@DESCRIPTION: Machine configuration for CFA-10057, also called CFA-920
-#@MAINTAINER: Alexandre Belloni <alexandre.belloni@free-electrons.com>
-
-include conf/machine/include/cfa10036.inc
-
-KERNEL_DEVICETREE += "imx28-cfa10057.dtb"
-
-MACHINE_FEATURES += "touchscreen"
-

conf/machine/cfa10058.conf

@@ -1,12 +0,0 @@
-#@TYPE: Machine
-#@NAME: Crystalfontz CFA-10058
-#@SOC: i.MX28
-#@DESCRIPTION: Machine configuration for CFA-10058, also called CFA-921
-#@MAINTAINER: Alexandre Belloni <alexandre.belloni@free-electrons.com>
-
-include conf/machine/include/cfa10036.inc
-
-KERNEL_DEVICETREE += "imx28-cfa10058.dtb"
-
-MACHINE_FEATURES += "touchscreen"
-

conf/machine/cgtqmx6.conf

@@ -1,23 +0,0 @@
-#@TYPE: Machine
-#@NAME: Congatec Qmx6
-#@SOC: i.MX6Q
-#@DESCRIPTION: Machine configuration for Congatec Qmx6 board
-
-include conf/machine/include/imx-base.inc
-include conf/machine/include/tune-cortexa9.inc
-
-SOC_FAMILY = "mx6:mx6q"
-
-# Use u-boot imx
-UBOOT_SUFFIX = "bin"
-UBOOT_PADDING = "2"
-PREFERRED_PROVIDER_u-boot = "u-boot-imx"
-PREFERRED_VERSION_u-boot-imx = "2009.08"
-
-PREFERRED_PROVIDER_virtual/kernel ?= "linux-congatec"
-
-UBOOT_MACHINE = "cgtqmx6_config"
-
-SERIAL_CONSOLE = "115200 ttymxc1"
-
-MACHINE_FEATURES += " pci"

conf/machine/colibri-imx6.conf

@@ -0,0 +1,44 @@
+#@TYPE: Machine
+#@NAME: Toradex Colibri iMX6DL/S
+#@SOC: i.MX6DL
+#@DESCRIPTION: Machine configuration for Toradex Colibri iMX6 SOM
+#@MAINTAINER: Max Krummenacher <max.krummenacher@toradex.com>
+
+MACHINEOVERRIDES =. "mx6dl:"
+
+include conf/machine/include/imx-base.inc
+include conf/machine/include/arm/armv7a/tune-cortexa9.inc
+
+PREFERRED_PROVIDER_virtual/kernel:use-nxp-bsp ??= "linux-toradex"
+KBUILD_DEFCONFIG:use-nxp-bsp ?= "colibri_imx6_defconfig"
+KERNEL_DTB_PREFIX = "nxp/imx/"
+KERNEL_DEVICETREE += "\
+    ${KERNEL_DTB_PREFIX}imx6dl-colibri-eval-v3.dtb \
+    ${KERNEL_DTB_PREFIX}imx6dl-colibri-cam-eval-v3.dtb \
+    ${KERNEL_DTB_PREFIX}imx6dl-colibri-aster.dtb \
+    ${KERNEL_DTB_PREFIX}imx6dl-colibri-iris.dtb \
+    ${KERNEL_DTB_PREFIX}imx6dl-colibri-iris-v2.dtb \
+    "
+KERNEL_DEVICETREE:use-mainline-bsp = "${KERNEL_DTB_PREFIX}imx6dl-colibri-eval-v3.dtb"
+KERNEL_IMAGETYPE = "zImage"
+# The kernel lives in a seperate FAT partition, don't deploy it in /boot/
+RRECOMMENDS:${KERNEL_PACKAGE_NAME}-base = ""
+
+IMX_DEFAULT_BOOTLOADER = "u-boot-toradex"
+PREFERRED_PROVIDER_u-boot-default-script ?= "u-boot-script-toradex"
+
+UBOOT_SUFFIX = "img"
+SPL_BINARY = "SPL"
+UBOOT_CONFIG ??= "spl"
+UBOOT_CONFIG[spl] = "colibri_imx6_defconfig,,u-boot.img"
+UBOOT_MAKE_TARGET = ""
+UBOOT_ENTRYPOINT:use-mainline-bsp = "0x10008000"
+
+IMAGE_FSTYPES += "tar.xz"
+# wic support
+IMAGE_BOOT_FILES:append = " boot.scr-${MACHINE};boot.scr"
+WKS_FILE_DEPENDS:append = " u-boot-default-script"
+WKS_FILE = "sdimage-bootpart.wks"
+
+MACHINE_FEATURES += "screen usbgadget usbhost vfat ext2 alsa touchscreen wifi bluetooth 3g"
+MACHINE_FIRMWARE:remove = "firmware-imx-epdc"

conf/machine/colibri-imx6ull.conf

@@ -0,0 +1,42 @@
+#@TYPE: Machine
+#@NAME: Toradex Colibri iMX6ULL
+#@SOC: i.MX6ULL
+#@DESCRIPTION: Machine configuration for Toradex Colibri iMX6 ULL SOM
+#@MAINTAINER: Max Krummenacher <max.krummenacher@toradex.com>
+
+MACHINEOVERRIDES =. "mx6ull:"
+
+include conf/machine/include/imx-base.inc
+include conf/machine/include/arm/armv7a/tune-cortexa7.inc
+
+PREFERRED_PROVIDER_virtual/kernel:use-nxp-bsp ?= "linux-toradex"
+KBUILD_DEFCONFIG:use-nxp-bsp ?= "colibri-imx6ull_defconfig"
+KERNEL_DEVICETREE += " \
+    imx6ull-colibri-eval-v3.dtb imx6ull-colibri-wifi-eval-v3.dtb \
+"
+KERNEL_DEVICETREE:append:use-nxp-bsp = " \
+    imx6ull-colibri-aster.dtb imx6ull-colibri-wifi-aster.dtb \
+    imx6ull-colibri-iris.dtb imx6ull-colibri-wifi-iris.dtb \
+    imx6ull-colibri-iris-v2.dtb imx6ull-colibri-wifi-iris-v2.dtb \
+"
+
+KERNEL_IMAGETYPE = "zImage"
+# The kernel lives in its own ubi volume.
+RRECOMMENDS:${KERNEL_PACKAGE_NAME}-base = ""
+
+IMX_DEFAULT_BOOTLOADER = "u-boot-toradex"
+PREFERRED_PROVIDER_u-boot-default-script ?= "u-boot-script-toradex"
+
+UBOOT_BINARY = "u-boot-nand.imx"
+UBOOT_MAKE_TARGET = "u-boot.imx"
+UBOOT_MACHINE ?= "colibri-imx6ull_defconfig"
+UBOOT_SUFFIX = "imx"
+
+IMAGE_FSTYPES += "tar.xz"
+# wic support
+IMAGE_BOOT_FILES:append = " boot.scr-${MACHINE};boot.scr"
+WKS_FILE_DEPENDS:append = " u-boot-default-script"
+WKS_FILE = "sdimage-bootpart.wks"
+
+MACHINE_FEATURES += "screen usbgadget usbhost vfat ext2 alsa touchscreen wifi bluetooth 3g"
+MACHINE_FIRMWARE:remove = "firmware-imx-epdc"

conf/machine/colibri-imx7-emmc.conf

@@ -0,0 +1,38 @@
+#@TYPE: Machine
+#@NAME: Toradex Colibri iMX7 Dual 1GB (eMMC)
+#@SOC: i.MX 7Dual
+#@DESCRIPTION: Machine configuration for Toradex Colibri iMX7 SOM (eMMC)
+#@MAINTAINER: Max Krummenacher <max.krummenacher@toradex.com>
+
+MACHINEOVERRIDES =. "mx7:mx7d:"
+
+include conf/machine/include/imx-base.inc
+include conf/machine/include/arm/armv7a/tune-cortexa7.inc
+
+PREFERRED_PROVIDER_virtual/kernel:use-nxp-bsp ??= "linux-toradex"
+KBUILD_DEFCONFIG:use-nxp-bsp ?= "colibri_imx7_defconfig"
+KERNEL_DEVICETREE = " \
+    imx7d-colibri-emmc-eval-v3.dtb \
+    imx7d-colibri-emmc-aster.dtb \
+"
+KERNEL_DEVICETREE:append:use-nxp-bsp = " \
+    imx7d-colibri-emmc-iris.dtb \
+    imx7d-colibri-emmc-iris-v2.dtb \
+"
+
+# The kernel lives in a seperate FAT partition, don't deploy it in /boot/
+RRECOMMENDS:${KERNEL_PACKAGE_NAME}-base = ""
+
+IMX_DEFAULT_BOOTLOADER = "u-boot-toradex"
+PREFERRED_RPROVIDER_u-boot-default-script = "u-boot-script-toradex"
+
+UBOOT_SUFFIX = "imx"
+UBOOT_BINARY = "u-boot-dtb.${UBOOT_SUFFIX}"
+UBOOT_MACHINE ?= "colibri_imx7_emmc_defconfig"
+
+IMAGE_FSTYPES += "tar.xz"
+IMAGE_BOOT_FILES:append = " boot.scr-${MACHINE};boot.scr"
+WKS_FILE_DEPENDS:append = " u-boot-default-script"
+
+MACHINE_FEATURES += "screen usbgadget usbhost vfat ext2 alsa touchscreen wifi bluetooth 3g"
+MACHINE_FIRMWARE:remove = "firmware-imx-epdc"

conf/machine/colibri-imx7-nand.conf

@@ -0,0 +1,53 @@
+#@TYPE: Machine
+#@NAME: Toradex Colibri iMX7D/S (NAND)
+#@SOC: i.MX 7Dual / i.MX 7Solo
+#@DESCRIPTION: Machine configuration for Toradex Colibri iMX7 SOM (NAND)
+#@MAINTAINER: Max Krummenacher <max.krummenacher@toradex.com>
+
+MACHINEOVERRIDES =. "mx7:mx7d:colibri-imx7:"
+
+include conf/machine/include/imx-base.inc
+include conf/machine/include/arm/armv7a/tune-cortexa7.inc
+
+PREFERRED_PROVIDER_virtual/kernel:use-nxp-bsp ??= "linux-toradex"
+KBUILD_DEFCONFIG:use-nxp-bsp ?= "colibri_imx7_defconfig"
+KERNEL_IMAGETYPE = "zImage"
+
+KERNEL_DEVICETREE = " \
+    imx7d-colibri-eval-v3.dtb imx7s-colibri-eval-v3.dtb \
+    imx7d-colibri-aster.dtb imx7s-colibri-aster.dtb \
+"
+
+KERNEL_DEVICETREE:append:use-nxp-bsp = " \
+    imx7d-colibri-iris.dtb imx7s-colibri-iris.dtb \
+    imx7d-colibri-iris-v2.dtb imx7s-colibri-iris-v2.dtb \
+"
+
+# U-Boot of our newer release read the Kernel and device tree from static UBI
+# volumes, hence no need to deploy the kernel binary in the image itself
+RRECOMMENDS:${KERNEL_PACKAGE_NAME}-base = ""
+
+IMX_DEFAULT_BOOTLOADER = "u-boot-toradex"
+PREFERRED_PROVIDER_u-boot-default-script ?= "u-boot-script-toradex"
+
+# U-Boot NAND binary includes 0x400 padding required for NAND boot
+UBOOT_BINARY = "u-boot-nand.imx"
+UBOOT_MAKE_TARGET = "u-boot.imx"
+UBOOT_MACHINE ?= "colibri_imx7_defconfig"
+UBOOT_SUFFIX = "imx"
+
+IMAGE_FSTYPES += "tar.xz"
+# wic support
+IMAGE_BOOT_FILES:append = " boot.scr-${MACHINE};boot.scr"
+WKS_FILE_DEPENDS:append = " u-boot-default-script"
+WKS_FILE = "sdimage-bootpart.wks"
+
+# Enable free --space-fixup (-F) by default, this allows DFU updates
+MKUBIFS_ARGS = " -c 8112 -e 124KiB -m 2KiB -F"
+UBINIZE_ARGS = " -p 128KiB -m 2048 -s 2048"
+UBI_VOLNAME = "rootfs"
+
+SERIAL_CONSOLES = "115200;ttymxc0"
+
+MACHINE_FEATURES += "screen usbgadget usbhost vfat ext2 alsa touchscreen wifi bluetooth 3g"
+MACHINE_FIRMWARE:remove = "firmware-imx-epdc"

conf/machine/colibri-vf.conf

@@ -0,0 +1,56 @@
+#@TYPE: Machine
+#@NAME: Toradex Colibri VF50/VF61
+#@SOC: VF500/VF610
+#@DESCRIPTION: Machine configuration for Toradex Colibri VF50/VF61 powered by Freescale Vybrid SoC
+#@MAINTAINER: Max Krummenacher <max.krummenacher@toradex.com>
+
+MACHINEOVERRIDES =. "vf:"
+
+include conf/machine/include/imx-base.inc
+include conf/machine/include/arm/armv7a/tune-cortexa5.inc
+
+PREFERRED_PROVIDER_virtual/kernel ?= "linux-toradex"
+
+KERNEL_IMAGETYPE = "zImage"
+
+KERNEL_DEVICETREE = " \
+    vf500-colibri-eval-v3.dtb \
+    vf610-colibri-eval-v3.dtb \
+"
+
+KERNEL_DEVICETREE:append:use-nxp-bsp = " \
+    vf500-colibri-aster.dtb \
+    vf610-colibri-aster.dtb \
+"
+
+# U-Boot of our newer release read the Kernel and device tree from static UBI volumes,
+# hence no need to deploy the kernel binary in the image itself
+RRECOMMENDS:${KERNEL_PACKAGE_NAME}-base = ""
+
+IMX_DEFAULT_BOOTLOADER = "u-boot-toradex"
+PREFERRED_PROVIDER_u-boot-default-script ?= "u-boot-script-toradex"
+PREFERRED_PROVIDER_virtual/kernel-module-mcc ?= "kernel-module-mcc-toradex"
+PREFERRED_PROVIDER_virtual/kernel-module-mcc-dev ?= "kernel-module-mcc-toradex"
+PREFERRED_VERSION_mqxboot ?= "1.%"
+PREFERRED_VERSION_weston:use-nxp-bsp = ""
+
+# U-Boot NAND binary includes 0x400 padding required for NAND boot
+UBOOT_BINARY = "u-boot-nand.imx"
+UBOOT_MAKE_TARGET = "u-boot.imx"
+UBOOT_MACHINE ?= "colibri_vf_defconfig"
+UBOOT_SUFFIX = "imx"
+
+IMAGE_FSTYPES += "tar.xz ubifs"
+# wic support
+IMAGE_BOOT_FILES:append = " boot.scr-${MACHINE};boot.scr"
+WKS_FILE_DEPENDS:append = " u-boot-default-script"
+WKS_FILE = "sdimage-bootpart.wks"
+
+# Enable free --space-fixup (-F) by default, this allows DFU updates
+MKUBIFS_ARGS = " -c 8112 -e 124KiB -m 2KiB -F"
+UBINIZE_ARGS = " -p 128KiB -m 2048 -s 2048"
+UBI_VOLNAME = "rootfs"
+
+SERIAL_CONSOLES = "115200;ttyLP0"
+
+MACHINE_FEATURES += "usbgadget usbhost vfat alsa touchscreen"

conf/machine/cubox-i.conf

@@ -1,33 +1,43 @@
 #@TYPE: Machine
-#@NAME: SolidRun CuBox-i
+#@NAME: SolidRun CuBox-i and HummingBoard
 #@SOC: i.MX6 Q/DL
 #@DESCRIPTION: Machine configuration for SolidRun CuBox-i and HummingBoard machines
 #@MAINTAINER: Carlos Rafael Giani <dv@pseudoterminal.org>
 
 # Machine config for the SolidRun CuBox-i and HummingBoard machines.
-# They all use the same machine config, since the u-boot SPL autodetects the
-# machine type upon booting. SOC_FAMILY includes all SoCs from all of these machines
-# to let recipes include firmware etc. for all of these SoCs.
+# They all use the same machine config, since the u-boot SPL
+# autodetects the machine type upon booting. MACHINEOVERRIDES includes
+# all SoCs from all of these machines to let recipes include firmware
+# etc. for all of these SoCs.
+
+MACHINEOVERRIDES =. "mx6q:mx6dl:"
 
 require conf/machine/include/imx-base.inc
-require conf/machine/include/tune-cortexa9.inc
+require conf/machine/include/arm/armv7a/tune-cortexa9.inc
 
-SOC_FAMILY = "mx6:mx6dl:mx6q"
-
-PREFERRED_PROVIDER_u-boot = "u-boot-cubox-i"
-PREFERRED_PROVIDER_virtual/kernel = "linux-cubox-i"
+PREFERRED_PROVIDER_virtual/kernel ?= "linux-fslc"
 
 UBOOT_MAKE_TARGET = ""
 UBOOT_SUFFIX = "img"
-UBOOT_ENTRYPOINT = "0x10800000"
 UBOOT_CONFIG ??= "sd"
-UBOOT_CONFIG[sd] = "mx6_cubox-i_config,sdcard"
+UBOOT_CONFIG[sd] = "mx6cuboxi_defconfig,sdcard"
 UENV_FILENAME = "uEnv-${MACHINE}.txt"
 SPL_BINARY = "SPL"
+WKS_FILES = "imx-uboot-spl.wks.in"
 
-BOOT_SCRIPTS = "${UENV_FILENAME}:uEnv.txt"
+UBOOT_EXTLINUX = "1"
+UBOOT_EXTLINUX_ROOT = "root=PARTUUID=${uuid}"
 
-MACHINE_FEATURES += "pci wifi bluetooth alsa bluetooth irda serial usbhost wifi"
-MACHINE_FIRMWARE_append_mx6 = " linux-firmware-ath6k"
+KERNEL_IMAGETYPE = "zImage"
+KERNEL_DEVICETREE = "imx6dl-cubox-i.dtb imx6q-cubox-i.dtb imx6dl-hummingboard.dtb imx6q-hummingboard.dtb"
 
-SERIAL_CONSOLE = "115200 ttymxc0"
+MACHINE_FEATURES += "pci wifi bluetooth alsa irda serial usbhost"
+MACHINE_EXTRA_RRECOMMENDS += "bcm4330-nvram-config bcm4329-nvram-config"
+
+SERIAL_CONSOLES = "115200;ttymxc0"
+
+MACHINE_ESSENTIAL_EXTRA_RDEPENDS += " \
+    kernel-image \
+    kernel-devicetree \
+    u-boot-fslc \
+"

conf/machine/imx6dl-riotboard.conf

@@ -0,0 +1,27 @@
+#@TYPE: Machine
+#@NAME: RIoTboard
+#@SOC: i.MX6S
+#@DESCRIPTION: Machine configuration for i.MX6S RIoTboard.
+#@MAINTAINER: Nikolay Dimitrov <picmaster@mail.bg>
+
+include conf/machine/include/imx-base.inc
+include conf/machine/include/arm/armv7a/tune-cortexa9.inc
+
+MACHINEOVERRIDES =. "mx6dl:"
+
+UBOOT_MACHINE = "riotboard_defconfig"
+UBOOT_SUFFIX = "imx"
+UBOOT_MAKE_TARGET = "u-boot.imx"
+
+PREFERRED_PROVIDER_virtual/kernel ?= "linux-fslc"
+KERNEL_DEVICETREE = "imx6dl-riotboard.dtb"
+
+SERIAL_CONSOLES = "115200;ttymxc1"
+
+MACHINE_ESSENTIAL_EXTRA_RDEPENDS += " \
+    kernel-image \
+    kernel-devicetree \
+    u-boot-fslc \
+"
+
+WKS_FILES = "imx-uboot.wks"

conf/machine/imx6qdl-pico.conf

@@ -0,0 +1,54 @@
+#@TYPE: Machine
+#@NAME: IMX6Q/DL-PICO
+#@SOC: i.MX6QDL
+#@DESCRIPTION: Machine configuration for IMX6QDL-PICO board.
+#@MAINTAINER: Otavio Salvador otavio.salvador@ossystems.com.br
+
+MACHINEOVERRIDES =. "mx6q:mx6dl:"
+
+require conf/machine/include/imx-base.inc
+require conf/machine/include/arm/armv7a/tune-cortexa9.inc
+
+IMX_DEFAULT_BSP = "mainline"
+IMX_DEFAULT_BOOTLOADER = "u-boot-fslc"
+
+SERIAL_CONSOLES = "115200;ttymxc0"
+
+SPL_BINARY = "SPL"
+UBOOT_SUFFIX = "img"
+UBOOT_MAKE_TARGET = ""
+
+UBOOT_EXTLINUX = "1"
+UBOOT_EXTLINUX_ROOT = "root=PARTUUID=${uuid}"
+UBOOT_EXTLINUX_CONSOLE = "console=${console},${baudrate}"
+
+UBOOT_CONFIG ??= "generic"
+UBOOT_CONFIG[generic] = "pico-imx6_defconfig"
+
+KERNEL_DEVICETREE = " \
+    imx6dl-pico-dwarf.dtb \
+    imx6dl-pico-hobbit.dtb \
+    imx6dl-pico-nymph.dtb \
+    imx6dl-pico-pi.dtb \
+    imx6q-pico-dwarf.dtb \
+    imx6q-pico-hobbit.dtb \
+    imx6q-pico-nymph.dtb \
+    imx6q-pico-pi.dtb \
+"
+MACHINE_ESSENTIAL_EXTRA_RDEPENDS += " \
+    kernel-image \
+    kernel-devicetree \
+    u-boot-fslc \
+"
+
+MACHINE_EXTRA_RRECOMMENDS += " \
+    bcm4339-nvram-config \
+"
+
+WKS_FILES ?= "imx-uboot-spl.wks.in"
+WKS_FILE_DEPENDS ?= ""
+IMAGE_FSTYPES = "wic.bmap wic.xz ext4.gz"
+
+MACHINE_FIRMWARE:append = " linux-firmware-ath10k"
+
+MACHINE_FEATURES += " pci bluetooth touchscreen wifi"

conf/machine/imx6qdl-variscite-som.conf

@@ -0,0 +1,61 @@
+#@TYPE: Machine
+#@NAME: Variscite i.MX6Q/DL VAR-SOM-MX6
+#@SOC: i.MX6Q/DL
+#@DESCRIPTION: Machine configuration for Variscite i.MX6Q/DL VAR-SOM-MX6
+#@MAINTAINER: Fabio Berton <fabio.berton@ossystems.com.br>
+
+MACHINEOVERRIDES =. "mx6q:mx6dl:"
+
+DEFAULTTUNE ?= "cortexa9thf-neon"
+require conf/machine/include/imx-base.inc
+require conf/machine/include/arm/armv7a/tune-cortexa9.inc
+
+PREFERRED_PROVIDER_virtual/kernel = "linux-variscite"
+PREFERRED_PROVIDER_virtual/kernel:use-mainline-bsp ??= "linux-fslc"
+
+KERNEL_DEVICETREE = " \
+    imx6dl-var-som-cap.dtb \
+    imx6dl-var-som-res.dtb \
+    imx6dl-var-som-vsc.dtb \
+    imx6dl-var-som-solo-cap.dtb \
+    imx6dl-var-som-solo-res.dtb \
+    imx6dl-var-som-solo-vsc.dtb \
+    imx6q-var-som-cap.dtb \
+    imx6q-var-som-res.dtb \
+    imx6q-var-som-vsc.dtb \
+"
+
+KERNEL_DEVICETREE:use-mainline-bsp = " \
+    imx6q-var-som-vsc.dtb \
+"
+
+KERNEL_IMAGETYPE = "uImage"
+
+UBOOT_SPL_BUILD = "yes"
+UBOOT_MAKE_TARGET = "all"
+UBOOT_SUFFIX = "img"
+WKS_FILE = "imx-uboot-spl-bootpart.wks.in"
+
+PREFERRED_PROVIDER_virtual/bootloader = "u-boot-variscite"
+PREFERRED_PROVIDER_u-boot = "u-boot-variscite"
+UBOOT_ENTRYPOINT:use-mainline-bsp = "0x10008000"
+
+UBOOT_CONFIG ??= "nand sd"
+UBOOT_CONFIG[sd] = "mx6var_som_sd_config,sdcard"
+UBOOT_CONFIG[nand] = "mx6var_som_nand_config,ubifs"
+
+SPL_BINARY = "SPL"
+
+## NAND 512MB
+UBI_ROOT_FS_NAME = "[rootfs]"
+UBI_VOLNAME  = "rootfs"
+MKUBIFS_ARGS = " -m 2048 -e 124KiB -c 3965 -F "
+UBINIZE_ARGS = " -m 2048 -p 128KiB -s 2048 -O 2048 "
+
+SERIAL_CONSOLES = "115200;ttymxc0"
+
+USE_VT = "0"
+
+MACHINE_FIRMWARE:append = " linux-firmware-wl12xx linux-firmware-wl18xx ti-18xx-wlconf"
+
+MACHINE_FEATURES += " pci bluetooth touchscreen wifi"

conf/machine/imx6qsabrelite.conf

@@ -1,13 +0,0 @@
-#@TYPE: Machine
-#@NAME: Boundary Devices i.MX6Q SABRE Lite
-#@SOC: i.MX6Q
-#@DESCRIPTION: Machine configuration for Boundary Devices i.MX6Q SABRE Lite
-#@MAINTAINER: Eric Nelson <eric.nelson@boundarydevices.com>
-
-# WARNING: This board now use the *same* code as Nitrogen6X and it
-#          boots from internal SPI NOR memory. If you did change it to boot
-#          from the MMC (SD3 or SD4) please check the Boundary's blog post
-#          at: http://boundarydevices.com/u-boot-on-i-mx6/#unbricking
-
-MACHINEOVERRIDES = "nitrogen6x:${MACHINE}"
-include conf/machine/nitrogen6x.conf

conf/machine/imx6sl-warp.conf

@@ -0,0 +1,47 @@
+#@TYPE: Machine
+#@NAME: WaRP
+#@SOC: i.MX6SL
+#@DESCRIPTION: Machine configuration for i.MX6SL WaRP board.
+#@MAINTAINER: Otavio Salvador <otavio@ossystems.com.br>
+
+#Warp has an eMMC that stores the bootloader, kernel, dtb and rootfs.
+#An easy way to flash the generated  <image>.sdcard image is
+#following these steps:
+#
+# 1.Connect the serial to USB adapter from Warp to the host PC
+# 2.Connect the USB OTG Warp port to the host PC
+#   (Warp can be powered via USB OTG port).
+# 3.In the U-boot prompt type:
+#   => ums 0 mmc 0
+# 4.Then the Warp eMMC will be mounted as a USB gadget in the host PC
+# 5.On the host PC, copy the generated .sdcard image into Warp's eMMC:
+#   $ umount /dev/<ums-device>
+#   $ sudo dd if=<image>.sdcard of=/dev/<ums-device>
+#
+#WARNING: Double check by running dmesg on the host PC which is the
+#correct node that corresponds to the Warp board. Passing an incorrect
+#device number may overwrite the host PC file system, causing boot issues there.
+
+MACHINEOVERRIDES =. "mx6sl:"
+
+include conf/machine/include/imx-base.inc
+include conf/machine/include/arm/armv7a/tune-cortexa9.inc
+
+IMX_DEFAULT_BSP = "mainline"
+
+# WaRP uses eMMC boot partition by default and the u-boot inside .sdcard image
+# does not override it. However, build u-boot binary anyway in order to provide
+# a binary to be used if an update is needed
+# see how-to override eMMC boot partition on the following link
+# http://git.denx.de/?p=u-boot.git;a=blob;f=board/warp/README
+EXTRA_IMAGEDEPENDS += "u-boot"
+
+UBOOT_MACHINE ?= "warp_defconfig"
+UBOOT_SUFFIX = "imx"
+
+KERNEL_DEVICETREE = "imx6sl-warp.dtb"
+
+SERIAL_CONSOLES = "115200;ttymxc0"
+
+MACHINE_FEATURES += "wifi bluetooth serial"
+MACHINE_EXTRA_RRECOMMENDS += "bcm4330-nvram-config"

conf/machine/imx6ul-kontron.conf

@@ -0,0 +1,62 @@
+#@TYPE: Machine
+#@NAME: Kontron N63XX/N64XX SoM based boards
+#@SOC: i.MX6UL/i.MX6ULL
+#@DESCRIPTION: Machine configuration for Kontron N63XX/N64XX SoM based boards
+#@MAINTAINER: Frieder Schrempf <frieder.schrempf@kontron.de>
+
+MACHINEOVERRIDES =. "mx6ul:"
+
+include conf/machine/include/imx-base.inc
+include conf/machine/include/arm/armv7a/tune-cortexa7.inc
+
+IMX_DEFAULT_BSP = "mainline"
+
+PREFERRED_PROVIDER_virtual/kernel ?= "linux-kontron"
+PREFERRED_PROVIDER_u-boot ?= "u-boot-kontron"
+PREFERRED_PROVIDER_virtual/bootloader ?= "u-boot-kontron"
+
+KERNEL_CLASSES ?= " kernel-fitimage "
+KERNEL_IMAGETYPES ?= "fitImage"
+KERNEL_DEVICETREE = " \
+	imx6ul-kontron-n6310-s.dtb \
+	imx6ul-kontron-n6310-s-43.dtb \
+	imx6ul-kontron-n6311-s.dtb \
+	imx6ull-kontron-n6411-s.dtb \
+"
+
+
+SERIAL_CONSOLES = "115200;ttymxc3"
+
+UBOOT_CONFIG = "kontron-mx6ul"
+UBOOT_CONFIG[kontron-mx6ul] = "kontron_mx6ul_defconfig"
+
+SPL_BINARY = "SPL"
+UBOOT_ENTRYPOINT = "0x81000000"
+UBOOT_MAKE_TARGET = "u-boot.img SPL"
+UBOOT_SUFFIX = "img"
+
+UBOOT_EXTLINUX ?= "1"
+UBOOT_EXTLINUX_LABELS ?= "default"
+UBOOT_EXTLINUX_KERNEL_IMAGE ?= "../fitImage"
+UBOOT_EXTLINUX_FDTDIR ?= ""
+UBOOT_EXTLINUX_KERNEL_ARGS ?= "rootwait"
+UBOOT_EXTLINUX_TIMEOUT = "8"
+UBOOT_EXTLINUX_LABELS = "kontron-n6310-s kontron-n6311-s kontron-n6310-s-43 kontron-n6411-s"
+UBOOT_EXTLINUX_KERNEL_IMAGE_kontron-n6310-s = "../fitImage#conf@imx6ul-kontron-n6310-s.dtb"
+UBOOT_EXTLINUX_KERNEL_IMAGE_kontron-n6311-s = "../fitImage#conf@imx6ul-kontron-n6311-s.dtb"
+UBOOT_EXTLINUX_KERNEL_IMAGE_kontron-n6310-s-43 = "../fitImage#conf@imx6ul-kontron-n6310-s-43.dtb"
+UBOOT_EXTLINUX_KERNEL_IMAGE_kontron-n6411-s = "../fitImage#conf@imx6ull-kontron-n6411-s.dtb"
+UBOOT_EXTLINUX_MENU_DESCRIPTION_kontron-n6310-s = "Kontron N6310 S"
+UBOOT_EXTLINUX_MENU_DESCRIPTION_kontron-n6311-s = "Kontron N6311 S"
+UBOOT_EXTLINUX_MENU_DESCRIPTION_kontron-n6310-s-43 = "Kontron N6310 S 43"
+UBOOT_EXTLINUX_MENU_DESCRIPTION_kontron-n6411-s = "Kontron N6411 S"
+UBOOT_EXTLINUX_CONSOLE = "console=ttymxc3,115200"
+UBOOT_EXTLINUX_ROOT = "root=/dev/mmcblk0p2"
+
+MACHINE_FEATURES = "usbhost vfat serial ext2 rtc usbgadget"
+IMAGE_BOOT_FILES = " \
+    extlinux.conf;extlinux/extlinux.conf \
+    fitImage \
+"
+
+WKS_FILES ?= "imx-uboot-spl-bootpart.wks.in"

conf/machine/imx6ul-pico.conf

@@ -0,0 +1,47 @@
+#@TYPE: Machine
+#@NAME: IMX6UL-PICO
+#@SOC: i.MX6UL
+#@DESCRIPTION: Machine configuration for IMX6UL-PICO board.
+#@MAINTAINER: Daiane Angolini <daiane.angolini@nxp.com>
+
+MACHINEOVERRIDES =. "mx6ul:"
+
+include conf/machine/include/imx-base.inc
+include conf/machine/include/arm/armv7a/tune-cortexa7.inc
+
+IMX_DEFAULT_BSP = "mainline"
+IMX_DEFAULT_BOOTLOADER = "u-boot-fslc"
+
+SERIAL_CONSOLES = "115200;ttymxc5"
+
+KERNEL_DEVICETREE = " \
+    imx6ul-pico-dwarf.dtb \
+    imx6ul-pico-hobbit.dtb \
+    imx6ul-pico-pi.dtb \
+"
+
+SPL_BINARY = "SPL"
+UBOOT_SUFFIX = "img"
+UBOOT_MAKE_TARGET = ""
+
+UBOOT_CONFIG ??= "dwarf hobbit pi generic"
+UBOOT_CONFIG[dwarf] = "pico-dwarf-imx6ul_defconfig"
+UBOOT_CONFIG[generic] = "pico-imx6ul_defconfig"
+UBOOT_CONFIG[hobbit] = "pico-hobbit-imx6ul_defconfig"
+UBOOT_CONFIG[pi] = "pico-pi-imx6ul_defconfig"
+
+UBOOT_EXTLINUX = "1"
+UBOOT_EXTLINUX_ROOT = "root=PARTUUID=${uuid}"
+UBOOT_EXTLINUX_CONSOLE = "console=${console},${baudrate}"
+
+MACHINE_ESSENTIAL_EXTRA_RDEPENDS += " \
+    kernel-image \
+    kernel-devicetree \
+    u-boot-fslc \
+"
+
+MACHINE_FEATURES += "wifi bluetooth"
+
+WKS_FILES ?= "imx-uboot-spl.wks.in"
+WKS_FILE_DEPENDS ?= ""
+IMAGE_FSTYPES = "wic.bmap wic.xz ext4.gz"

conf/machine/imx7d-pico.conf

@@ -0,0 +1,52 @@
+#@TYPE: Machine
+#@NAME: IMX7D-PICO
+#@SOC: i.MX7D
+#@DESCRIPTION: Machine configuration for IMX7D-PICO board.
+#@MAINTAINER: Vanessa Maegima <vanessa.maegima@nxp.com>
+
+MACHINEOVERRIDES =. "mx7:mx7d:"
+
+require conf/machine/include/imx-base.inc
+require conf/machine/include/arm/armv7a/tune-cortexa7.inc
+
+IMX_DEFAULT_BSP = "mainline"
+IMX_DEFAULT_BOOTLOADER = "u-boot-fslc"
+
+SERIAL_CONSOLES = "115200;ttymxc4"
+
+KERNEL_DEVICETREE = " \
+    imx7d-pico-dwarf.dtb \
+    imx7d-pico-hobbit.dtb \
+    imx7d-pico-pi.dtb \
+"
+
+SPL_BINARY = "SPL"
+UBOOT_BINARY = "u-boot-dtb.img"
+UBOOT_SUFFIX = "img"
+UBOOT_MAKE_TARGET = ""
+
+UBOOT_CONFIG ??= "dwarf hobbit nymph pi generic"
+UBOOT_CONFIG[dwarf] = "pico-dwarf-imx7d_defconfig"
+UBOOT_CONFIG[generic] = "pico-imx7d_defconfig"
+UBOOT_CONFIG[hobbit] = "pico-hobbit-imx7d_defconfig"
+UBOOT_CONFIG[nymph] = "pico-nymph-imx7d_defconfig"
+UBOOT_CONFIG[pi] = "pico-pi-imx7d_defconfig"
+
+UBOOT_EXTLINUX = "1"
+UBOOT_EXTLINUX_ROOT = "root=PARTUUID=${uuid}"
+UBOOT_EXTLINUX_CONSOLE = "console=${console},${baudrate}"
+
+MACHINE_ESSENTIAL_EXTRA_RDEPENDS += " \
+    kernel-image \
+    kernel-devicetree \
+    u-boot-fslc \
+"
+
+MACHINE_EXTRA_RRECOMMENDS += " \
+  bcm4339-nvram-config \
+  linux-firmware-ath10k \
+"
+
+WKS_FILES ?= "imx-uboot-spl.wks.in"
+WKS_FILE_DEPENDS ?= ""
+IMAGE_FSTYPES = "wic.bmap wic.xz ext4.gz"

conf/machine/imx7s-warp.conf

@@ -0,0 +1,25 @@
+#@TYPE: Machine
+#@NAME: WaRP7
+#@SOC: i.MX7S
+#@DESCRIPTION: Machine configuration for i.MX7S WaRP board.
+#@MAINTAINER: Pierre-Jean Texier <texier.pj2@gmail.com>
+
+MACHINEOVERRIDES =. "mx7:mx7d:"
+
+require conf/machine/include/imx-base.inc
+require conf/machine/include/arm/armv7a/tune-cortexa7.inc
+
+IMX_DEFAULT_BSP = "mainline"
+
+MACHINE_FEATURES += " wifi bluetooth"
+
+KERNEL_DEVICETREE = "imx7s-warp.dtb"
+
+UBOOT_BINARY = "u-boot-dtb.imx"
+UBOOT_SUFFIX = "imx"
+UBOOT_MAKE_TARGET = ""
+
+UBOOT_CONFIG ??= "sd"
+UBOOT_CONFIG[sd] = "warp7_defconfig,sdcard"
+
+MACHINE_EXTRA_RRECOMMENDS += "bcm43430-nvram-config"

conf/machine/include/cfa10036.inc

@@ -1,29 +0,0 @@
-# Common definitions for cfa-10036 boards
-
-include conf/machine/include/mxs-base.inc
-
-SOC_FAMILY = "mxs:mx28:cfa10036"
-
-PREFERRED_PROVIDER_virtual/kernel ?= "linux-cfa"
-
-IMAGE_BOOTLOADER = "barebox"
-BAREBOX_BINARY = "barebox"
-
-IMXBOOTLETS_MACHINE = "cfa10036"
-
-KERNEL_IMAGETYPE = "zImage"
-KERNEL_DEVICETREE = "imx28-cfa10036.dtb"
-
-# we need the kernel to be installed in the final image
-IMAGE_INSTALL_append = " kernel-image kernel-devicetree"
-
-SDCARD_ROOTFS ?= "${DEPLOY_DIR_IMAGE}/${IMAGE_NAME}.rootfs.ext3"
-IMAGE_FSTYPES ?= "tar.bz2 ext3 barebox.mxsboot-sdcard sdcard"
-
-SERIAL_CONSOLE = "115200 ttyAMA0"
-
-MACHINE_FEATURES = "usbgadget usbhost vfat"
-
-# Overrides due use of non-FSL kernel
-PREFERRED_VERSION_imx-test = "00.00.00"
-MACHINE_GSTREAMER_PLUGIN_cfa10036 = ""

conf/machine/include/imx233-olinuxino.inc

@@ -1,17 +1,22 @@
 # Common definitions to all iMX233-OlinuXino variants
 
-include conf/machine/include/mxs-base.inc
+# Add a override for all iMX233-OLinuXino variants
+MACHINEOVERRIDES =. "mxs:mx23:imx233-olinuxino:"
+
+include conf/machine/include/imx-base.inc
+include conf/machine/include/arm/armv5/tune-arm926ejs.inc
+
+# This machine is not supported by u-boot-imx as it is not tested by NXP on this
+# board. So we force it to use u-boot-fslc which is based on mainline here.
+IMX_DEFAULT_BOOTLOADER = "u-boot-fslc"
+
+UBOOT_MAKE_TARGET = "u-boot.sb"
+UBOOT_SUFFIX = "sb"
 
 IMXBOOTLETS_MACHINE = "stmp378x_dev"
 UBOOT_MACHINE = "mx23_olinuxino_config"
 
-# Add a override for all iMX233-OLinuXino variants
-SOC_FAMILY = "mxs:mx23:imx233-olinuxino"
-
 KERNEL_IMAGETYPE = "uImage"
-KERNEL_DEVICETREE = "imx23-olinuxino.dtb"
+KERNEL_DEVICETREE = "nxp/mxs/imx23-olinuxino.dtb"
 
-SDCARD_ROOTFS ?= "${DEPLOY_DIR_IMAGE}/${IMAGE_NAME}.rootfs.ext3"
-IMAGE_FSTYPES ?= "tar.bz2 ext3 uboot.mxsboot-sdcard sdcard"
-
-MACHINE_FEATURES = "apm usbgadget usbhost vfat alsa"
+MACHINE_FEATURES = "usbgadget usbhost vfat"

conf/machine/include/wandboard.inc

@@ -1,13 +0,0 @@
-# Common settings for wandboard boards
-
-include conf/machine/include/imx-base.inc
-include conf/machine/include/tune-cortexa9.inc
-
-PREFERRED_PROVIDER_virtual/kernel ?= "linux-wandboard"
-PREFERRED_VERSION_linux-wandboard ?= "3.10.17"
-
-SERIAL_CONSOLE = "115200 ttymxc0"
-
-MACHINE_FEATURES += "pci touchscreen"
-
-KERNEL_IMAGETYPE = "zImage"

conf/machine/lx2160acex7.conf

@@ -0,0 +1,52 @@
+#@TYPE: Machine
+#@NAME: Solid-Run LX2160A-CEx7
+#@SOC: LSCH3
+#@DESCRIPTION: Machine configuration for running LX2160A-CEx7 in 64-bit mode
+
+require conf/machine/include/qoriq-arm64.inc
+require conf/machine/include/arm/arch-arm64.inc
+
+MACHINEOVERRIDES =. "fsl-lsch3:lx2160a:"
+
+MACHINE_FEATURES += "optee"
+
+KERNEL_CLASSES  = " kernel-fitimage "
+KERNEL_IMAGETYPES = "fitImage"
+
+DTB_LOAD = "0x90000000"
+UBOOT_ENTRYPOINT = "0x80080000"
+
+UBOOT_CONFIG ??= "tfa"
+UBOOT_CONFIG[tfa] = "lx2160acex7_tfa_defconfig,,u-boot-dtb.bin"
+
+KERNEL_DEVICETREE_BASENAME ?= "fsl-lx2160a-cex7.dtb"
+KERNEL_DEVICETREE ?= "freescale/${KERNEL_DEVICETREE_BASENAME}"
+KERNEL_DEFCONFIG ?= "defconfig"
+
+SERIAL_CONSOLES ?= "115200;ttyS0 115200;ttyS1 115200;ttyAMA0"
+SERIAL_CONSOLES_CHECK ?= "${SERIAL_CONSOLES}"
+
+#SERDES=8_5_2 # 8x10g
+#SERDES=13_5_2 # dual 100g
+#SERDES=20_5_2 # dual 40g
+SERDES ?= "8_5_2"
+SPEED ?= "2000_700_3200"
+
+RCWAUTO ?= "${SERDES}/${SPEED}"
+BOOTTYPE="auto"
+
+EXTRA_IMAGEDEPENDS += "management-complex mc-utils rcw ls2-phy ddr-phy qoriq-atf inphi"
+USE_VT = "0"
+
+PREFERRED_PROVIDER_u-boot-default-script = "u-boot-script-qoriq"
+PREFERRED_PROVIDER_virtual/kernel = "linux-fslc-qoriq"
+PREFERRED_VERSION_linux-qoriq = "5.4%"
+PREFERRED_VERSION_u-boot-qoriq = "2019.10%"
+PREFERRED_VERSION_qoriq-atf = "1.5%"
+
+IMAGE_FSTYPES += "wic"
+WKS_FILE = "lx2160acex7.wks.in"
+WKS_FILE_DEPENDS:append = "\
+    ${PREFERRED_PROVIDER_u-boot-default-script} \
+"
+IMAGE_BOOT_FILES ?= "${KERNEL_IMAGETYPE} ${KERNEL_DEVICETREE_BASENAME} boot.scr-${MACHINE};boot.scr"

conf/machine/m28evk.conf

@@ -1,27 +0,0 @@
-#@TYPE: Machine
-#@NAME: DENX M28 SoM Evaluation Kit
-#@SOC: i.MX28
-#@DESCRIPTION: Machine configuration for DENX M28 SoM Evaluation Kit
-
-include conf/machine/include/mxs-base.inc
-
-SOC_FAMILY = "mxs:mx28"
-
-UBOOT_MACHINE = "m28evk_config"
-
-PREFERRED_PROVIDER_virtual/kernel ?= "linux-fslc"
-KERNEL_IMAGETYPE = "uImage"
-KERNEL_DEVICETREE = "imx28-m28evk.dtb"
-
-SDCARD_ROOTFS ?= "${DEPLOY_DIR_IMAGE}/${IMAGE_NAME}.rootfs.ext3"
-IMAGE_FSTYPES ?= "tar.bz2 ext3 uboot.mxsboot-sdcard sdcard"
-
-SERIAL_CONSOLE = "115200 ttyAMA0"
-
-KERNEL_IMAGETYPE = "uImage"
-
-MACHINE_FEATURES = "apm usbgadget usbhost vfat alsa touchscreen"
-
-# Overrides due use of non-FSL kernel
-PREFERRED_VERSION_imx-test = "00.00.00"
-MACHINE_GSTREAMER_PLUGIN_m28evk = ""

conf/machine/m53evk.conf

@@ -1,28 +0,0 @@
-#@TYPE: Machine
-#@NAME: DENX M53 SoM Evaluation Kit
-#@SOC: i.MX53
-#@DESCRIPTION: Machine configuration for DENX M53 SoM Evaluation Kit
-
-include conf/machine/include/imx-base.inc
-include conf/machine/include/tune-cortexa8.inc
-
-SOC_FAMILY = "mx5:mx53"
-
-UBOOT_MACHINE = "m53evk_config"
-
-PREFERRED_PROVIDER_virtual/kernel ?= "linux-denx"
-
-KERNEL_IMAGETYPE = "uImage"
-KERNEL_DEVICETREE = "imx53-m53evk.dtb"
-
-SDCARD_ROOTFS ?= "${DEPLOY_DIR_IMAGE}/${IMAGE_NAME}.rootfs.ext3"
-IMAGE_FSTYPES ?= "tar.bz2 ext3 sdcard"
-
-SERIAL_CONSOLE = "115200 ttymxc1"
-
-MACHINE_FEATURES = "apm usbgadget usbhost vfat alsa touchscreen"
-
-# Overrides due use of non-FSL kernel
-PREFERRED_VERSION_imx-test = "00.00.00"
-MACHINE_GSTREAMER_PLUGIN_m53evk = ""
-XSERVER_DRIVER_m53evk = "xf86-video-fbdev"

conf/machine/nitrogen6sx.conf

@@ -0,0 +1,35 @@
+#@TYPE: Machine
+#@NAME: Boundary Devices Nitrogen6SX
+#@SOC: i.MX6SX
+#@DESCRIPTION: Machine configuration for Boundary Devices Nitrogen6SX
+#@MAINTAINER: Chris Dimich <chris.dimich@boundarydevices.com>
+
+MACHINEOVERRIDES =. "mx6sx:"
+
+IMX_DEFAULT_BSP ?= "nxp"
+
+include conf/machine/include/imx-base.inc
+include conf/machine/include/arm/armv7a/tune-cortexa9.inc
+
+KERNEL_DEVICETREE = "imx6sx-nitrogen6sx.dtb"
+KERNEL_IMAGETYPE = "zImage"
+
+IMX_DEFAULT_BOOTLOADER = "u-boot-boundary"
+UBOOT_SUFFIX = "imx"
+UBOOT_BINARY = "u-boot.${UBOOT_SUFFIX}"
+PREFERRED_PROVIDER_virtual/kernel ??= "linux-boundary"
+PREFERRED_PROVIDER_virtual/kernel:use-mainline-bsp ??= "linux-fslc"
+
+# wic support
+WKS_FILE = "sdimage-bootpart.wks"
+IMAGE_BOOT_FILES:append = " \
+    boot.scr-${MACHINE};boot.scr \
+"
+WKS_FILE_DEPENDS += " u-boot-script-boundary"
+
+UBOOT_MACHINE ?= "nitrogen6sx_defconfig"
+
+SERIAL_CONSOLES = "115200;ttymxc0"
+
+MACHINE_EXTRA_RRECOMMENDS += "linux-firmware-wl12xx"
+MACHINE_FEATURES += " pci wifi bluetooth"

conf/machine/nitrogen6x-lite.conf

@@ -1,32 +1,34 @@
 #@TYPE: Machine
 #@NAME: Boundary Devices Nitrogen6X Lite
-#@SOC: i.MX6 Solo
+#@SOC: i.MX6S
 #@DESCRIPTION: Machine configuration for Boundary Devices Nitrogen6X Lite
-#@MAINTAINER: Eric Nelson <eric.nelson@boundarydevices.com>
+#@MAINTAINER: Chris Dimich <chris.dimich@boundarydevices.com>
+
+MACHINEOVERRIDES =. "mx6dl:"
+
+IMX_DEFAULT_BSP ?= "nxp"
 
 include conf/machine/include/imx-base.inc
-include conf/machine/include/tune-cortexa9.inc
-
-SOC_FAMILY = "mx6:mx6dl"
+include conf/machine/include/arm/armv7a/tune-cortexa9.inc
 
 KERNEL_DEVICETREE = "imx6dl-nit6xlite.dtb"
+KERNEL_IMAGETYPE = "zImage"
 
-PREFERRED_PROVIDER_u-boot = "u-boot-boundary"
-PREFERRED_PROVIDER_virtual/kernel ?= "linux-boundary"
-PREFERRED_VERSION_linux-boundary ?= "3.0.35"
+PREFERRED_PROVIDER_u-boot ??= "u-boot-boundary"
+PREFERRED_PROVIDER_virtual/bootloader ??= "u-boot-boundary"
+PREFERRED_PROVIDER_virtual/kernel ??= "linux-boundary"
+PREFERRED_PROVIDER_virtual/kernel:use-mainline-bsp ??= "linux-fslc"
 
-# Use SPI NOR U-Boot by default
-IMAGE_BOOTLOADER ?= ""
+# wic support
+WKS_FILE = "sdimage-bootpart.wks"
+IMAGE_BOOT_FILES:append = " \
+    boot.scr-${MACHINE};boot.scr \
+"
+WKS_FILE_DEPENDS += "u-boot-script-boundary"
 
-# Ensure boot scripts will be available at rootfs time
-do_rootfs[depends] += "u-boot-script-boundary:do_deploy"
+UBOOT_MACHINE ?= "nit6xlite_defconfig"
 
-# Boot scripts to install
-BOOT_SCRIPTS = "6x_bootscript-${MACHINE}:6x_bootscript"
+SERIAL_CONSOLES = "115200;ttymxc1"
 
-UBOOT_MACHINE ?= "nit6xlite_config"
-
-SERIAL_CONSOLE = "115200 ttymxc1"
-
-MACHINE_EXTRA_RRECOMMENDS += " broadcom-nvram-config"
+MACHINE_EXTRA_RRECOMMENDS += " bcm4330-nvram-config"
 MACHINE_FEATURES += " pci wifi bluetooth"

conf/machine/nitrogen6x.conf

@@ -1,8 +1,8 @@
 #@TYPE: Machine
 #@NAME: Boundary Devices Nitrogen6X
-#@SOC: i.MX6Q
+#@SOC: i.MX6 Q/DL
 #@DESCRIPTION: Machine configuration for Boundary Devices Nitrogen6X
-#@MAINTAINER: Eric Nelson <eric.nelson@boundarydevices.com>
+#@MAINTAINER: Chris Dimich <chris.dimich@boundarydevices.com>
 #
 # Note that this machine configuration also supports the SABRE Lite
 # reference design and the Nitrogen6X-SOM.
@@ -18,6 +18,7 @@
 # --------------      ------    --------------------
 # i.MX6Quad/Dual        1GB     nitrogen6q_config
 # i.MX6Quad/Dual        2GB     nitrogen6q2g_config
+# i.MX6Quad/Dual        4GB     nitrogen6_max_config
 # i.MX6Dual-Lite        1GB     nitrogen6dl_config
 # i.MX6Dual-Lite        2GB     nitrogen6dl2g_config
 # i.MX6Solo           512MB     nitrogen6s_config
@@ -28,30 +29,46 @@
 #
 #
 
+MACHINEOVERRIDES =. "mx6q:mx6dl:"
+
+IMX_DEFAULT_BSP ?= "nxp"
+
 include conf/machine/include/imx-base.inc
-include conf/machine/include/tune-cortexa9.inc
+include conf/machine/include/arm/armv7a/tune-cortexa9.inc
 
-SOC_FAMILY = "mx6:mx6dl:mx6q"
+KERNEL_DEVICETREE = "imx6q-sabrelite.dtb \
+                        imx6q-nitrogen6_max.dtb imx6qp-nitrogen6_max.dtb \
+                        imx6q-nitrogen6x.dtb imx6dl-nitrogen6x.dtb \
+                        imx6q-nitrogen6_som2.dtb imx6qp-nitrogen6_som2.dtb \
+                        imx6dl-nitrogen6_vm.dtb imx6dl-nitrogen6_vm-magstripe.dtb \
+"
 
-KERNEL_DEVICETREE = "imx6q-sabrelite.dtb imx6q-nitrogen6x.dtb imx6dl-nitrogen6x.dtb"
+# Not yet supported by Linux mainline
+KERNEL_DEVICETREE:remove:use-mainline-bsp = "imx6dl-nitrogen6_vm.dtb imx6dl-nitrogen6_vm-magstripe.dtb"
 
-PREFERRED_PROVIDER_u-boot = "u-boot-boundary"
-PREFERRED_PROVIDER_virtual/kernel ?= "linux-boundary"
-PREFERRED_VERSION_linux-boundary ?= "3.0.35"
+KERNEL_IMAGETYPE = "zImage"
 
-# Use SPI NOR U-Boot by default
-IMAGE_BOOTLOADER ?= ""
+IMX_DEFAULT_BOOTLOADER = "u-boot-boundary"
+UBOOT_SUFFIX = "imx"
+UBOOT_BINARY = "u-boot-dtb.${UBOOT_SUFFIX}"
+PREFERRED_PROVIDER_virtual/kernel ??= "linux-boundary"
+PREFERRED_PROVIDER_virtual/kernel:use-mainline-bsp ??= "linux-fslc"
 
-# Ensure boot scripts will be available at rootfs time
-do_rootfs[depends] += "u-boot-script-boundary:do_deploy"
+# wic support
+WKS_FILE = "sdimage-bootpart.wks"
+IMAGE_BOOT_FILES:append = " \
+    boot.scr-${MACHINE};boot.scr \
+"
+WKS_FILE_DEPENDS += "u-boot-script-boundary"
 
-# Boot scripts to install
-BOOT_SCRIPTS = "6x_bootscript-${MACHINE}:6x_bootscript"
+UBOOT_MACHINE ?= "nitrogen6q_defconfig"
 
-UBOOT_MACHINE ?= "nitrogen6q_config"
-
-SERIAL_CONSOLE = "115200 ttymxc1"
+SERIAL_CONSOLES = "115200;ttymxc1"
 
 MACHINE_EXTRA_RRECOMMENDS += "linux-firmware-wl12xx"
+MACHINE_ESSENTIAL_EXTRA_RDEPENDS += " \
+    kernel-image \
+    kernel-devicetree \
+"
 
 MACHINE_FEATURES += " pci wifi bluetooth"

conf/machine/nitrogen7.conf

@@ -0,0 +1,34 @@
+#@TYPE: Machine
+#@NAME: Boundary Devices Nitrogen7
+#@SOC: i.MX7D
+#@DESCRIPTION: Machine configuration for Boundary Devices Nitrogen7
+#@MAINTAINER: Chris Dimich <chris.dimich@boundarydevices.com>
+
+MACHINEOVERRIDES =. "mx7:mx7d:"
+
+IMX_DEFAULT_BSP ?= "nxp"
+
+require conf/machine/include/imx-base.inc
+require conf/machine/include/arm/armv7a/tune-cortexa7.inc
+
+KERNEL_DEVICETREE = "imx7d-nitrogen7.dtb"
+KERNEL_IMAGETYPE = "zImage"
+
+PREFERRED_PROVIDER_u-boot ??= "u-boot-boundary"
+PREFERRED_PROVIDER_virtual/bootloader ??= "u-boot-boundary"
+PREFERRED_PROVIDER_virtual/kernel ??= "linux-boundary"
+PREFERRED_PROVIDER_virtual/kernel:use-mainline-bsp ??= "linux-fslc"
+
+# wic support
+WKS_FILE = "sdimage-bootpart.wks"
+IMAGE_BOOT_FILES:append = " \
+    boot.scr-${MACHINE};boot.scr \
+"
+WKS_FILE_DEPENDS += "u-boot-script-boundary"
+
+UBOOT_MACHINE ?= "nitrogen7_defconfig"
+
+SERIAL_CONSOLES = "115200;ttymxc0"
+
+MACHINE_EXTRA_RRECOMMENDS += "linux-firmware-wl12xx"
+MACHINE_FEATURES += " pci wifi bluetooth"

conf/machine/nitrogen8m.conf

@@ -0,0 +1,72 @@
+#@TYPE: Machine
+#@NAME: Boundary Devices Nitrogen8M
+#@SOC: i.MX8 MQ
+#@DESCRIPTION: Machine configuration for Boundary Devices Nitrogen8M
+#@MAINTAINER: Chris Dimich <chris.dimich@boundarydevices.com>
+
+MACHINEOVERRIDES =. "mx8mq:"
+
+IMX_DEFAULT_BSP ?= "nxp"
+
+require conf/machine/include/imx-base.inc
+require conf/machine/include/arm/armv8a/tune-cortexa53.inc
+
+# Kernel configuration
+PREFERRED_PROVIDER_virtual/kernel ??= "linux-boundary"
+KERNEL_DEVICETREE = "freescale/imx8mq-nitrogen8m.dtb \
+	freescale/imx8mq-nitrogen8m-m4.dtb \
+	freescale/imx8mq-nitrogen8m_som.dtb \
+	freescale/imx8mq-nitrogen8m_som-m4.dtb \
+	freescale/imx8mq-nitrogen8m-tc358743.dtb \
+	freescale/imx8mq-nitrogen8m-edp.dtb \
+"
+KERNEL_IMAGETYPE = "Image"
+RRECOMMENDS:${KERNEL_PACKAGE_NAME}-base = ""
+
+# U-Boot configuration
+IMX_DEFAULT_BOOTLOADER:imx-nxp-bsp = "u-boot-boundary"
+PREFERRED_PROVIDER_u-boot ??= "u-boot-boundary"
+PREFERRED_PROVIDER_virtual/bootloader ??= "u-boot-boundary"
+PREFERRED_PROVIDER_imx-atf ??= "imx-atf-boundary"
+SPL_BINARY = "spl/u-boot-spl.bin"
+UBOOT_SUFFIX = "bin"
+
+UBOOT_CONFIG ??= "2g 2gr0 4g som_2g som_2gr0 som_4g som_sd_2g som_sd_4g"
+UBOOT_CONFIG[2g]       = "${MACHINE}_2g_defconfig,sdcard"
+UBOOT_CONFIG[2gr0]       = "${MACHINE}_2gr0_defconfig,sdcard"
+UBOOT_CONFIG[4g]     = "${MACHINE}_4g_defconfig,sdcard"
+UBOOT_CONFIG[som_2g] = "${MACHINE}_som_2g_defconfig,sdcard"
+UBOOT_CONFIG[som_2gr0]   = "${MACHINE}_som_2gr0_defconfig,sdcard"
+UBOOT_CONFIG[som_4g]   = "${MACHINE}_som_4g_defconfig,sdcard"
+UBOOT_CONFIG[som_sd_2g]   = "${MACHINE}_som_sd_2g_defconfig,sdcard"
+UBOOT_CONFIG[som_sd_4g]   = "${MACHINE}_som_sd_4g_defconfig,sdcard"
+
+ATF_PLATFORM = "imx8mq"
+
+DDR_FIRMWARE_NAME = "\
+    lpddr4_pmu_train_1d_imem.bin \
+    lpddr4_pmu_train_1d_dmem.bin \
+    lpddr4_pmu_train_2d_imem.bin \
+    lpddr4_pmu_train_2d_dmem.bin \
+"
+
+IMAGE_BOOT_FILES:append = " \
+	boot.scr-${MACHINE};boot.scr \
+	upgrade.scr-${MACHINE};upgrade.scr \
+	flash.bin-${MACHINE}-2g;u-boot.${MACHINE}_2g \
+	flash.bin-${MACHINE}-2gr0;u-boot.${MACHINE}_2gr0 \
+	flash.bin-${MACHINE}-4g;u-boot.${MACHINE}_4g \
+	flash.bin-${MACHINE}-som_2g;u-boot.${MACHINE}_som_2g \
+	flash.bin-${MACHINE}-som_2gr0;u-boot.${MACHINE}_som_2gr0 \
+	flash.bin-${MACHINE}-som_4g;u-boot.${MACHINE}_som_4g \
+	flash.bin-${MACHINE}-som_sd_2g;u-boot.${MACHINE}_som_sd_2g \
+	flash.bin-${MACHINE}-som_sd_4g;u-boot.${MACHINE}_som_sd_4g \
+"
+
+# wic support
+WKS_FILE = "sdimage-bootpart.wks"
+WKS_FILE_DEPENDS += "u-boot-script-boundary"
+
+SERIAL_CONSOLES ?= "115200;ttymxc0"
+
+MACHINE_FEATURES += " pci wifi bluetooth"

conf/machine/nitrogen8mm.conf

@@ -0,0 +1,89 @@
+#@TYPE: Machine
+#@NAME: Boundary Devices Nitrogen8MM
+#@SOC: i.MX8MM
+#@DESCRIPTION: Machine configuration for Boundary Devices Nitrogen8MM
+#@MAINTAINER: Chris Dimich <chris.dimich@boundarydevices.com>
+
+MACHINEOVERRIDES =. "mx8mm:"
+
+IMX_DEFAULT_BSP ?= "nxp"
+
+require conf/machine/include/imx-base.inc
+require conf/machine/include/arm/armv8a/tune-cortexa53.inc
+
+# Kernel configuration
+PREFERRED_PROVIDER_virtual/kernel ??= "linux-boundary"
+KERNEL_DEVICETREE = "\
+	freescale/imx8mm-nitrogen8mm.dtb \
+	freescale/imx8mm-nitrogen8mm-m4.dtb \
+	freescale/imx8mm-nitrogen8mm-tc358743.dtb \
+	freescale/imx8mm-nitrogen8mm_rev2.dtb \
+	freescale/imx8mm-nitrogen8mm_rev2-m4.dtb \
+	freescale/imx8mm-nitrogen8mm_rev2-tc358743.dtb \
+	freescale/imx8mm-nitrogen8mm_som.dtb \
+	freescale/imx8mm-nitrogen8mm_som-m4.dtb \
+	freescale/imx8mm-nitrogen8mm_som-mcp2518fd.dtb \
+	freescale/imx8mm-nitrogen8mm_som-mcp25625.dtb \
+	freescale/imx8mm-nitrogen8mm_som-tc358743.dtb \
+	freescale/imx8mm-nitrogen8mm_tab.dtb \
+	freescale/imx8mm-nitrogen_smarc.dtb \
+"
+KERNEL_IMAGETYPE = "Image"
+RRECOMMENDS:${KERNEL_PACKAGE_NAME}-base = ""
+
+# U-Boot configuration
+IMX_DEFAULT_BOOTLOADER:imx-nxp-bsp = "u-boot-boundary"
+PREFERRED_PROVIDER_u-boot ??= "u-boot-boundary"
+PREFERRED_PROVIDER_virtual/bootloader ??= "u-boot-boundary"
+PREFERRED_PROVIDER_imx-atf ??= "imx-atf-boundary"
+SPL_BINARY = "spl/u-boot-spl.bin"
+UBOOT_SUFFIX = "bin"
+
+UBOOT_CONFIG ??= "2g 2gr0 4g rev2_2g rev2_2gr0 rev2_4g som_1gr0 som_2g som_2gr0 som_4g smarc_2gr0 smarc_1gch1r0"
+UBOOT_CONFIG[2g]       = "${MACHINE}_2g_defconfig,sdcard"
+UBOOT_CONFIG[2gr0]     = "${MACHINE}_2gr0_defconfig,sdcard"
+UBOOT_CONFIG[4g]       = "${MACHINE}_4g_defconfig,sdcard"
+UBOOT_CONFIG[rev2_2g]  = "${MACHINE}_rev2_2g_defconfig,sdcard"
+UBOOT_CONFIG[rev2_2gr0]  = "${MACHINE}_rev2_4g_defconfig,sdcard"
+UBOOT_CONFIG[rev2_4g]     = "${MACHINE}_2gr0_defconfig,sdcard"
+UBOOT_CONFIG[som_1gr0] = "${MACHINE}_som_1gr0_defconfig,sdcard"
+UBOOT_CONFIG[som_2g]   = "${MACHINE}_som_2g_defconfig,sdcard"
+UBOOT_CONFIG[som_2gr0]   = "${MACHINE}_som_2g_defconfig,sdcard"
+UBOOT_CONFIG[som_4g]   = "${MACHINE}_som_4g_defconfig,sdcard"
+UBOOT_CONFIG[smarc_2gr0]   = "imx8mm_nitrogen_smarc_2gr0_defconfig,sdcard"
+UBOOT_CONFIG[smarc_1gch1r0] = "imx8mm_nitrogen_smarc_1gch1r0_defconfig,sdcard"
+
+ATF_PLATFORM = "imx8mm"
+
+# Set DDR FIRMWARE
+DDR_FIRMWARE_NAME = "\
+    lpddr4_pmu_train_1d_imem.bin \
+    lpddr4_pmu_train_1d_dmem.bin \
+    lpddr4_pmu_train_2d_imem.bin \
+    lpddr4_pmu_train_2d_dmem.bin \
+"
+
+IMAGE_BOOT_FILES:append = " \
+	boot.scr-${MACHINE};boot.scr \
+	upgrade.scr-${MACHINE};upgrade.scr \
+	flash.bin-${MACHINE}-2g;u-boot.${MACHINE}_2g \
+	flash.bin-${MACHINE}-2gr0;u-boot.${MACHINE}_2gr0 \
+	flash.bin-${MACHINE}-4g;u-boot.${MACHINE}_4g \
+	flash.bin-${MACHINE}-rev2_2g;u-boot.${MACHINE}_rev2_2g \
+	flash.bin-${MACHINE}-rev2_2gr0;u-boot.${MACHINE}_rev2_2gr0 \
+	flash.bin-${MACHINE}-rev2_4g;u-boot.${MACHINE}_rev2_4g \
+	flash.bin-${MACHINE}-som_1gr0;u-boot.${MACHINE}_som_1gr0 \
+	flash.bin-${MACHINE}-som_2g;u-boot.${MACHINE}_som_2g \
+	flash.bin-${MACHINE}-som_2gr0;u-boot.${MACHINE}_som_2gr0 \
+	flash.bin-${MACHINE}-som_4g;u-boot.${MACHINE}_som_4g \
+	flash.bin-${MACHINE}-smarc_2gr0;u-boot.imx8mm_nitrogen_smarc_2gr0 \
+	flash.bin-${MACHINE}-smarc_1gch1r0;u-boot.imx8mm_nitrogen_smarc_1gch1r0 \
+"
+
+# wic support
+WKS_FILE = "sdimage-bootpart.wks"
+WKS_FILE_DEPENDS += "u-boot-script-boundary"
+
+SERIAL_CONSOLES = "115200;ttymxc1"
+
+MACHINE_FEATURES += " pci wifi bluetooth"

conf/machine/nitrogen8mn.conf

@@ -0,0 +1,61 @@
+#@TYPE: Machine
+#@NAME: Boundary Devices Nitrogen8M Nano
+#@SOC: i.MX8 Nano
+#@DESCRIPTION: Machine configuration for Boundary Devices Nitrogen8M Nano
+#@MAINTAINER: Chris Dimich <chris.dimich@boundarydevices.com>
+
+MACHINEOVERRIDES =. "mx8mn:"
+
+IMX_DEFAULT_BSP ?= "nxp"
+
+require conf/machine/include/imx-base.inc
+require conf/machine/include/arm/armv8a/tune-cortexa53.inc
+
+# Kernel configuration
+PREFERRED_PROVIDER_virtual/kernel ??= "linux-boundary"
+KERNEL_DEVICETREE = "freescale/imx8mn-nitrogen8mn.dtb \
+	freescale/imx8mn-nitrogen8mn_som.dtb \
+	freescale/imx8mn-nitrogen8mn_som-m4.dtb \
+	freescale/imx8mn-nitrogen8_nano.dtb \
+	freescale/imx8mn-nitrogen8_nano-m4.dtb \
+"
+
+KERNEL_IMAGETYPE = "Image"
+KERNEL_DEFCONFIG = "boundary_defconfig"
+RRECOMMENDS:${KERNEL_PACKAGE_NAME}-base = ""
+
+# U-Boot configuration
+IMX_DEFAULT_BOOTLOADER:imx-nxp-bsp = "u-boot-boundary"
+PREFERRED_PROVIDER_u-boot ??= "u-boot-boundary"
+PREFERRED_PROVIDER_virtual/bootloader ??= "u-boot-boundary"
+PREFERRED_PROVIDER_imx-atf ??= "imx-atf-boundary"
+SPL_BINARY = "spl/u-boot-spl.bin"
+UBOOT_SUFFIX = "bin"
+
+UBOOT_CONFIG ??= "1g som_1g"
+UBOOT_CONFIG[1g]   = "${MACHINE}_1g_defconfig,sdcard"
+UBOOT_CONFIG[som_1g] = "${MACHINE}_som_1g_defconfig,sdcard"
+
+ATF_PLATFORM = "imx8mn"
+
+DDR_FIRMWARE_NAME = "\
+    lpddr4_pmu_train_1d_imem.bin \
+    lpddr4_pmu_train_1d_dmem.bin \
+    lpddr4_pmu_train_2d_imem.bin \
+    lpddr4_pmu_train_2d_dmem.bin \
+"
+
+IMAGE_BOOT_FILES:append = " \
+	boot.scr-${MACHINE};boot.scr \
+	upgrade.scr-${MACHINE};upgrade.scr \
+	flash.bin-${MACHINE}-1g;u-boot.${MACHINE}_1g \
+	flash.bin-${MACHINE}-som_1g;u-boot.${MACHINE}_som_1g \
+"
+
+# wic support
+WKS_FILE = "sdimage-bootpart.wks"
+WKS_FILE_DEPENDS += "u-boot-script-boundary"
+
+SERIAL_CONSOLES = "115200;ttymxc1"
+
+MACHINE_FEATURES += " pci wifi bluetooth"

conf/machine/nitrogen8mp.conf

@@ -0,0 +1,86 @@
+#@TYPE: Machine
+#@NAME: Boundary Devices Nitrogen8MP
+#@SOC: i.MX8 MP
+#@DESCRIPTION: Machine configuration for Boundary Devices Nitrogen8MP
+#@MAINTAINER: Chris Dimich <chris.dimich@boundarydevices.com>
+
+MACHINEOVERRIDES =. "mx8mp:"
+
+IMX_DEFAULT_BSP ?= "nxp"
+
+require conf/machine/include/imx-base.inc
+require conf/machine/include/arm/armv8a/tune-cortexa53.inc
+
+# Kernel configuration
+PREFERRED_PROVIDER_virtual/kernel ??= "linux-boundary"
+KERNEL_DEVICETREE = "freescale/imx8mp-nitrogen8mp.dtb \
+	freescale/imx8mp-nitrogen_smarc.dtb \
+	freescale/imx8mp-nitrogen8mp-m4.dtb \
+	freescale/imx8mp-nitrogen_smarc-rpmsg.dtb \
+	freescale/imx8mp-nitrogen8mp-basler3840-4200.dtb \
+	freescale/imx8mp-nitrogen8mp-enc.dtb \
+	freescale/imx8mp-nitrogen8mp-enc-m4.dtb \
+	freescale/imx8mp-nitrogen8mp-enc-ar.dtb \
+	freescale/imx8mp-nitrogen8mp-enc-basler4200-ov5640.dtb \
+	freescale/imx8mp-nitrogen8mp-enc-tc358743.dtb \
+	freescale/imx8mp-nitrogen8mp_r20.dtb \
+	freescale/imx8mp-nitrogen8mp_r20-m4.dtb \
+	freescale/imx8mp-nitrogen8mp_r20-basler3840-4200.dtb \
+	freescale/imx8mp-nitrogen8mp_r20-enc.dtb \
+	freescale/imx8mp-nitrogen8mp_r20-enc-m4.dtb \
+	freescale/imx8mp-nitrogen8mp_r20-enc-ar.dtb \
+	freescale/imx8mp-nitrogen8mp_r20-enc-basler4200-ov5640.dtb \
+	freescale/imx8mp-nitrogen8mp_r20-enc-tc358743.dtb \
+	freescale/imx8mp-nitrogen8mp_vm.dtb \
+"
+
+KERNEL_IMAGETYPE = "Image"
+RRECOMMENDS:${KERNEL_PACKAGE_NAME}-base = ""
+
+# U-Boot configuration
+IMX_DEFAULT_BOOTLOADER:imx-nxp-bsp = "u-boot-boundary"
+PREFERRED_PROVIDER_u-boot ??= "u-boot-boundary"
+PREFERRED_PROVIDER_virtual/bootloader ??= "u-boot-boundary"
+PREFERRED_PROVIDER_imx-atf ??= "imx-atf-boundary"
+SPL_BINARY = "spl/u-boot-spl.bin"
+UBOOT_SUFFIX = "bin"
+
+UBOOT_CONFIG ??= "2g 2gr0 4g 8g smarc_2gr0 smarc_4g smarc_8g"
+UBOOT_CONFIG[2g]   = "${MACHINE}_2g_defconfig,sdcard"
+UBOOT_CONFIG[2gr0] = "${MACHINE}_2gr0_defconfig,sdcard"
+UBOOT_CONFIG[4g]   = "${MACHINE}_4g_defconfig,sdcard"
+UBOOT_CONFIG[8g]   = "${MACHINE}_8g_defconfig,sdcard"
+UBOOT_CONFIG[smarc_2gr0]   = "imx8mp_nitrogen_smarc_2gr0_defconfig,sdcard"
+UBOOT_CONFIG[smarc_4g]   = "imx8mp_nitrogen_smarc_4g_defconfig,sdcard"
+UBOOT_CONFIG[smarc_8g]   = "imx8mp_nitrogen_smarc_8g_defconfig,sdcard"
+
+ATF_PLATFORM = "imx8mp"
+
+DDR_FIRMWARE_NAME = "\
+    lpddr4_pmu_train_1d_imem_202006.bin \
+    lpddr4_pmu_train_1d_dmem_202006.bin \
+    lpddr4_pmu_train_2d_imem_202006.bin \
+    lpddr4_pmu_train_2d_dmem_202006.bin \
+"
+
+IMAGE_BOOT_FILES:append = " \
+	boot.scr-${MACHINE};boot.scr \
+	upgrade.scr-${MACHINE};upgrade.scr \
+	flash.bin-${MACHINE}-2g;u-boot.${MACHINE}_2g \
+	flash.bin-${MACHINE}-2gr0;u-boot.${MACHINE}_2gr0 \
+	flash.bin-${MACHINE}-4g;u-boot.${MACHINE}_4g \
+	flash.bin-${MACHINE}-8g;u-boot.${MACHINE}_8g \
+	flash.bin-${MACHINE}-smarc_2gr0;u-boot.imx8mp_nitrogen_smarc_2gr0 \
+	flash.bin-${MACHINE}-smarc_4g;u-boot.imx8mp_nitrogen_smarc_4g \
+	flash.bin-${MACHINE}-smarc_8g;u-boot.imx8mp_nitrogen_smarc_8g \
+"
+
+# wic support
+WKS_FILE = "sdimage-bootpart.wks"
+WKS_FILE_DEPENDS += "u-boot-script-boundary"
+
+OPTEE_BIN_EXT = "8mp"
+
+SERIAL_CONSOLES = "115200;ttymxc1"
+
+MACHINE_FEATURES += " pci wifi bluetooth"

conf/machine/olimex-imx8mp-evb.conf

@@ -0,0 +1,72 @@
+#@TYPE: Machine
+#@NAME: Olimex iMX8MP-SOM evaluation board
+#@SOC: i.MX8MP
+#@DESCRIPTION: Machine configuration for Olimex iMX8MP-SOM evaluation board with LPDDR4
+#@MAINTAINER: Leon Anavi <leon.anavi@konsulko.com>
+
+require conf/machine/include/imx8mp-evk.inc
+
+KERNEL_DEVICETREE_BASENAME = "imx8mp-olimex"
+
+# NXP kernel has additional DTB files for various board configuration and
+# derivates. Include them here for NXP BSP only
+KERNEL_DEVICETREE:append:use-nxp-bsp = " \
+    freescale/imx8mp-ab2.dtb \
+    freescale/imx8mp-evk-basler.dtb \
+    freescale/imx8mp-evk-basler-ov2775.dtb \
+    freescale/imx8mp-evk-basler-ov5640.dtb \
+    freescale/imx8mp-evk-dpdk.dtb \
+    freescale/imx8mp-evk-dsp.dtb \
+    freescale/imx8mp-evk-dual-basler.dtb \
+    freescale/imx8mp-evk-dual-os08a20.dtb \
+    freescale/imx8mp-evk-dual-ov2775.dtb \
+    freescale/imx8mp-evk-ecspi-slave.dtb \
+    freescale/imx8mp-evk-flexcan2.dtb \
+    freescale/imx8mp-evk-hifiberry-dacplus.dtb \
+    freescale/imx8mp-evk-inmate.dtb \
+    freescale/imx8mp-evk-iqaudio-dacplus.dtb \
+    freescale/imx8mp-evk-iqaudio-dacpro.dtb \
+    freescale/imx8mp-evk-it6263-lvds-dual-channel.dtb \
+    freescale/imx8mp-evk-jdi-wuxga-lvds-panel.dtb \
+    freescale/imx8mp-evk-ndm.dtb \
+    freescale/imx8mp-evk-os08a20.dtb \
+    freescale/imx8mp-evk-os08a20-ov5640.dtb \
+    freescale/imx8mp-evk-ov2775.dtb \
+    freescale/imx8mp-evk-ov2775-ov5640.dtb \
+    freescale/imx8mp-evk-pcie-ep.dtb \
+    freescale/imx8mp-evk-revA3-8mic-revE.dtb \
+    freescale/imx8mp-evk-rm67191.dtb \
+    freescale/imx8mp-evk-rm67199.dtb \
+    freescale/imx8mp-evk-root.dtb \
+    freescale/imx8mp-evk-rpmsg.dtb \
+    freescale/imx8mp-evk-rpmsg-lpv.dtb \
+    freescale/imx8mp-evk-sof-wm8960.dtb \
+    freescale/imx8mp-evk-spdif-lb.dtb \
+    freescale/imx8mp-evk-usdhc1-m2.dtb \
+    freescale/imx8mp-evk-8mic-swpdm.dtb \
+    freescale/imx8mp-olimex.dtb \
+"
+
+IMX_DEFAULT_BOOTLOADER:use-nxp-bsp = "u-boot-imx"
+IMX_DEFAULT_KERNEL:use-nxp-bsp = "linux-fslc"
+
+UBOOT_CONFIG_BASENAME = "imx8mp_olimex"
+UBOOT_CONFIG[fspi] = "${UBOOT_CONFIG_BASENAME}_defconfig"
+UBOOT_CONFIG[ndm]  = "${UBOOT_CONFIG_BASENAME}_ndm_defconfig"
+UBOOT_DTB_NAME = "imx8mp-evk.dtb"
+
+# Set DDR FIRMWARE
+DDR_FIRMWARE_VERSION = "202006"
+DDR_FIRMWARE_NAME = " \
+    lpddr4_pmu_train_1d_dmem_${DDR_FIRMWARE_VERSION}.bin \
+    lpddr4_pmu_train_1d_imem_${DDR_FIRMWARE_VERSION}.bin \
+    lpddr4_pmu_train_2d_dmem_${DDR_FIRMWARE_VERSION}.bin \
+    lpddr4_pmu_train_2d_imem_${DDR_FIRMWARE_VERSION}.bin \
+"
+
+IMXBOOT_TARGETS_BASENAME = "flash_evk"
+
+# Mainline BSP doesn't support LPDDR4 so it must be set to nxp.
+# Also this machine isn't supported by u-boot-fslc but imx8mn-evk.inc already
+# set the bootloader to u-boot-imx instead when NXP BSP is used.
+IMX_DEFAULT_BSP = "nxp"

conf/machine/pcl052.conf

@@ -1,22 +0,0 @@
-#@TYPE: Machine
-#@NAME: Phytec Cosmic Vybrid Development Kit
-#@SOC: vf60
-#@DESCRIPTION: Machine configuration for Phytec Cosmic Vybrid Development Kit
-#@MAINTAINER: Anthony Felice <tony.felice@timesys.com>
-
-include conf/machine/include/imx-base.inc
-include conf/machine/include/tune-cortexa5.inc
-
-SOC_FAMILY = "vf60"
-
-PREFERRED_PROVIDER_virtual/kernel = "linux-timesys"
-PREFERRED_PROVIDER_u-boot = "u-boot-timesys"
-
-UBOOT_MACHINE = "pcl052_config"
-
-SDCARD_ROOTFS ?= "${DEPLOY_DIR_IMAGE}/${IMAGE_NAME}.rootfs.ext3"
-IMAGE_FSTYPES ?= "tar.bz2 ext3 sdcard"
-
-SERIAL_CONSOLE = "115200 ttymxc1"
-
-MACHINE_FEATURES = "apm usbgadget usbhost vfat alsa"

conf/machine/pcm052.conf

@@ -1,22 +0,0 @@
-#@TYPE: Machine
-#@NAME: Phytec phyCORE Vybrid Development Kit
-#@SOC: vf60
-#@DESCRIPTION: Machine configuration for Phytec phyCORE Vybrid Development Kit
-#@MAINTAINER: Anthony Felice <tony.felice@timesys.com>
-
-include conf/machine/include/imx-base.inc
-include conf/machine/include/tune-cortexa5.inc
-
-SOC_FAMILY = "vf60"
-
-PREFERRED_PROVIDER_virtual/kernel = "linux-timesys"
-PREFERRED_PROVIDER_u-boot = "u-boot-timesys"
-
-UBOOT_MACHINE = "pcm052_config"
-
-SDCARD_ROOTFS ?= "${DEPLOY_DIR_IMAGE}/${IMAGE_NAME}.rootfs.ext3"
-IMAGE_FSTYPES ?= "tar.bz2 ext3 sdcard"
-
-SERIAL_CONSOLE = "115200 ttymxc1"
-
-MACHINE_FEATURES = "apm usbgadget usbhost vfat alsa touchscreen"

conf/machine/quartz.conf

@@ -1,23 +0,0 @@
-#@TYPE: Machine
-#@NAME: Device Solutions Quartz Vybrid Development Kit
-#@SOC: vf60
-#@DESCRIPTION: Machine configuration for Device Solutions Quartz Vybrid Development Kit
-#@MAINTAINER: Anthony Felice <tony.felice@timesys.com>
-
-include conf/machine/include/imx-base.inc
-include conf/machine/include/tune-cortexa5.inc
-
-SOC_FAMILY = "vf60"
-
-PREFERRED_PROVIDER_virtual/kernel = "linux-timesys"
-PREFERRED_PROVIDER_u-boot = "u-boot-timesys"
-
-# The quartz_nand_config target supports both SD and NAND boot.
-UBOOT_MACHINE = "quartz_nand_config"
-
-SDCARD_ROOTFS ?= "${DEPLOY_DIR_IMAGE}/${IMAGE_NAME}.rootfs.ext3"
-IMAGE_FSTYPES ?= "tar.bz2 ext3 sdcard"
-
-SERIAL_CONSOLE = "115200 ttymxc0"
-
-MACHINE_FEATURES = "apm usbgadget usbhost vfat alsa touchscreen"

conf/machine/wandboard-dual.conf

@@ -1,17 +0,0 @@
-#@TYPE: Machine
-#@NAME: Wandboard i.MX6 Wandboard Duallite
-#@SOC: i.MX6DL
-#@DESCRIPTION: Machine configuration for i.MX6 Wandboard Duallite
-#@MAINTAINER: John Weber <rjohnweber@gmail.com>
-
-include include/wandboard.inc
-
-SOC_FAMILY = "mx6:mx6dl:wandboard"
-
-UBOOT_MACHINE = "wandboard_dl_config"
-
-KERNEL_DEVICETREE = "imx6dl-wandboard.dtb"
-
-MACHINE_FEATURES += "bluetooth wifi"
-
-MACHINE_EXTRA_RRECOMMENDS += " broadcom-nvram-config"

conf/machine/wandboard-quad.conf

@@ -1,17 +0,0 @@
-#@TYPE: Machine
-#@NAME: Wandboard i.MX6 Wandboard Quad
-#@SOC: i.MX6Q
-#@DESCRIPTION: Machine configuration for i.MX6 Wandboard Quad
-#@MAINTAINER: John Weber <rjohnweber@gmail.com>
-
-include include/wandboard.inc
-
-SOC_FAMILY = "mx6:mx6q:wandboard"
-
-UBOOT_MACHINE = "wandboard_quad_config"
-
-KERNEL_DEVICETREE = "imx6q-wandboard.dtb"
-
-MACHINE_FEATURES += "bluetooth wifi"
-
-MACHINE_EXTRA_RRECOMMENDS += " broadcom-nvram-config"

conf/machine/wandboard-solo.conf

@@ -1,13 +0,0 @@
-#@TYPE: Machine
-#@NAME: Wandboard i.MX6 Wandboard Solo
-#@SOC: i.MX6S
-#@DESCRIPTION: Machine configuration for i.MX6 Wandboard Solo
-#@MAINTAINER: John Weber <rjohnweber@gmail.com>
-
-include include/wandboard.inc
-
-SOC_FAMILY = "mx6:mx6dl:wandboard"
-
-UBOOT_MACHINE = "wandboard_solo_config"
-
-KERNEL_DEVICETREE = "imx6dl-wandboard.dtb"

conf/machine/wandboard.conf

@@ -0,0 +1,53 @@
+#@TYPE: Machine
+#@NAME: Wandboard i.MX6 Wandboard QuadPlus/Quad/Dual/Solo
+#@SOC: i.MX6QP/Q/DL
+#@DESCRIPTION: Machine configuration for i.MX6 Wandboard QuadPlus/Quad/Dual/Solo
+#@MAINTAINER: Alfonso Tames <alfonso@tames.com>
+
+MACHINEOVERRIDES =. "mx6q:mx6dl:"
+
+include conf/machine/include/imx-base.inc
+include conf/machine/include/arm/armv7a/tune-cortexa9.inc
+
+IMX_DEFAULT_BSP = "mainline"
+
+UBOOT_MAKE_TARGET = ""
+UBOOT_SUFFIX = "img"
+SPL_BINARY = "SPL"
+UBOOT_MACHINE = "wandboard_config"
+
+UBOOT_EXTLINUX = "1"
+UBOOT_EXTLINUX_ROOT = "root=PARTUUID=${uuid}"
+UBOOT_EXTLINUX_CONSOLE = "console=${console},${baudrate}"
+
+WANDBOARD_DEFAULT_KERNEL = "linux-wandboard"
+WANDBOARD_DEFAULT_KERNEL:use-mainline-bsp = "linux-fslc"
+PREFERRED_PROVIDER_virtual/kernel ?= "${WANDBOARD_DEFAULT_KERNEL}"
+KERNEL_DEVICETREE = " \
+    nxp/imx/imx6dl-wandboard.dtb \
+    nxp/imx/imx6dl-wandboard-revb1.dtb \
+    nxp/imx/imx6dl-wandboard-revd1.dtb \
+    nxp/imx/imx6q-wandboard.dtb \
+    nxp/imx/imx6q-wandboard-revb1.dtb \
+    nxp/imx/imx6q-wandboard-revd1.dtb \
+    nxp/imx/imx6qp-wandboard-revd1.dtb \
+"
+
+KERNEL_IMAGETYPE = "zImage"
+
+MACHINE_FEATURES += "bluetooth pci wifi touchscreen"
+
+MACHINE_EXTRA_RRECOMMENDS += " \
+  bcm4329-nvram-config \
+  bcm4330-nvram-config \
+"
+
+SERIAL_CONSOLES = "115200;ttymxc0"
+
+MACHINE_ESSENTIAL_EXTRA_RDEPENDS += " \
+    kernel-image \
+    kernel-devicetree \
+    u-boot-fslc \
+"
+
+WKS_FILES = "imx-uboot-spl.wks.in"

recipes-bsp/alsa-state/alsa-state.bbappend

@@ -0,0 +1 @@
+FILESEXTRAPATHS:prepend:cubox-i := "${THISDIR}/files:"

recipes-bsp/alsa-state/files/cubox-i/asound.conf

@@ -0,0 +1,459 @@
+defaults.pcm.rate_converter "linear"
+
+pcm.dmix_48000{
+type dmix
+ipc_key 5678293
+ipc_key_add_uid yes
+slave{
+pcm "hw:2,0"
+period_time 40000
+format S16_LE
+rate 48000
+}
+}
+
+pcm.dmix_44100{
+type dmix
+ipc_key 5678293
+ipc_key_add_uid yes
+slave{
+pcm "hw:2,0"
+period_time 40000
+format S16_LE
+rate 44100
+}
+}
+
+pcm.dmix_32000{
+type dmix
+ipc_key 5678293
+ipc_key_add_uid yes
+slave{
+pcm "hw:2,0"
+period_time 40000
+format S16_LE
+rate 32000
+}
+}
+
+pcm.dmix_24000{
+type dmix
+ipc_key 5678293
+ipc_key_add_uid yes
+slave{
+pcm "hw:2,0"
+period_time 40000
+format S16_LE
+rate 24000
+}
+}
+
+pcm.dmix_22050{
+type dmix
+ipc_key 5678293
+ipc_key_add_uid yes
+slave{
+pcm "hw:2,0"
+period_time 40000
+format S16_LE
+rate 22050
+}
+}
+
+pcm.dmix_16000{
+type dmix
+ipc_key 5678293
+ipc_key_add_uid yes
+slave{
+pcm "hw:2,0"
+period_time 40000
+format S16_LE
+rate 16000
+}
+}
+
+pcm.dmix_12000{
+type dmix
+ipc_key 5678293
+ipc_key_add_uid yes
+slave{
+pcm "hw:2,0"
+period_time 40000
+format S16_LE
+rate 12000
+}
+}
+
+pcm.dmix_11025{
+type dmix
+ipc_key 5678293
+ipc_key_add_uid yes
+slave{
+pcm "hw:2,0"
+period_time 40000
+format S16_LE
+rate 11025
+}
+}
+
+pcm.dmix_8000{
+type dmix
+ipc_key 5678293
+ipc_key_add_uid yes
+slave{
+pcm "hw:2,0"
+period_time 40000
+format S16_LE
+rate 8000
+}
+}
+
+pcm.!dsnoop_48000{
+type dsnoop
+ipc_key 5778293
+ipc_key_add_uid yes
+slave{
+pcm "hw:2,0"
+period_time 40000
+format S16_LE
+rate 48000
+}
+}
+
+pcm.!dsnoop_44100{
+type dsnoop
+ipc_key 5778293
+ipc_key_add_uid yes
+slave{
+pcm "hw:2,0"
+period_time 40000
+format S16_LE
+rate 44100
+}
+}
+
+pcm.!dsnoop_32000{
+type dsnoop
+ipc_key 5778293
+ipc_key_add_uid yes
+slave{
+pcm "hw:2,0"
+period_time 40000
+format S16_LE
+rate 32000
+}
+}
+
+pcm.!dsnoop_24000{
+type dsnoop
+ipc_key 5778293
+ipc_key_add_uid yes
+slave{
+pcm "hw:2,0"
+period_time 40000
+format S16_LE
+rate 24000
+}
+}
+
+pcm.!dsnoop_22050{
+type dsnoop
+ipc_key 5778293
+ipc_key_add_uid yes
+slave{
+pcm "hw:2,0"
+period_time 40000
+format S16_LE
+rate 22050
+}
+}
+
+pcm.!dsnoop_16000{
+type dsnoop
+ipc_key 5778293
+ipc_key_add_uid yes
+slave{
+pcm "hw:2,0"
+period_time 40000
+format S16_LE
+rate 16000
+}
+}
+
+pcm.!dsnoop_12000{
+type dsnoop
+ipc_key 5778293
+ipc_key_add_uid yes
+slave{
+pcm "hw:2,0"
+period_time 40000
+format S16_LE
+rate 12000
+}
+}
+
+pcm.!dsnoop_11025{
+type dsnoop
+ipc_key 5778293
+ipc_key_add_uid yes
+slave{
+pcm "hw:2,0"
+period_time 40000
+format S16_LE
+rate 11025
+}
+}
+
+pcm.!dsnoop_8000{
+type dsnoop
+ipc_key 5778293
+ipc_key_add_uid yes
+slave{
+pcm "hw:2,0"
+period_time 40000
+format S16_LE
+rate 8000
+}
+}
+
+pcm.asymed{
+type asym
+playback.pcm "dmix_44100"
+capture.pcm "dsnoop_44100"
+}
+
+pcm.dsp0{
+type plug
+slave.pcm "asymed"
+}
+
+pcm.!default{
+type plug
+route_policy "average"
+slave.pcm "asymed"
+}
+
+ctl.!default{
+type hw
+card 2
+}
+
+ctl.mixer0{
+type hw
+card 2
+}
+
+pcm_slave.esai{
+	pcm "hw:2,0"
+	channels 8
+	rate 48000
+	period_time 40000
+}
+
+pcm.esaich1to6{
+	type dshare
+	ipc_key 5778293
+	slave esai
+	bindings.0 0
+	bindings.1 4
+	bindings.2 1
+	bindings.3 5
+	bindings.4 2
+	bindings.5 6
+}
+
+pcm.esaich78{
+	type dshare
+	ipc_key 5778293
+	slave esai
+	bindings.0 3
+	bindings.1 7
+}
+
+pcm_slave.sai5 {
+	pcm "hw:5,0"
+	channels 8
+}
+
+pcm.sai5_ch1to8 {
+	type dsnoop
+	ipc_key 5185558
+	slave sai5
+	bindings.0 0
+	bindings.1 4
+	bindings.2 1
+	bindings.3 5
+	bindings.4 2
+	bindings.5 6
+	bindings.6 3
+	bindings.7 7
+}
+
+pcm.sai5_ch1to6 {
+	type dsnoop
+	ipc_key 5165558
+	slave sai5
+	bindings.0 0
+	bindings.1 4
+	bindings.2 1
+	bindings.3 5
+	bindings.4 2
+	bindings.5 6
+}
+
+pcm.sai5_ch1to4 {
+	type dsnoop
+	ipc_key 5145558
+	slave sai5
+	bindings.0 0
+	bindings.1 4
+	bindings.2 1
+	bindings.3 5
+}
+
+pcm_slave.sai1{
+	pcm "hw:4,0"
+	channels 16
+}
+
+pcm.sai1to16{
+	type dshare
+	slave sai1
+	ipc_key 5144458
+	bindings.0 0
+	bindings.1 8
+	bindings.2 1
+	bindings.3 9
+	bindings.4 2
+	bindings.5 10
+	bindings.6 3
+	bindings.7 11
+	bindings.8 4
+	bindings.9 12
+	bindings.10 5
+	bindings.11 13
+	bindings.12 6
+	bindings.13 14
+	bindings.14 7
+	bindings.15 15
+}
+
+pcm.sai1to14{
+	type dshare
+	slave sai1
+	ipc_key 5144458
+	bindings.0 0
+	bindings.1 8
+	bindings.2 1
+	bindings.3 9
+	bindings.4 2
+	bindings.5 10
+	bindings.6 3
+	bindings.7 11
+	bindings.8 4
+	bindings.9 12
+	bindings.10 5
+	bindings.11 13
+	bindings.12 6
+	bindings.13 14
+}
+
+pcm.sai1to12{
+	type dshare
+	slave sai1
+	ipc_key 5144458
+	bindings.0 0
+	bindings.1 8
+	bindings.2 1
+	bindings.3 9
+	bindings.4 2
+	bindings.5 10
+	bindings.6 3
+	bindings.7 11
+	bindings.8 4
+	bindings.9 12
+	bindings.10 5
+	bindings.11 13
+}
+
+pcm.sai1to10{
+	type dshare
+	slave sai1
+	ipc_key 5144458
+	bindings.0 0
+	bindings.1 8
+	bindings.2 1
+	bindings.3 9
+	bindings.4 2
+	bindings.5 10
+	bindings.6 3
+	bindings.7 11
+	bindings.8 4
+	bindings.9 12
+}
+
+pcm.sai1to8{
+	type dshare
+	slave sai1
+	ipc_key 5144458
+	bindings.0 0
+	bindings.1 8
+	bindings.2 1
+	bindings.3 9
+	bindings.4 2
+	bindings.5 10
+	bindings.6 3
+	bindings.7 11
+}
+
+pcm.sai1to6{
+	type dshare
+	slave sai1
+	ipc_key 5144458
+	bindings.0 0
+	bindings.1 8
+	bindings.2 1
+	bindings.3 9
+	bindings.4 2
+	bindings.5 10
+}
+
+pcm.sai1to4{
+	type dshare
+	slave sai1
+	ipc_key 5144458
+	bindings.0 0
+	bindings.1 8
+	bindings.2 1
+	bindings.3 9
+}
+
+pcm.cdnhdmi4ch {
+	type dshare
+	slave {
+		pcm "hw:3,0"
+		channels 4
+	}
+	ipc_key 5144458
+	bindings.0 0
+	bindings.1 2
+	bindings.2 1
+	bindings.3 3
+}
+
+pcm.cdnhdmi8ch {
+	type dshare
+	slave {
+		pcm "hw:3,0"
+		channels 8
+	}
+	ipc_key 5144458
+	bindings.0 0
+	bindings.1 4
+	bindings.2 1
+	bindings.3 5
+	bindings.4 2
+	bindings.5 6
+	bindings.6 3
+	bindings.7 7
+}

recipes-bsp/atf/files/0001-Clean-usage-of-void-pointers-to-access-symbols.patch

@@ -0,0 +1,709 @@
+From 9f85f9e3796f1c351bbc4c8436dc66d83c140b71 Mon Sep 17 00:00:00 2001
+From: Joel Hutton <Joel.Hutton@Arm.com>
+Date: Wed, 21 Mar 2018 11:40:57 +0000
+Subject: [PATCH] Clean usage of void pointers to access symbols
+
+Void pointers have been used to access linker symbols, by declaring an
+extern pointer, then taking the address of it. This limits symbols
+values to aligned pointer values. To remove this restriction an
+IMPORT_SYM macro has been introduced, which declares it as a char
+pointer and casts it to the required type.
+
+Upstream-Status: Backport
+
+Change-Id: I89877fc3b13ed311817bb8ba79d4872b89bfd3b0
+Signed-off-by: Joel Hutton <Joel.Hutton@Arm.com>
+---
+ bl1/bl1_private.h                            | 12 +++----
+ common/runtime_svc.c                         |  4 +--
+ drivers/auth/img_parser_mod.c                |  9 +++---
+ include/common/bl_common.h                   | 32 ++++++++++++-------
+ include/common/runtime_svc.h                 |  4 +--
+ include/lib/utils_def.h                      | 19 ++++++++++-
+ include/plat/common/common_def.h             | 24 ++------------
+ include/services/secure_partition.h          | 12 +++----
+ lib/locks/bakery/bakery_lock_normal.c        |  6 ++--
+ lib/pmf/pmf_main.c                           | 19 +++++------
+ plat/hisilicon/hikey/hikey_bl1_setup.c       | 21 ++-----------
+ plat/hisilicon/hikey960/hikey960_bl1_setup.c | 16 ++--------
+ plat/hisilicon/poplar/bl1_plat_setup.c       | 13 ++------
+ plat/mediatek/mt6795/bl31_plat_setup.c       | 11 +++----
+ plat/mediatek/mt8173/bl31_plat_setup.c       | 28 +++--------------
+ plat/nvidia/tegra/common/tegra_bl31_setup.c  | 33 +++++++-------------
+ plat/rockchip/common/bl31_plat_setup.c       | 13 ++------
+ services/std_svc/spm/spm_shim_private.h      | 14 +++------
+ 18 files changed, 103 insertions(+), 187 deletions(-)
+
+diff --git a/bl1/bl1_private.h b/bl1/bl1_private.h
+index 6ac3b8c67..42a74d22f 100644
+--- a/bl1/bl1_private.h
++++ b/bl1/bl1_private.h
+@@ -1,5 +1,5 @@
+ /*
+- * Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved.
++ * Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
+  *
+  * SPDX-License-Identifier: BSD-3-Clause
+  */
+@@ -8,18 +8,16 @@
+ #define __BL1_PRIVATE_H__
+ 
+ #include <types.h>
++#include <utils_def.h>
+ 
+ /*******************************************************************************
+  * Declarations of linker defined symbols which will tell us where BL1 lives
+  * in Trusted ROM and RAM
+  ******************************************************************************/
+-extern uintptr_t __BL1_ROM_END__;
+-#define BL1_ROM_END (uintptr_t)(&__BL1_ROM_END__)
++IMPORT_SYM(uintptr_t, __BL1_ROM_END__,   BL1_ROM_END);
+ 
+-extern uintptr_t __BL1_RAM_START__;
+-extern uintptr_t __BL1_RAM_END__;
+-#define BL1_RAM_BASE (uintptr_t)(&__BL1_RAM_START__)
+-#define BL1_RAM_LIMIT (uintptr_t)(&__BL1_RAM_END__)
++IMPORT_SYM(uintptr_t, __BL1_RAM_START__, BL1_RAM_BASE);
++IMPORT_SYM(uintptr_t, __BL1_RAM_END__,   BL1_RAM_LIMIT);
+ 
+ /******************************************
+  * Function prototypes
+diff --git a/common/runtime_svc.c b/common/runtime_svc.c
+index 0ea4cd093..de80f30c2 100644
+--- a/common/runtime_svc.c
++++ b/common/runtime_svc.c
+@@ -1,5 +1,5 @@
+ /*
+- * Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
++ * Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
+  *
+  * SPDX-License-Identifier: BSD-3-Clause
+  */
+@@ -19,8 +19,6 @@
+  * 'rt_svc_descs_indices' array. This gives the index of the descriptor in the
+  * 'rt_svc_descs' array which contains the SMC handler.
+  ******************************************************************************/
+-#define RT_SVC_DESCS_START	((uintptr_t) (&__RT_SVC_DESCS_START__))
+-#define RT_SVC_DESCS_END	((uintptr_t) (&__RT_SVC_DESCS_END__))
+ uint8_t rt_svc_descs_indices[MAX_RT_SVCS];
+ static rt_svc_desc_t *rt_svc_descs;
+ 
+diff --git a/drivers/auth/img_parser_mod.c b/drivers/auth/img_parser_mod.c
+index 6a0107115..63160141d 100644
+--- a/drivers/auth/img_parser_mod.c
++++ b/drivers/auth/img_parser_mod.c
+@@ -1,5 +1,5 @@
+ /*
+- * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
++ * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
+  *
+  * SPDX-License-Identifier: BSD-3-Clause
+  */
+@@ -12,11 +12,10 @@
+ #include <limits.h>
+ #include <stdint.h>
+ #include <string.h>
++#include <utils_def.h>
+ 
+-extern uintptr_t __PARSER_LIB_DESCS_START__;
+-extern uintptr_t __PARSER_LIB_DESCS_END__;
+-#define PARSER_LIB_DESCS_START	((uintptr_t) (&__PARSER_LIB_DESCS_START__))
+-#define PARSER_LIB_DESCS_END	((uintptr_t) (&__PARSER_LIB_DESCS_END__))
++IMPORT_SYM(uintptr_t, __PARSER_LIB_DESCS_START__,	PARSER_LIB_DESCS_START);
++IMPORT_SYM(uintptr_t, __PARSER_LIB_DESCS_END__,		PARSER_LIB_DESCS_END);
+ static unsigned int parser_lib_indices[IMG_MAX_TYPES];
+ static img_parser_lib_desc_t *parser_lib_descs;
+ 
+diff --git a/include/common/bl_common.h b/include/common/bl_common.h
+index 4ef916f53..09a394dd1 100644
+--- a/include/common/bl_common.h
++++ b/include/common/bl_common.h
+@@ -64,33 +64,41 @@
+ #include <types.h>
+ #include <utils_def.h> /* To retain compatibility */
+ 
++
+ /*
+  * Declarations of linker defined symbols to help determine memory layout of
+  * BL images
+  */
+ #if SEPARATE_CODE_AND_RODATA
+-extern uintptr_t __TEXT_START__;
+-extern uintptr_t __TEXT_END__;
+-extern uintptr_t __RODATA_START__;
+-extern uintptr_t __RODATA_END__;
++IMPORT_SYM(unsigned long, __TEXT_START__,	BL_CODE_BASE);
++IMPORT_SYM(unsigned long, __TEXT_END__,		BL_CODE_END);
++IMPORT_SYM(unsigned long, __RODATA_START__,	BL_RO_DATA_BASE);
++IMPORT_SYM(unsigned long, __RODATA_END__,	BL_RO_DATA_END);
+ #else
+-extern uintptr_t __RO_START__;
+-extern uintptr_t __RO_END__;
++IMPORT_SYM(unsigned long, __RO_START__,		BL_CODE_BASE);
++IMPORT_SYM(unsigned long, __RO_END__,		BL_CODE_END);
+ #endif
+ 
+ #if defined(IMAGE_BL2)
+-extern uintptr_t __BL2_END__;
++IMPORT_SYM(unsigned long, __BL2_END__,		BL2_END);
+ #elif defined(IMAGE_BL2U)
+-extern uintptr_t __BL2U_END__;
++IMPORT_SYM(unsigned long, __BL2U_END__,		BL2U_END);
+ #elif defined(IMAGE_BL31)
+-extern uintptr_t __BL31_END__;
++IMPORT_SYM(unsigned long, __BL31_END__,		BL31_END);
+ #elif defined(IMAGE_BL32)
+-extern uintptr_t __BL32_END__;
++IMPORT_SYM(unsigned long, __BL32_END__,		BL32_END);
+ #endif /* IMAGE_BLX */
+ 
++/*
++ * The next 2 constants identify the extents of the coherent memory region.
++ * These addresses are used by the MMU setup code and therefore they must be
++ * page-aligned.  It is the responsibility of the linker script to ensure that
++ * __COHERENT_RAM_START__ and __COHERENT_RAM_END__ linker symbols refer to
++ * page-aligned addresses.
++ */
+ #if USE_COHERENT_MEM
+-extern uintptr_t __COHERENT_RAM_START__;
+-extern uintptr_t __COHERENT_RAM_END__;
++IMPORT_SYM(unsigned long, __COHERENT_RAM_START__,	BL_COHERENT_RAM_BASE);
++IMPORT_SYM(unsigned long, __COHERENT_RAM_END__,		BL_COHERENT_RAM_END);
+ #endif
+ 
+ /*******************************************************************************
+diff --git a/include/common/runtime_svc.h b/include/common/runtime_svc.h
+index d12af227e..5d9fa3908 100644
+--- a/include/common/runtime_svc.h
++++ b/include/common/runtime_svc.h
+@@ -122,8 +122,8 @@ CASSERT(RT_SVC_DESC_HANDLE == __builtin_offsetof(rt_svc_desc_t, handle), \
+ void runtime_svc_init(void);
+ uintptr_t handle_runtime_svc(uint32_t smc_fid, void *cookie, void *handle,
+ 						unsigned int flags);
+-extern uintptr_t __RT_SVC_DESCS_START__;
+-extern uintptr_t __RT_SVC_DESCS_END__;
++IMPORT_SYM(uintptr_t, __RT_SVC_DESCS_START__,		RT_SVC_DESCS_START);
++IMPORT_SYM(uintptr_t, __RT_SVC_DESCS_END__,		RT_SVC_DESCS_END);
+ void init_crash_reporting(void);
+ 
+ extern uint8_t rt_svc_descs_indices[MAX_RT_SVCS];
+diff --git a/include/lib/utils_def.h b/include/lib/utils_def.h
+index 4a5c3e0bc..8abc73c09 100644
+--- a/include/lib/utils_def.h
++++ b/include/lib/utils_def.h
+@@ -1,5 +1,5 @@
+ /*
+- * Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved.
++ * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved.
+  *
+  * SPDX-License-Identifier: BSD-3-Clause
+  */
+@@ -99,4 +99,21 @@
+ 	((ARM_ARCH_MAJOR > _maj) || \
+ 	 ((ARM_ARCH_MAJOR == _maj) && (ARM_ARCH_MINOR >= _min)))
+ 
++/*
++ * Import an assembly or linker symbol as a C expression with the specified
++ * type
++ */
++#define IMPORT_SYM(type, sym, name) \
++	extern char sym[];\
++	static const __attribute__((unused)) type name = (type) sym;
++
++/*
++ * When the symbol is used to hold a pointer, its alignment can be asserted
++ * with this macro. For example, if there is a linker symbol that is going to
++ * be used as a 64-bit pointer, the value of the linker symbol must also be
++ * aligned to 64 bit. This macro makes sure this is the case.
++ */
++#define ASSERT_SYM_PTR_ALIGN(sym) assert(((size_t)(sym) % __alignof__(*(sym))) == 0)
++
++
+ #endif /* __UTILS_DEF_H__ */
+diff --git a/include/plat/common/common_def.h b/include/plat/common/common_def.h
+index a841c3dbf..84923b9a7 100644
+--- a/include/plat/common/common_def.h
++++ b/include/plat/common/common_def.h
+@@ -1,5 +1,5 @@
+ /*
+- * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
++ * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
+  *
+  * SPDX-License-Identifier: BSD-3-Clause
+  */
+@@ -74,33 +74,13 @@
+  * page of it with the right memory attributes.
+  */
+ #if SEPARATE_CODE_AND_RODATA
+-#define BL_CODE_BASE		(unsigned long)(&__TEXT_START__)
+-#define BL_CODE_END		(unsigned long)(&__TEXT_END__)
+-#define BL_RO_DATA_BASE		(unsigned long)(&__RODATA_START__)
+-#define BL_RO_DATA_END		(unsigned long)(&__RODATA_END__)
+ 
+ #define BL1_CODE_END		BL_CODE_END
+-#define BL1_RO_DATA_BASE	(unsigned long)(&__RODATA_START__)
++#define BL1_RO_DATA_BASE	BL_RO_DATA_BASE
+ #define BL1_RO_DATA_END		round_up(BL1_ROM_END, PAGE_SIZE)
+ #else
+-#define BL_CODE_BASE		(unsigned long)(&__RO_START__)
+-#define BL_CODE_END		(unsigned long)(&__RO_END__)
+ #define BL_RO_DATA_BASE		0
+ #define BL_RO_DATA_END		0
+-
+ #define BL1_CODE_END		round_up(BL1_ROM_END, PAGE_SIZE)
+-#define BL1_RO_DATA_BASE	0
+-#define BL1_RO_DATA_END		0
+ #endif /* SEPARATE_CODE_AND_RODATA */
+-
+-/*
+- * The next 2 constants identify the extents of the coherent memory region.
+- * These addresses are used by the MMU setup code and therefore they must be
+- * page-aligned.  It is the responsibility of the linker script to ensure that
+- * __COHERENT_RAM_START__ and __COHERENT_RAM_END__ linker symbols refer to
+- * page-aligned addresses.
+- */
+-#define BL_COHERENT_RAM_BASE	(unsigned long)(&__COHERENT_RAM_START__)
+-#define BL_COHERENT_RAM_END	(unsigned long)(&__COHERENT_RAM_END__)
+-
+ #endif /* __COMMON_DEF_H__ */
+diff --git a/include/services/secure_partition.h b/include/services/secure_partition.h
+index 93df2a137..f68f711be 100644
+--- a/include/services/secure_partition.h
++++ b/include/services/secure_partition.h
+@@ -1,5 +1,5 @@
+ /*
+- * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
++ * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
+  *
+  * SPDX-License-Identifier: BSD-3-Clause
+  */
+@@ -11,15 +11,11 @@
+ #include <types.h>
+ #include <utils_def.h>
+ 
+-/* Linker symbols */
+-extern uintptr_t __SP_IMAGE_XLAT_TABLES_START__;
+-extern uintptr_t __SP_IMAGE_XLAT_TABLES_END__;
++/* Import linker symbols */
++IMPORT_SYM(uintptr_t, __SP_IMAGE_XLAT_TABLES_START__,	SP_IMAGE_XLAT_TABLES_START);
++IMPORT_SYM(uintptr_t, __SP_IMAGE_XLAT_TABLES_END__,	SP_IMAGE_XLAT_TABLES_END);
+ 
+ /* Definitions */
+-#define SP_IMAGE_XLAT_TABLES_START	\
+-	(uintptr_t)(&__SP_IMAGE_XLAT_TABLES_START__)
+-#define SP_IMAGE_XLAT_TABLES_END	\
+-	(uintptr_t)(&__SP_IMAGE_XLAT_TABLES_END__)
+ #define SP_IMAGE_XLAT_TABLES_SIZE	\
+ 	(SP_IMAGE_XLAT_TABLES_END - SP_IMAGE_XLAT_TABLES_START)
+ 
+diff --git a/lib/locks/bakery/bakery_lock_normal.c b/lib/locks/bakery/bakery_lock_normal.c
+index 8f59215e3..37697f521 100644
+--- a/lib/locks/bakery/bakery_lock_normal.c
++++ b/lib/locks/bakery/bakery_lock_normal.c
+@@ -1,5 +1,5 @@
+ /*
+- * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
++ * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
+  *
+  * SPDX-License-Identifier: BSD-3-Clause
+  */
+@@ -10,6 +10,7 @@
+ #include <cpu_data.h>
+ #include <platform.h>
+ #include <string.h>
++#include <utils_def.h>
+ 
+ /*
+  * Functions in this file implement Bakery Algorithm for mutual exclusion with the
+@@ -49,8 +50,7 @@ CASSERT((PLAT_PERCPU_BAKERY_LOCK_SIZE & (CACHE_WRITEBACK_GRANULE - 1)) == 0, \
+  * Use the linker defined symbol which has evaluated the size reqiurement.
+  * This is not as efficient as using a platform defined constant
+  */
+-extern void *__PERCPU_BAKERY_LOCK_SIZE__;
+-#define PERCPU_BAKERY_LOCK_SIZE ((uintptr_t)&__PERCPU_BAKERY_LOCK_SIZE__)
++IMPORT_SYM(uintptr_t, __PERCPU_BAKERY_LOCK_SIZE__, PERCPU_BAKERY_LOCK_SIZE);
+ #endif
+ 
+ #define get_bakery_info(cpu_ix, lock)	\
+diff --git a/lib/pmf/pmf_main.c b/lib/pmf/pmf_main.c
+index 2cf260ec1..0208948fe 100644
+--- a/lib/pmf/pmf_main.c
++++ b/lib/pmf/pmf_main.c
+@@ -1,5 +1,5 @@
+ /*
+- * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
++ * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved.
+  *
+  * SPDX-License-Identifier: BSD-3-Clause
+  */
+@@ -11,6 +11,7 @@
+ #include <platform.h>
+ #include <pmf.h>
+ #include <string.h>
++#include <utils_def.h>
+ 
+ /*******************************************************************************
+  * The 'pmf_svc_descs' array holds the PMF service descriptors exported by
+@@ -21,16 +22,12 @@
+  * index of the descriptor in the 'pmf_svc_descs' array  which contains the
+  * service function pointers.
+  ******************************************************************************/
+-extern uintptr_t __PMF_SVC_DESCS_START__;
+-extern uintptr_t __PMF_SVC_DESCS_END__;
+-#define PMF_SVC_DESCS_START		((uintptr_t)(&__PMF_SVC_DESCS_START__))
+-#define PMF_SVC_DESCS_END		((uintptr_t)(&__PMF_SVC_DESCS_END__))
+-extern void *__PERCPU_TIMESTAMP_SIZE__;
+-#define PMF_PERCPU_TIMESTAMP_SIZE	((uintptr_t)&__PERCPU_TIMESTAMP_SIZE__)
+-extern uintptr_t __PMF_TIMESTAMP_START__;
+-#define PMF_TIMESTAMP_ARRAY_START	((uintptr_t)&__PMF_TIMESTAMP_START__)
+-extern uintptr_t __PMF_TIMESTAMP_END__;
+-#define PMF_TIMESTAMP_ARRAY_END		((uintptr_t)&__PMF_TIMESTAMP_END__)
++
++IMPORT_SYM(uintptr_t, __PMF_SVC_DESCS_START__,		PMF_SVC_DESCS_START);
++IMPORT_SYM(uintptr_t, __PMF_SVC_DESCS_END__,		PMF_SVC_DESCS_END);
++IMPORT_SYM(uintptr_t, __PERCPU_TIMESTAMP_SIZE__,	PMF_PERCPU_TIMESTAMP_SIZE);
++IMPORT_SYM(intptr_t,  __PMF_TIMESTAMP_START__,		PMF_TIMESTAMP_ARRAY_START);
++IMPORT_SYM(uintptr_t, __PMF_TIMESTAMP_END__,		PMF_TIMESTAMP_ARRAY_END);
+ 
+ #define PMF_SVC_DESCS_MAX		10
+ 
+diff --git a/plat/hisilicon/hikey/hikey_bl1_setup.c b/plat/hisilicon/hikey/hikey_bl1_setup.c
+index 69b194a53..9ede1dbc7 100644
+--- a/plat/hisilicon/hikey/hikey_bl1_setup.c
++++ b/plat/hisilicon/hikey/hikey_bl1_setup.c
+@@ -23,23 +23,6 @@
+ #include "hikey_def.h"
+ #include "hikey_private.h"
+ 
+-/*
+- * Declarations of linker defined symbols which will help us find the layout
+- * of trusted RAM
+- */
+-extern unsigned long __COHERENT_RAM_START__;
+-extern unsigned long __COHERENT_RAM_END__;
+-
+-/*
+- * The next 2 constants identify the extents of the coherent memory region.
+- * These addresses are used by the MMU setup code and therefore they must be
+- * page-aligned.  It is the responsibility of the linker script to ensure that
+- * __COHERENT_RAM_START__ and __COHERENT_RAM_END__ linker symbols refer to
+- * page-aligned addresses.
+- */
+-#define BL1_COHERENT_RAM_BASE (unsigned long)(&__COHERENT_RAM_START__)
+-#define BL1_COHERENT_RAM_LIMIT (unsigned long)(&__COHERENT_RAM_END__)
+-
+ /* Data structure which holds the extents of the trusted RAM for BL1 */
+ static meminfo_t bl1_tzram_layout;
+ 
+@@ -103,8 +86,8 @@ void bl1_plat_arch_setup(void)
+ 			   bl1_tzram_layout.total_size,
+ 			   BL1_RO_BASE,
+ 			   BL1_RO_LIMIT,
+-			   BL1_COHERENT_RAM_BASE,
+-			   BL1_COHERENT_RAM_LIMIT);
++			   BL_COHERENT_RAM_BASE,
++			   BL_COHERENT_RAM_END);
+ }
+ 
+ /*
+diff --git a/plat/hisilicon/hikey960/hikey960_bl1_setup.c b/plat/hisilicon/hikey960/hikey960_bl1_setup.c
+index 9cadba0bb..6a07f0924 100644
+--- a/plat/hisilicon/hikey960/hikey960_bl1_setup.c
++++ b/plat/hisilicon/hikey960/hikey960_bl1_setup.c
+@@ -37,18 +37,6 @@ enum {
+  * Declarations of linker defined symbols which will help us find the layout
+  * of trusted RAM
+  */
+-extern unsigned long __COHERENT_RAM_START__;
+-extern unsigned long __COHERENT_RAM_END__;
+-
+-/*
+- * The next 2 constants identify the extents of the coherent memory region.
+- * These addresses are used by the MMU setup code and therefore they must be
+- * page-aligned.  It is the responsibility of the linker script to ensure that
+- * __COHERENT_RAM_START__ and __COHERENT_RAM_END__ linker symbols refer to
+- * page-aligned addresses.
+- */
+-#define BL1_COHERENT_RAM_BASE (unsigned long)(&__COHERENT_RAM_START__)
+-#define BL1_COHERENT_RAM_LIMIT (unsigned long)(&__COHERENT_RAM_END__)
+ 
+ /* Data structure which holds the extents of the trusted RAM for BL1 */
+ static meminfo_t bl1_tzram_layout;
+@@ -131,8 +119,8 @@ void bl1_plat_arch_setup(void)
+ 			      bl1_tzram_layout.total_size,
+ 			      BL1_RO_BASE,
+ 			      BL1_RO_LIMIT,
+-			      BL1_COHERENT_RAM_BASE,
+-			      BL1_COHERENT_RAM_LIMIT);
++			      BL_COHERENT_RAM_BASE,
++			      BL_COHERENT_RAM_END);
+ }
+ 
+ static void hikey960_ufs_reset(void)
+diff --git a/plat/hisilicon/poplar/bl1_plat_setup.c b/plat/hisilicon/poplar/bl1_plat_setup.c
+index 39551135f..25eed5938 100644
+--- a/plat/hisilicon/poplar/bl1_plat_setup.c
++++ b/plat/hisilicon/poplar/bl1_plat_setup.c
+@@ -1,5 +1,5 @@
+ /*
+- * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
++ * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
+  *
+  * SPDX-License-Identifier: BSD-3-Clause
+  */
+@@ -23,13 +23,6 @@
+ #include "hi3798cv200.h"
+ #include "plat_private.h"
+ 
+-/* Symbols from link script for conherent section */
+-extern unsigned long __COHERENT_RAM_START__;
+-extern unsigned long __COHERENT_RAM_END__;
+-
+-#define BL1_COHERENT_RAM_BASE	(unsigned long)(&__COHERENT_RAM_START__)
+-#define BL1_COHERENT_RAM_LIMIT	(unsigned long)(&__COHERENT_RAM_END__)
+-
+ /* Data structure which holds the extents of the trusted RAM for BL1 */
+ static meminfo_t bl1_tzram_layout;
+ 
+@@ -92,8 +85,8 @@ void bl1_plat_arch_setup(void)
+ 			       bl1_tzram_layout.total_size,
+ 			       BL1_RO_BASE, /* l-loader and BL1 ROM */
+ 			       BL1_RO_LIMIT,
+-			       BL1_COHERENT_RAM_BASE,
+-			       BL1_COHERENT_RAM_LIMIT);
++			       BL_COHERENT_RAM_BASE,
++			       BL_COHERENT_RAM_END);
+ }
+ 
+ void bl1_platform_setup(void)
+diff --git a/plat/mediatek/mt6795/bl31_plat_setup.c b/plat/mediatek/mt6795/bl31_plat_setup.c
+index 803f1ed85..32f015721 100644
+--- a/plat/mediatek/mt6795/bl31_plat_setup.c
++++ b/plat/mediatek/mt6795/bl31_plat_setup.c
+@@ -1,5 +1,5 @@
+ /*
+- * Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved.
++ * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved.
+  *
+  * SPDX-License-Identifier: BSD-3-Clause
+  */
+@@ -21,22 +21,21 @@
+ #include <plat_private.h>
+ #include <platform.h>
+ #include <string.h>
++#include <utils_def.h>
+ #include <xlat_tables.h>
++
+ /*******************************************************************************
+  * Declarations of linker defined symbols which will help us find the layout
+  * of trusted SRAM
+  ******************************************************************************/
+-unsigned long __RO_START__;
+-unsigned long __RO_END__;
+-
+ /*
+  * The next 2 constants identify the extents of the code & RO data region.
+  * These addresses are used by the MMU setup code and therefore they must be
+  * page-aligned.  It is the responsibility of the linker script to ensure that
+  * __RO_START__ and __RO_END__ linker symbols refer to page-aligned addresses.
+  */
+-#define BL31_RO_BASE (unsigned long)(&__RO_START__)
+-#define BL31_RO_LIMIT (unsigned long)(&__RO_END__)
++IMPORT_SYM(unsigned long, __RO_START__,	BL31_RO_BASE);
++IMPORT_SYM(unsigned long, __RO_END__,	BL31_RO_LIMIT);
+ 
+ /*
+  * Placeholder variables for copying the arguments that have been passed to
+diff --git a/plat/mediatek/mt8173/bl31_plat_setup.c b/plat/mediatek/mt8173/bl31_plat_setup.c
+index 7b2930771..e51bdbb9e 100644
+--- a/plat/mediatek/mt8173/bl31_plat_setup.c
++++ b/plat/mediatek/mt8173/bl31_plat_setup.c
+@@ -1,5 +1,5 @@
+ /*
+- * Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved.
++ * Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
+  *
+  * SPDX-License-Identifier: BSD-3-Clause
+  */
+@@ -17,24 +17,6 @@
+ #include <platform.h>
+ #include <spm.h>
+ 
+-/*******************************************************************************
+- * Declarations of linker defined symbols which will help us find the layout
+- * of trusted SRAM
+- ******************************************************************************/
+-unsigned long __RO_START__;
+-unsigned long __RO_END__;
+-
+-/*
+- * The next 3 constants identify the extents of the code, RO data region and the
+- * limit of the BL31 image.  These addresses are used by the MMU setup code and
+- * therefore they must be page-aligned.  It is the responsibility of the linker
+- * script to ensure that __RO_START__, __RO_END__ & __BL31_END__ linker symbols
+- * refer to page-aligned addresses.
+- */
+-#define BL31_RO_BASE (unsigned long)(&__RO_START__)
+-#define BL31_RO_LIMIT (unsigned long)(&__RO_END__)
+-#define BL31_END (unsigned long)(&__BL31_END__)
+-
+ static entry_point_info_t bl32_ep_info;
+ static entry_point_info_t bl33_ep_info;
+ 
+@@ -156,10 +138,10 @@ void bl31_plat_arch_setup(void)
+ 	plat_cci_init();
+ 	plat_cci_enable();
+ 
+-	plat_configure_mmu_el3(BL31_RO_BASE,
+-			       BL_COHERENT_RAM_END - BL31_RO_BASE,
+-			       BL31_RO_BASE,
+-			       BL31_RO_LIMIT,
++	plat_configure_mmu_el3(BL_CODE_BASE,
++			       BL_COHERENT_RAM_END - BL_CODE_BASE,
++			       BL_CODE_BASE,
++			       BL_CODE_END,
+ 			       BL_COHERENT_RAM_BASE,
+ 			       BL_COHERENT_RAM_END);
+ }
+diff --git a/plat/nvidia/tegra/common/tegra_bl31_setup.c b/plat/nvidia/tegra/common/tegra_bl31_setup.c
+index d89ad7b94..2fe4e7dbc 100644
+--- a/plat/nvidia/tegra/common/tegra_bl31_setup.c
++++ b/plat/nvidia/tegra/common/tegra_bl31_setup.c
+@@ -1,5 +1,5 @@
+ /*
+- * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
++ * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
+  *
+  * SPDX-License-Identifier: BSD-3-Clause
+  */
+@@ -23,6 +23,7 @@
+ #include <string.h>
+ #include <tegra_def.h>
+ #include <tegra_private.h>
++#include <utils_def.h>
+ 
+ /* length of Trusty's input parameters (in bytes) */
+ #define TRUSTY_PARAMS_LEN_BYTES	(4096*2)
+@@ -33,29 +34,17 @@ extern void zeromem16(void *mem, unsigned int length);
+  * Declarations of linker defined symbols which will help us find the layout
+  * of trusted SRAM
+  ******************************************************************************/
+-extern unsigned long __TEXT_START__;
+-extern unsigned long __TEXT_END__;
+-extern unsigned long __RW_START__;
+-extern unsigned long __RW_END__;
+-extern unsigned long __RODATA_START__;
+-extern unsigned long __RODATA_END__;
+-extern unsigned long __BL31_END__;
++
++IMPORT_SYM(unsigned long, __RW_START__,		BL31_RW_START);
++IMPORT_SYM(unsigned long, __RW_END__,		BL31_RW_END);
++IMPORT_SYM(unsigned long, __RODATA_START__,	BL31_RODATA_BASE);
++IMPORT_SYM(unsigned long, __RODATA_END__,	BL31_RODATA_END);
++IMPORT_SYM(unsigned long, __TEXT_START__,	TEXT_START);
++IMPORT_SYM(unsigned long, __TEXT_END__,		TEXT_END);
+ 
+ extern uint64_t tegra_bl31_phys_base;
+ extern uint64_t tegra_console_base;
+ 
+-/*
+- * The next 3 constants identify the extents of the code, RO data region and the
+- * limit of the BL3-1 image.  These addresses are used by the MMU setup code and
+- * therefore they must be page-aligned.  It is the responsibility of the linker
+- * script to ensure that __RO_START__, __RO_END__ & __BL31_END__ linker symbols
+- * refer to page-aligned addresses.
+- */
+-#define BL31_RW_START (unsigned long)(&__RW_START__)
+-#define BL31_RW_END (unsigned long)(&__RW_END__)
+-#define BL31_RODATA_BASE (unsigned long)(&__RODATA_START__)
+-#define BL31_RODATA_END (unsigned long)(&__RODATA_END__)
+-#define BL31_END (unsigned long)(&__BL31_END__)
+ 
+ static entry_point_info_t bl33_image_ep_info, bl32_image_ep_info;
+ static plat_params_from_bl2_t plat_bl31_params_from_bl2 = {
+@@ -311,8 +300,8 @@ void bl31_plat_arch_setup(void)
+ 	unsigned long rw_size = BL31_RW_END - BL31_RW_START;
+ 	unsigned long rodata_start = BL31_RODATA_BASE;
+ 	unsigned long rodata_size = BL31_RODATA_END - BL31_RODATA_BASE;
+-	unsigned long code_base = (unsigned long)(&__TEXT_START__);
+-	unsigned long code_size = (unsigned long)(&__TEXT_END__) - code_base;
++	unsigned long code_base = TEXT_START;
++	unsigned long code_size = TEXT_END - TEXT_START;
+ 	const mmap_region_t *plat_mmio_map = NULL;
+ #if USE_COHERENT_MEM
+ 	unsigned long coh_start, coh_size;
+diff --git a/plat/rockchip/common/bl31_plat_setup.c b/plat/rockchip/common/bl31_plat_setup.c
+index 6199edae2..e5ee68f14 100644
+--- a/plat/rockchip/common/bl31_plat_setup.c
++++ b/plat/rockchip/common/bl31_plat_setup.c
+@@ -1,5 +1,5 @@
+ /*
+- * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
++ * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved.
+  *
+  * SPDX-License-Identifier: BSD-3-Clause
+  */
+@@ -17,21 +17,14 @@
+ #include <platform_def.h>
+ #include <uart_16550.h>
+ 
+-/*******************************************************************************
+- * Declarations of linker defined symbols which will help us find the layout
+- * of trusted SRAM
+- ******************************************************************************/
+-unsigned long __RO_START__;
+-unsigned long __RO_END__;
+-
+ /*
+  * The next 2 constants identify the extents of the code & RO data region.
+  * These addresses are used by the MMU setup code and therefore they must be
+  * page-aligned.  It is the responsibility of the linker script to ensure that
+  * __RO_START__ and __RO_END__ linker symbols refer to page-aligned addresses.
+  */
+-#define BL31_RO_BASE (unsigned long)(&__RO_START__)
+-#define BL31_RO_LIMIT (unsigned long)(&__RO_END__)
++IMPORT_SYM(unsigned long, __RO_START__,	BL31_RO_BASE);
++IMPORT_SYM(unsigned long, __RO_END__,	BL31_RO_LIMIT);
+ 
+ static entry_point_info_t bl32_ep_info;
+ static entry_point_info_t bl33_ep_info;
+diff --git a/services/std_svc/spm/spm_shim_private.h b/services/std_svc/spm/spm_shim_private.h
+index ad953cde7..8408d1e04 100644
+--- a/services/std_svc/spm/spm_shim_private.h
++++ b/services/std_svc/spm/spm_shim_private.h
+@@ -1,5 +1,5 @@
+ /*
+- * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
++ * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
+  *
+  * SPDX-License-Identifier: BSD-3-Clause
+  */
+@@ -8,21 +8,17 @@
+ #define __SPM_SHIM_PRIVATE__
+ 
+ #include <types.h>
++#include <utils_def.h>
+ 
+ /* Assembly source */
+-extern uintptr_t spm_shim_exceptions_ptr;
++IMPORT_SYM(uintptr_t, spm_shim_exceptions_ptr,		SPM_SHIM_EXCEPTIONS_PTR);
+ 
+ /* Linker symbols */
+-extern uintptr_t __SPM_SHIM_EXCEPTIONS_START__;
+-extern uintptr_t __SPM_SHIM_EXCEPTIONS_END__;
++IMPORT_SYM(uintptr_t, __SPM_SHIM_EXCEPTIONS_START__,	SPM_SHIM_EXCEPTIONS_START);
++IMPORT_SYM(uintptr_t, __SPM_SHIM_EXCEPTIONS_END__,	SPM_SHIM_EXCEPTIONS_END);
+ 
+ /* Definitions */
+-#define SPM_SHIM_EXCEPTIONS_PTR		(uintptr_t)(&spm_shim_exceptions_ptr)
+ 
+-#define SPM_SHIM_EXCEPTIONS_START	\
+-	(uintptr_t)(&__SPM_SHIM_EXCEPTIONS_START__)
+-#define SPM_SHIM_EXCEPTIONS_END		\
+-	(uintptr_t)(&__SPM_SHIM_EXCEPTIONS_END__)
+ #define SPM_SHIM_EXCEPTIONS_SIZE	\
+ 	(SPM_SHIM_EXCEPTIONS_END - SPM_SHIM_EXCEPTIONS_START)
+ 
+-- 
+2.25.1
+

recipes-bsp/atf/qoriq-atf-lx2160acex7/0001-plat-nxp-Add-lx2160acex7-module-support.patch

@@ -0,0 +1,370 @@
+From 64bd53306e0301e707a52be9f4f7121c87cd6f7d Mon Sep 17 00:00:00 2001
+From: Rabeeh Khoury <rabeeh@solid-run.com>
+Date: Sun, 28 Jul 2019 13:17:54 +0300
+Subject: [PATCH] plat/nxp: Add lx2160acex7 module support
+
+Adds SolidRun's LX2160A based SoC COM express type 7 module support.
+The patch is based on LX2160ARDB board and modifies the support to two
+SO-DIMMs DDR4 support on I2C address 0x50 and 0x52.
+
+Upstream-Status: Inappropriate [Solid-Run BSP]
+
+Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com>
+---
+ plat/nxp/soc-lx2160/lx2160acex7/ddr_init.c    |  77 ++++++++
+ plat/nxp/soc-lx2160/lx2160acex7/platform.mk   |  16 ++
+ .../nxp/soc-lx2160/lx2160acex7/platform_def.h | 187 ++++++++++++++++++
+ plat/nxp/soc-lx2160/lx2160acex7/policy.h      |  40 ++++
+ 4 files changed, 320 insertions(+)
+ create mode 100644 plat/nxp/soc-lx2160/lx2160acex7/ddr_init.c
+ create mode 100644 plat/nxp/soc-lx2160/lx2160acex7/platform.mk
+ create mode 100644 plat/nxp/soc-lx2160/lx2160acex7/platform_def.h
+ create mode 100644 plat/nxp/soc-lx2160/lx2160acex7/policy.h
+
+diff --git a/plat/nxp/soc-lx2160/lx2160acex7/ddr_init.c b/plat/nxp/soc-lx2160/lx2160acex7/ddr_init.c
+new file mode 100644
+index 00000000..d0bcdf46
+--- /dev/null
++++ b/plat/nxp/soc-lx2160/lx2160acex7/ddr_init.c
+@@ -0,0 +1,77 @@
++/*
++ * Copyright 2019 SolidRun ltd.
++ *
++ * SPDX-License-Identifier: BSD-3-Clause
++ *
++ * Author Rabeeh Khoury <rabeeh@solid-run.com>
++ */
++
++#include <platform_def.h>
++#include <stdint.h>
++#include <stdio.h>
++#include <stdlib.h>
++#include <stdbool.h>
++#include <debug.h>
++#include <errno.h>
++#include <utils.h>
++#include <string.h>
++#include <ddr.h>
++#include <i2c.h>
++
++int ddr_board_options(struct ddr_info *priv)
++{
++	struct memctl_opt *popts = &priv->opt;
++
++	popts->vref_dimm = 0x24;		/* range 1, 83.4% */
++	popts->rtt_override = 0;
++	popts->rtt_park = 240;
++	popts->otf_burst_chop_en = 0;
++	popts->burst_length = DDR_BL8;
++	popts->trwt_override = 1;
++	popts->bstopre = 0;			/* auto precharge */
++	popts->addr_hash = 1;
++	popts->trwt = 0x3;
++	popts->twrt = 0x3;
++	popts->trrt = 0x3;
++	popts->twwt = 0x3;
++	popts->vref_phy = 0x60;	/* 75% */
++	popts->odt = 48;
++	popts->phy_tx_impedance = 48;
++
++	return 0;
++}
++
++long long _init_ddr(void)
++{
++	int spd_addr[] = { 0x51, 0x53 };
++	struct ddr_info info;
++	struct sysinfo sys;
++	long long dram_size;
++
++	zeromem(&sys, sizeof(sys));
++	get_clocks(&sys);
++	debug("platform clock %lu\n", sys.freq_platform);
++	debug("DDR PLL1 %lu\n", sys.freq_ddr_pll0);
++	debug("DDR PLL2 %lu\n", sys.freq_ddr_pll1);
++
++	zeromem(&info, sizeof(info));
++
++	/* Set two DDRC. Unused DDRC will be removed automatically. */
++	info.num_ctlrs = 2;
++	info.spd_addr = spd_addr;
++	info.ddr[0] = (void *)NXP_DDR_ADDR;
++	info.ddr[1] = (void *)NXP_DDR2_ADDR;
++	info.phy[0] = (void *)NXP_DDR_PHY1_ADDR;
++	info.phy[1] = (void *)NXP_DDR_PHY2_ADDR;
++	info.clk = get_ddr_freq(&sys, 0);
++	if (!info.clk)
++		info.clk = get_ddr_freq(&sys, 1);
++	info.dimm_on_ctlr = 1;
++
++	dram_size = dram_init(&info);
++
++	if (dram_size < 0)
++		ERROR("DDR init failed.\n");
++
++	return dram_size;
++}
+diff --git a/plat/nxp/soc-lx2160/lx2160acex7/platform.mk b/plat/nxp/soc-lx2160/lx2160acex7/platform.mk
+new file mode 100644
+index 00000000..490f82f8
+--- /dev/null
++++ b/plat/nxp/soc-lx2160/lx2160acex7/platform.mk
+@@ -0,0 +1,16 @@
++#
++# Copyright 2019 SolidRun ltd.
++#
++# SPDX-License-Identifier: BSD-3-Clause
++#
++# Author Rabeeh Khoury <rabeeh@solid-run.com>
++
++# board-specific build parameters
++BOOT_MODE	:= 	flexspi_nor
++BOARD		:=	acex7
++
++ # get SoC common build parameters
++include plat/nxp/soc-lx2160/soc.mk
++
++BL2_SOURCES	+=	${BOARD_PATH}/ddr_init.c
++
+diff --git a/plat/nxp/soc-lx2160/lx2160acex7/platform_def.h b/plat/nxp/soc-lx2160/lx2160acex7/platform_def.h
+new file mode 100644
+index 00000000..614f0342
+--- /dev/null
++++ b/plat/nxp/soc-lx2160/lx2160acex7/platform_def.h
+@@ -0,0 +1,187 @@
++/*
++ * Copyright 2019 SolidRun ltd.
++ *
++ * SPDX-License-Identifier: BSD-3-Clause
++ *
++ * Author: Rabeeh Khoury <rabeeh@solid-run.com>
++ */
++
++#ifndef __PLATFORM_DEF_H__
++#define __PLATFORM_DEF_H__
++
++#include <arch.h>
++/* Certain ARM files require defines from this file */
++#include <tbbr_img_def.h>
++/* From ARM :-> Has some common defines ARM requires */
++#include <common_def.h>
++/* Soc specific defines */
++#include <soc.h>
++/* include the platform-level security policy */
++#include <policy.h>
++
++#if defined(IMAGE_BL2)
++#define SEC_MEM_NON_COHERENT
++#endif
++/* Special value used to verify platform parameters from BL2 to BL31 */
++
++/* TBD -- Check and get back if this value is same for all platforms */
++#define LS_BL31_PLAT_PARAM_VAL		0x0f1e2d3c4b5a6978ULL
++
++/******************************************************************************
++ *  Board specific defines
++ *****************************************************************************/
++
++#define NXP_SYSCLK_FREQ		100000000
++#define NXP_DDRCLK_FREQ		100000000
++
++/* UART related definition */
++#define NXP_CONSOLE_ADDR	NXP_UART_ADDR
++#define NXP_CONSOLE_BAUDRATE	115200
++
++#define NXP_SPD_EEPROM0		0x51
++
++#define DDRC_NUM_DIMM		1	
++#define CONFIG_DDR_ECC_EN
++#define CONFIG_DDR_ADDR_DEC	/* enable address decoding feature */
++
++#define PLAT_DEF_DRAM0_SIZE	0x80000000	/*  2G */
++
++/* Board specific - size of QSPI Flash on board */
++#if FLEXSPI_NOR_BOOT
++#define NXP_FLEXSPI_FLASH_SIZE	0x10000000
++#endif
++/* TBD Put all memory specific defines here */
++
++/******************************************************************************
++ * Required platform porting definitions common to all ARM standard platforms
++ *****************************************************************************/
++
++/* Size of cacheable stacks */
++#if defined(IMAGE_BL2)
++#if defined(TRUSTED_BOARD_BOOT)
++#define PLATFORM_STACK_SIZE	0x2000
++#else
++#define PLATFORM_STACK_SIZE	0x1000
++#endif
++#elif defined(IMAGE_BL31)
++#define PLATFORM_STACK_SIZE	0x1000
++#endif
++
++#define FIRMWARE_WELCOME_STR_LS_BL2	"Welcome to LX2160 BL2 Phase\n"
++#define FIRMWARE_WELCOME_STR_LS_BL31	"Welcome to LX2160 BL31 Phase\n"
++
++/* This is common for all platforms where
++ * 64K is reserved for Secure memory
++ */
++/* 64M Secure Memory */
++#define NXP_SECURE_DRAM_SIZE	(64 * 1024 * 1024)
++
++/* 2M Secure EL1 Payload Shared Memory */
++#define NXP_SP_SHRD_DRAM_SIZE	(2 * 1024 * 1024)
++
++/* Non secure memory */
++#define NXP_NS_DRAM_SIZE	(NXP_DRAM0_SIZE - \
++				(NXP_SECURE_DRAM_SIZE + NXP_SP_SHRD_DRAM_SIZE))
++
++#define NXP_NS_DRAM_ADDR	NXP_DRAM0_ADDR
++
++#ifdef TEST_BL31
++#define NXP_SECURE_DRAM_ADDR 0
++#else
++#define NXP_SECURE_DRAM_ADDR	(NXP_NS_DRAM_ADDR + NXP_DRAM0_SIZE - \
++				(NXP_SECURE_DRAM_SIZE  + NXP_SP_SHRD_DRAM_SIZE))
++#endif
++
++#define NXP_SP_SHRD_DRAM_ADDR	(NXP_NS_DRAM_ADDR + NXP_DRAM0_SIZE \
++				- NXP_SP_SHRD_DRAM_SIZE)
++
++#define BL2_BASE		(NXP_OCRAM_ADDR + NXP_ROM_RSVD + CSF_HDR_SZ)
++#ifdef SD_BOOT
++#define BL2_LIMIT		(NXP_OCRAM_ADDR + NXP_OCRAM_SIZE - NXP_SD_BLOCK_BUF_SIZE)
++#else
++#define BL2_LIMIT		(NXP_OCRAM_ADDR + NXP_OCRAM_SIZE)
++#endif
++#define BL2_TEXT_LIMIT		(BL2_LIMIT)
++
++/* 2 MB reserved in secure memory for DDR */
++#define BL31_BASE		NXP_SECURE_DRAM_ADDR
++#define BL31_SIZE		(0x200000)
++#define BL31_LIMIT		(BL31_BASE + BL31_SIZE)
++
++/* Put BL32 in secure memory */
++#define BL32_BASE		(NXP_SECURE_DRAM_ADDR + BL31_SIZE)
++#define BL32_LIMIT		(NXP_SECURE_DRAM_ADDR + \
++				NXP_SECURE_DRAM_SIZE + NXP_SP_SHRD_DRAM_SIZE)
++
++/* BL33 memory region */
++/* Hardcoded based on current address in u-boot */
++#define BL33_BASE		0x82000000
++#define BL33_LIMIT		(NXP_NS_DRAM_ADDR + NXP_NS_DRAM_SIZE)
++
++/* SD block buffer */
++#define NXP_SD_BLOCK_BUF_SIZE	(0xC000)
++#define NXP_SD_BLOCK_BUF_ADDR	(NXP_OCRAM_ADDR + NXP_OCRAM_SIZE - NXP_SD_BLOCK_BUF_SIZE)
++
++#define PHY_GEN2_FW_IMAGE_BUFFER	(ULL(0x18000000) + CSF_HDR_SZ)
++
++/* IO defines as needed by IO driver framework */
++/* TBD Add how to reach these numbers */
++#define MAX_IO_DEVICES		4
++#define MAX_IO_BLOCK_DEVICES	1
++#define MAX_IO_HANDLES		4
++
++
++/*
++ * FIP image defines - Offset at which FIP Image would be present
++ * Image would include Bl31 , Bl33 and Bl32 (optional)
++ */
++#ifdef POLICY_FUSE_PROVISION
++#define MAX_FIP_DEVICES		3
++#define FUSE_BUF		ULL(0x81000000)
++#define FUSE_SZ			0x80000
++#endif
++
++#ifndef MAX_FIP_DEVICES
++#define MAX_FIP_DEVICES		2
++#endif
++
++#define PLAT_FIP_OFFSET		0x100000
++#define PLAT_FIP_MAX_SIZE	0x400000
++
++/* Check if this size can be determined from array size */
++#if defined(IMAGE_BL2)
++#define MAX_MMAP_REGIONS	8
++#define MAX_XLAT_TABLES		6
++#elif defined(IMAGE_BL31)
++#define MAX_MMAP_REGIONS	9
++#define MAX_XLAT_TABLES		9
++#elif defined(IMAGE_BL32)
++#define MAX_MMAP_REGIONS	8
++#define MAX_XLAT_TABLES		9
++#endif
++
++/******************************************************************************/
++/*
++ * ID of the secure physical generic timer interrupt used by the BL32.
++ */
++#define BL32_IRQ_SEC_PHY_TIMER	29
++
++#define BL31_WDOG_SEC		89
++/*
++ * Define properties of Group 1 Secure and Group 0 interrupts as per GICv3
++ * terminology. On a GICv2 system or mode, the lists will be merged and treated
++ * as Group 0 interrupts.
++ */
++#define PLAT_LS_G1S_IRQ_PROPS(grp) \
++	INTR_PROP_DESC(BL32_IRQ_SEC_PHY_TIMER, GIC_HIGHEST_SEC_PRIORITY, grp, \
++			GIC_INTR_CFG_EDGE)
++
++/* SGI 15 and Secure watchdog interrupts assigned to Group 0 */
++#define PLAT_LS_G0_IRQ_PROPS(grp)	\
++	INTR_PROP_DESC(BL31_WDOG_SEC, GIC_HIGHEST_SEC_PRIORITY, grp, \
++			GIC_INTR_CFG_EDGE), \
++	INTR_PROP_DESC(15, GIC_HIGHEST_SEC_PRIORITY, grp, \
++			GIC_INTR_CFG_LEVEL)
++
++
++#endif 
+diff --git a/plat/nxp/soc-lx2160/lx2160acex7/policy.h b/plat/nxp/soc-lx2160/lx2160acex7/policy.h
+new file mode 100644
+index 00000000..deae979c
+--- /dev/null
++++ b/plat/nxp/soc-lx2160/lx2160acex7/policy.h
+@@ -0,0 +1,40 @@
++/*
++ * Copyright 2019 SolidRun ltd.
++ *
++ * SPDX-License-Identifier: BSD-3-Clause
++ *
++ * Author : Rabeeh Khoury <rabeeh@solid-run.com>
++ */
++
++/*---------------------------------------------------------------------------*/
++
++#ifndef _POLICY_H
++#define	_POLICY_H
++
++ // the following defines affect the PLATFORM SECURITY POLICY
++
++ // set this to 0x0 if the platform is not using/responding to ECC errors
++ // set this to 0x1 if ECC is being used (we have to do some init)
++#define  POLICY_USING_ECC 0x0
++
++ // Set this to 0x0 to leave the default SMMU page size in sACR
++ // Set this to 0x1 to change the SMMU page size to 64K
++#define POLICY_SMMU_PAGESZ_64K 0x1
++
++/*
++ * POLICY_PERF_WRIOP = 0 : No Performance enhancement for WRIOP RN-I
++ * POLICY_PERF_WRIOP = 1 : No Performance enhancement for WRIOP RN-I = 7
++ * POLICY_PERF_WRIOP = 2 : No Performance enhancement for WRIOP RN-I = 23
++ */
++#define POLICY_PERF_WRIOP 0
++
++ /* 
++  * set this to '1' if the debug clocks need to remain enabled during
++  * system entry to low-power (LPM20) - this should only be necessary
++  * for testing and NEVER set for normal production
++  */
++#define POLICY_DEBUG_ENABLE 0
++
++//-----------------------------------------------------------------------------
++
++#endif // _POLICY_H
+-- 
+2.17.1
+

recipes-bsp/atf/qoriq-atf-lx2160acex7/0002-plat-nxp-lx2160a-auto-boot.patch

@@ -0,0 +1,194 @@
+From b5401a18ad8ade8f12a12171169f99214c7126e3 Mon Sep 17 00:00:00 2001
+From: Rabeeh Khoury <rabeeh@solid-run.com>
+Date: Tue, 24 Mar 2020 02:48:34 +0200
+Subject: [PATCH 2/2] plat/nxp: lx2160a auto boot
+
+This patch adds support to patch RCW that already has SD/eMMC/SPI boot
+support embedded with conditional load and jump.
+The idea is to look for SD/eMMC/SPI boot, and modify src/dst/size
+address with the correct values; rather than adding blockread at the end
+of RCW code.
+
+With this patch images are unified and can be used to boot from SD /
+eMMC and SPI.
+
+Upstream-Status: Inappropriate [Solid-Run BSP]
+
+Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com>
+---
+ plat/nxp/common/common.mk   |  5 +++
+ plat/nxp/tools/create_pbl.c | 79 ++++++++++++++++++++++++++++---------
+ 2 files changed, 66 insertions(+), 18 deletions(-)
+
+diff --git a/plat/nxp/common/common.mk b/plat/nxp/common/common.mk
+index a80990740..e7e5f3879 100644
+--- a/plat/nxp/common/common.mk
++++ b/plat/nxp/common/common.mk
+@@ -148,6 +148,11 @@ BOOT_DEV_SOURCES		=	${PLAT_DRIVERS_PATH}/sd/sd_mmc.c	\
+ else ifeq (${BOOT_MODE}, flexspi_nor)
+ $(eval $(call add_define,FLEXSPI_NOR_BOOT))
+ BOOT_DEV_SOURCES		= ${PLAT_DRIVERS_PATH}/flexspi/nor/flexspi_nor.c
++else ifeq (${BOOT_MODE}, auto)
++$(eval $(call add_define,FLEXSPI_NOR_BOOT))
++BOOT_DEV_SOURCES		= ${PLAT_DRIVERS_PATH}/flexspi/nor/flexspi_nor.c \
++				  ${PLAT_DRIVERS_PATH}/sd/sd_mmc.c	\
++				  drivers/io/io_block.c
+ endif
+ 
+ # DDR driver needs to be enabled by default
+diff --git a/plat/nxp/tools/create_pbl.c b/plat/nxp/tools/create_pbl.c
+index 5a08472be..7ee085757 100644
+--- a/plat/nxp/tools/create_pbl.c
++++ b/plat/nxp/tools/create_pbl.c
+@@ -67,6 +67,7 @@ typedef enum {
+ 	FLXSPI_NOR_BOOT,
+ 	FLXSPI_NAND_BOOT,
+ 	FLXSPI_NAND4K_BOOT,
++	AUTO_BOOT,
+ 	MAX_BOOT    /* must be last item in list */
+ } boot_src_t;
+ 
+@@ -194,7 +195,7 @@ struct pbl_image {
+ #define SOC_LS2088 2088
+ #define SOC_LX2160 2160
+ 
+-static uint32_t pbl_size;
++static uint32_t pbl_size = 0;
+ bool sb_flag = false;
+ 
+ /***************************************************************************
+@@ -503,7 +504,6 @@ int add_boot_ptr_cmd(FILE *fp_rcw_pbi_op)
+ 			goto bootptr_err;
+ 		}
+ 	}
+-
+ 	printf("\nBoot Location Pointer= %x\n", BYTE_SWAP_32(pblimg.ep));
+ 	ret = SUCCESS;
+ 
+@@ -697,6 +697,8 @@ int main(int argc, char **argv)
+ 	int ret = FAILURE;
+ 	bool bootptr_flag = false;
+ 	enum stop_command flag_stop_cmd = CRC_STOP_COMMAND;;
++	int skip = 0;
++	uint32_t saved_src;
+ 
+ 	/* Initializing the global structure to zero. */
+ 	memset(&pblimg, 0x0, sizeof(struct pbl_image));
+@@ -797,6 +799,8 @@ int main(int argc, char **argv)
+ 				pblimg.boot_src = FLXSPI_NAND_BOOT;
+ 			else if (!strcmp(optarg, "flexspi_nand2k"))
+ 				pblimg.boot_src = FLXSPI_NAND4K_BOOT;
++			else if (!strcmp(optarg, "auto"))
++				pblimg.boot_src = AUTO_BOOT;
+ 			else {
+ 				printf("CMD Error: Invalid boot source.\n");
+                 		goto exit_main;
+@@ -902,13 +906,14 @@ int main(int argc, char **argv)
+     			printf("%s: Error reading PBI Cmd.\n", __func__);
+     			goto exit_main;
+     		}
+-    		while (word != 0x808f0000 && word != 0x80ff0000) {
++		saved_src = pblimg.src_addr;
++		while (word != 0x808f0000 && word != 0x80ff0000) {
+     			pbl_size++;
+ 			/* 11th words in RCW has PBL length. Update it
+ 			 * with new length. 2 comamnds get added 
+ 			 * Block copy + CCSR Write/CSF header write 
+ 			 */	
+-    			if (pbl_size == 11) {
++			if ((pbl_size == 11) && (pblimg.boot_src != AUTO_BOOT)) {
+     				word_1 = (word & PBI_LEN_MASK)
+     					+ (PBI_LEN_ADD << 20);
+     				word = word & ~PBI_LEN_MASK;
+@@ -923,8 +928,44 @@ int main(int argc, char **argv)
+     					goto exit_main;
+     				}
+     			}
+-    			if (fwrite(&word, sizeof(word),	NUM_MEM_BLOCK,
+-    				fp_rcw_pbi_op) != NUM_MEM_BLOCK) {
++			if (pblimg.boot_src == AUTO_BOOT) {
++				if (word == 0x80000008) {
++					printf ("Found SD boot at %d\n",pbl_size);
++					pblimg.boot_src = SD_BOOT;
++					add_blk_cpy_cmd(fp_rcw_pbi_op, args);
++					pblimg.boot_src = AUTO_BOOT;
++					pblimg.src_addr = saved_src;
++					if (bootptr_flag == true) {
++						add_boot_ptr_cmd(fp_rcw_pbi_op);
++						skip = 6;
++					} else skip=4;
++				}
++				if (word == 0x80000009) {
++					printf ("Found eMMC boot at %d\n",pbl_size);
++					pblimg.boot_src = EMMC_BOOT;
++					add_blk_cpy_cmd(fp_rcw_pbi_op, args);
++					pblimg.boot_src = AUTO_BOOT;
++					pblimg.src_addr = saved_src;
++					if (bootptr_flag == true) {
++						add_boot_ptr_cmd(fp_rcw_pbi_op);
++						skip = 6;
++					} else skip=4;
++				}
++				if (word == 0x8000000f) {
++					printf ("Found SPI boot at %d\n",pbl_size);
++					pblimg.boot_src = FLXSPI_NOR_BOOT;
++					add_blk_cpy_cmd(fp_rcw_pbi_op, args);
++					pblimg.boot_src = AUTO_BOOT;
++					pblimg.src_addr = saved_src;
++					if (bootptr_flag == true) {
++						add_boot_ptr_cmd(fp_rcw_pbi_op);
++						skip = 6;
++					} else skip=4;
++				}
++			}
++			if (!skip &&
++				(fwrite(&word, sizeof(word),	NUM_MEM_BLOCK,
++					fp_rcw_pbi_op) != NUM_MEM_BLOCK)) {
+     				printf("%s: [CH3] Error in Writing PBI Words\n",
+     					__func__);
+     				goto exit_main;
+@@ -941,8 +982,9 @@ int main(int argc, char **argv)
+ 			} else if (word == STOP_CMD_ARM_CH3){
+ 				flag_stop_cmd = STOP_COMMAND;
+ 			}
++			if (skip) skip--;
+     		}
+-		if (bootptr_flag == true) {
++		if ((pblimg.boot_src != AUTO_BOOT) && (bootptr_flag == true)) {
+     			/* Add command to set boot_loc ptr */
+     			ret = add_boot_ptr_cmd(fp_rcw_pbi_op);
+     			if (ret != SUCCESS) {
+@@ -953,18 +995,19 @@ int main(int argc, char **argv)
+ 		}
+ 
+     		/* Write acs write commands to output file */
+-    		ret = add_blk_cpy_cmd(fp_rcw_pbi_op, args);
+-    		if (ret != SUCCESS) {
+-    			printf("%s: Function add_blk_cpy_cmd return failure.\n",
+-    				 __func__);
+-    			goto exit_main;
+-    		}
+-
++		if (pblimg.boot_src != AUTO_BOOT) {
++			ret = add_blk_cpy_cmd(fp_rcw_pbi_op, args);
++			if (ret != SUCCESS) {
++				printf("%s: Function add_blk_cpy_cmd return failure.\n",
++					 __func__);
++				goto exit_main;
++			}
++		}
+ 		/* Add stop command after adding pbi commands */
+-	        ret = add_pbi_stop_cmd(fp_rcw_pbi_op, flag_stop_cmd);
+-    		if (ret != SUCCESS) {
+-    			goto exit_main;
+-    		}
++		ret = add_pbi_stop_cmd(fp_rcw_pbi_op, flag_stop_cmd);
++		if (ret != SUCCESS) {
++			goto exit_main;
++		}
+ 
+             break;
+ 
+-- 
+2.17.1
+

recipes-bsp/atf/qoriq-atf_1.5.bb

@@ -0,0 +1,248 @@
+DESCRIPTION = "ARM Trusted Firmware"
+
+LICENSE = "BSD"
+LIC_FILES_CHKSUM = "file://license.rst;md5=e927e02bca647e14efd87e9e914b2443"
+
+PV = "1.5+git${SRCPV}"
+
+inherit deploy
+
+DEPENDS += "u-boot-mkimage-native u-boot openssl openssl-native mbedtls rcw cst-native"
+DEPENDS:append:lx2160a = " ddr-phy"
+do_compile[depends] += "u-boot:do_deploy rcw:do_deploy uefi:do_deploy"
+
+S = "${WORKDIR}/git"
+
+SRC_URI = "git://source.codeaurora.org/external/qoriq/qoriq-components/atf;nobranch=1 \
+    file://0001-Clean-usage-of-void-pointers-to-access-symbols.patch \
+"
+SRCREV = "5ae5233c064e94a8bd1b4a1652a03b87b0be63f6"
+
+COMPATIBLE_MACHINE = "(qoriq)"
+
+PACKAGE_ARCH = "${MACHINE_ARCH}"
+
+PLATFORM = "${MACHINE}"
+PLATFORM:ls1088ardb-pb = "ls1088ardb"
+PLATFORM_ADDITIONAL_TARGET ??= ""
+PLATFORM_ADDITIONAL_TARGET:ls1012afrwy = "ls1012afrwy_512mb"
+
+RCW_FOLDER ?= "${MACHINE}"
+RCW_FOLDER:ls1088ardb-pb = "ls1088ardb"
+
+# requires CROSS_COMPILE set by hand as there is no configure script
+export CROSS_COMPILE = "${TARGET_PREFIX}"
+export ARCH = "arm64"
+
+# Let the Makefile handle setting up the CFLAGS and LDFLAGS as it is
+# a standalone application
+CFLAGS[unexport] = "1"
+LDFLAGS[unexport] = "1"
+AS[unexport] = "1"
+LD[unexport] = "1"
+
+EXTRA_OEMAKE += "HOSTCC='${BUILD_CC} ${BUILD_CPPFLAGS} ${BUILD_CFLAGS} ${BUILD_LDFLAGS}'"
+
+BOOTTYPE ?= "nor nand qspi flexspi_nor sd emmc"
+OTABOOTTYPE ?= "nor qspi flexspi_nor"
+BUILD_SECURE = "${@bb.utils.contains('DISTRO_FEATURES', 'secure', 'true', 'false', d)}"
+BUILD_OPTEE = "${@bb.utils.contains('COMBINED_FEATURES', 'optee', 'true', 'false', d)}"
+BUILD_FUSE = "${@bb.utils.contains('DISTRO_FEATURES', 'fuse', 'true', 'false', d)}"
+BUILD_OTA = "${@bb.utils.contains('DISTRO_FEATURES', 'ota', 'true', 'false', d)}"
+
+PACKAGECONFIG ??= " \
+    ${@bb.utils.filter('COMBINED_FEATURES', 'optee', d)} \
+"
+PACKAGECONFIG[optee] = ",,optee-os-qoriq"
+
+uboot_boot_sec ?= "${DEPLOY_DIR_IMAGE}/u-boot.bin-tfa-secure-boot"
+uboot_boot ?= "${DEPLOY_DIR_IMAGE}/u-boot.bin-tfa"
+rcw ?= ""
+rcw:ls1012a = "_default"
+rcwsec ?= "_sben"
+
+chassistype ?= "ls2088_1088"
+chassistype:ls1012a = "ls104x_1012"
+chassistype:ls1043a = "ls104x_1012"
+chassistype:ls1046a = "ls104x_1012"
+
+ddrphyopt ?= ""
+ddrphyopt:lx2160a = "fip_ddr_sec"
+
+do_configure[noexec] = "1"
+
+do_compile() {
+    export LIBPATH="${RECIPE_SYSROOT_NATIVE}"
+    install -d ${S}/include/tools_share/openssl
+    cp -r ${RECIPE_SYSROOT}/usr/include/openssl/* ${S}/include/tools_share/openssl
+    if [ ! -f ${RECIPE_SYSROOT_NATIVE}/usr/bin/cst/srk.pri ]; then
+       ${RECIPE_SYSROOT_NATIVE}/usr/bin/cst/gen_keys 1024
+    else
+       cp ${RECIPE_SYSROOT_NATIVE}/usr/bin/cst/srk.pri ${S}
+       cp ${RECIPE_SYSROOT_NATIVE}/usr/bin/cst/srk.pub ${S}
+    fi
+
+    if [ "${BUILD_FUSE}" = "true" ]; then
+       ${RECIPE_SYSROOT_NATIVE}/usr/bin/cst/gen_fusescr ${RECIPE_SYSROOT_NATIVE}/usr/bin/cst/input_files/gen_fusescr/${chassistype}/input_fuse_file
+       fuseopt="fip_fuse FUSE_PROG=1 FUSE_PROV_FILE=fuse_scr.bin"
+    fi
+    if [ "${BUILD_SECURE}" = "true" ]; then
+        secureopt="TRUSTED_BOARD_BOOT=1 ${ddrphyopt} CST_DIR=${RECIPE_SYSROOT_NATIVE}/usr/bin/cst"
+        secext="_sec"
+        bl33="${uboot_boot_sec}"
+        if [ ${chassistype} = ls104x_1012 ]; then
+            rcwtemp="${rcwsec}"
+        else
+            rcwtemp="${rcw}"
+        fi
+    else
+        bl33="${uboot_boot}"
+        rcwtemp="${rcw}"
+    fi       
+
+    if [ "${BUILD_OPTEE}" = "true" ]; then
+        bl32="${RECIPE_SYSROOT}${nonarch_base_libdir}/firmware/tee_${MACHINE}.bin" 
+        bl32opt="BL32=${bl32}"
+        spdopt="SPD=opteed" 
+    fi
+
+    if [ "${BUILD_OTA}" = "true" ]; then
+        otaopt="POLICY_OTA=1"
+        btype="${OTABOOTTYPE}"
+    else
+        btype="${BOOTTYPE}"
+    fi
+
+    if [ -f ${DEPLOY_DIR_IMAGE}/ddr-phy/ddr4_pmu_train_dmem.bin ]; then
+        cp ${DEPLOY_DIR_IMAGE}/ddr-phy/*.bin ${S}/
+    fi
+
+    for d in ${btype}; do
+        case $d in
+        nor)
+            rcwimg="${RCWNOR}${rcwtemp}.bin"
+            uefiboot="${UEFI_NORBOOT}"
+            ;;
+        nand)
+            rcwimg="${RCWNAND}${rcwtemp}.bin"
+            ;;
+        qspi)
+            rcwimg="${RCWQSPI}${rcwtemp}.bin"
+            uefiboot="${UEFI_QSPIBOOT}"
+            if [ "${BUILD_SECURE}" = "true" ] && [ ${MACHINE} = ls1046ardb ]; then
+                rcwimg="RR_FFSSPPPH_1133_5559/rcw_1600_qspiboot_sben.bin"
+            fi
+            ;;
+        auto)
+            rcwimg="${RCWAUTO}${rcwtemp}.bin"
+            ;;
+        sd)
+            rcwimg="${RCWSD}${rcwtemp}.bin"
+            ;;
+        emmc)
+            rcwimg="${RCWEMMC}${rcwtemp}.bin"
+            ;;
+        flexspi_nor)
+            rcwimg="${RCWXSPI}${rcwtemp}.bin"
+            uefiboot="${UEFI_XSPIBOOT}"
+            ;;        
+        esac
+            
+	if [ -f "${DEPLOY_DIR_IMAGE}/rcw/${RCW_FOLDER}/${rcwimg}" ]; then
+                oe_runmake V=1 -C ${S} realclean
+                oe_runmake V=1 -C ${S} all fip pbl PLAT=${PLATFORM} BOOT_MODE=${d} RCW=${DEPLOY_DIR_IMAGE}/rcw/${RCW_FOLDER}/${rcwimg} BL33=${bl33} ${bl32opt} ${spdopt} ${secureopt} ${fuseopt} ${otaopt}
+                cp -r ${S}/build/${PLATFORM}/release/bl2_${d}*.pbl ${S}
+                cp -r ${S}/build/${PLATFORM}/release/fip.bin ${S}
+                if [ "${BUILD_FUSE}" = "true" ]; then
+                    cp -f ${S}/build/${PLATFORM}/release/fuse_fip.bin ${S}
+                fi
+
+                if [ -n "${PLATFORM_ADDITIONAL_TARGET}" ]; then
+                    oe_runmake V=1 -C ${S} realclean
+                    oe_runmake V=1 -C ${S} all fip pbl PLAT=${PLATFORM_ADDITIONAL_TARGET} BOOT_MODE=${d} RCW=${DEPLOY_DIR_IMAGE}/rcw/${RCW_FOLDER}/${rcwimg} BL33=${bl33} ${bl32opt} ${spdopt} ${secureopt} ${fuseopt} ${otaopt}
+                    cp -r ${S}/build/${PLATFORM_ADDITIONAL_TARGET}/release/bl2_qspi${secext}.pbl ${S}/bl2_${d}${secext}_${PLATFORM_ADDITIONAL_TARGET}.pbl
+                    cp -r ${S}/build/${PLATFORM_ADDITIONAL_TARGET}/release/fip.bin ${S}/fip_${PLATFORM_ADDITIONAL_TARGET}.bin
+                    if [ "${BUILD_FUSE}" = "true" ]; then
+                        cp -r ${S}/build/${PLATFORM_ADDITIONAL_TARGET}/release/fuse_fip.bin ${S}/fuse_fip_${PLATFORM_ADDITIONAL_TARGET}.bin
+                    fi
+                fi
+                if [ -n "${uefiboot}" -a -f "${DEPLOY_DIR_IMAGE}/uefi/${PLATFORM}/${uefiboot}" ]; then
+                    oe_runmake V=1 -C ${S} realclean
+                    oe_runmake V=1 -C ${S} all fip pbl PLAT=${PLATFORM} BOOT_MODE=${d} RCW=${DEPLOY_DIR_IMAGE}/rcw/${RCW_FOLDER}/${rcwimg} BL33=${DEPLOY_DIR_IMAGE}/uefi/${PLATFORM}/${uefiboot} ${bl32opt} ${spdopt} ${secureopt} ${fuseopt} ${otaopt}
+                    cp -r ${S}/build/${PLATFORM}/release/fip.bin ${S}/fip_uefi.bin
+                fi
+        fi
+        rcwimg=""
+        uefiboot=""
+    done
+}
+
+do_install() {
+    install -d ${D}/boot/atf
+    cp -r ${S}/srk.pri ${D}/boot/atf
+    cp -r ${S}/srk.pub ${D}/boot/atf
+    if [ "${BUILD_SECURE}" = "true" ]; then
+        secext="_sec"
+    fi
+    if [ -f "${S}/fip_uefi.bin" ]; then
+        cp -r ${S}/fip_uefi.bin ${D}/boot/atf/fip_uefi.bin
+    fi
+    if [ -f "${S}/fuse_fip.bin" ]; then
+        cp -r ${S}/fuse_fip.bin ${D}/boot/atf/fuse_fip.bin
+    fi
+    if [ -f "${S}/fip.bin" ]; then
+        cp -r ${S}/fip.bin ${D}/boot/atf/fip.bin
+    fi
+    for d in ${BOOTTYPE}; do
+        if [ -e  ${S}/bl2_${d}${secext}.pbl ]; then
+            cp -r ${S}/bl2_${d}${secext}.pbl ${D}/boot/atf/bl2_${d}${secext}.pbl
+        fi
+    done
+    if [ -n "${PLATFORM_ADDITIONAL_TARGET}" ]; then
+            cp -r ${S}/fip_${PLATFORM_ADDITIONAL_TARGET}.bin ${D}/boot/atf/fip_${PLATFORM_ADDITIONAL_TARGET}.bin
+            cp -r ${S}/bl2_qspi${secext}_${PLATFORM_ADDITIONAL_TARGET}.pbl ${D}/boot/atf/bl2_qspi${secext}_${PLATFORM_ADDITIONAL_TARGET}.pbl
+            if [ -f "${S}/fuse_fip_${PLATFORM_ADDITIONAL_TARGET}.bin" ]; then
+                cp -r ${S}/fuse_fip_${PLATFORM_ADDITIONAL_TARGET}.bin ${D}/boot/atf/fuse_fip_${PLATFORM_ADDITIONAL_TARGET}.bin
+            fi
+    fi
+    chown -R root:root ${D}
+    if [ -f "${S}/fip_ddr_sec.bin" ]; then
+        cp -r ${S}/fip_ddr_sec.bin ${D}/boot/atf/fip_ddr_sec.bin
+    fi
+}
+
+do_deploy() {
+    install -d ${DEPLOYDIR}/atf
+    cp -r ${D}/boot/atf/srk.pri ${DEPLOYDIR}/atf
+    cp -r  ${D}/boot/atf/srk.pub ${DEPLOYDIR}/atf
+    if [ "${BUILD_SECURE}" = "true" ]; then
+        secext="_sec"
+    fi
+        
+    if [ -f "${S}/fuse_fip.bin" ]; then
+        cp -r ${D}/boot/atf/fuse_fip.bin ${DEPLOYDIR}/atf/fuse_fip${secext}.bin
+    fi
+
+    if [ -e ${D}/boot/atf/fip_uefi.bin ]; then
+        cp -r ${D}/boot/atf/fip_uefi.bin ${DEPLOYDIR}/atf/fip_uefi.bin
+    fi
+    cp -r ${D}/boot/atf/fip.bin ${DEPLOYDIR}/atf/fip_uboot${secext}.bin
+    for d in ${BOOTTYPE}; do
+        if [ -e ${D}/boot/atf/bl2_${d}${secext}.pbl ]; then
+            cp -r ${D}/boot/atf/bl2_${d}${secext}.pbl ${DEPLOYDIR}/atf/bl2_${d}${secext}.pbl
+        fi
+    done
+    if [ -n "${PLATFORM_ADDITIONAL_TARGET}" ]; then
+        cp -r ${S}/bl2_qspi${secext}_${PLATFORM_ADDITIONAL_TARGET}.pbl ${DEPLOYDIR}/atf/
+        cp -r ${S}/fip_${PLATFORM_ADDITIONAL_TARGET}.bin ${DEPLOYDIR}/atf/fip_uboot${secext}_${PLATFORM_ADDITIONAL_TARGET}.bin
+        if [ -f "${S}/fuse_fip_${PLATFORM_ADDITIONAL_TARGET}.bin" ]; then
+                cp -r ${S}/fuse_fip_${PLATFORM_ADDITIONAL_TARGET}.bin ${D}/boot/atf/fuse_fip_${PLATFORM_ADDITIONAL_TARGET}${secext}.bin
+        fi
+    fi
+    if [ -f "${S}/fip_ddr_sec.bin" ]; then
+        cp -r ${D}/boot/atf/fip_ddr_sec.bin ${DEPLOYDIR}/atf/fip_ddr_sec.bin
+    fi
+}
+addtask deploy after do_install
+FILES:${PN} += "/boot"
+BBCLASSEXTEND = "native nativesdk"

recipes-bsp/atf/qoriq-atf_1.5.bbappend

@@ -0,0 +1,6 @@
+FILESEXTRAPATHS:append:lx2160acex7 := "${THISDIR}/${PN}-lx2160acex7:"
+
+SRC_URI:append:lx2160acex7 = "\
+	file://0001-plat-nxp-Add-lx2160acex7-module-support.patch \
+	file://0002-plat-nxp-lx2160a-auto-boot.patch \
+"

recipes-bsp/barebox/barebox-2013.08.0/cfa10036/defconfig

@@ -1,44 +0,0 @@
-CONFIG_ARCH_MXS=y
-CONFIG_ARCH_IMX28=y
-CONFIG_MACH_CFA10036=y
-CONFIG_AEABI=y
-CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
-CONFIG_MMU=y
-CONFIG_TEXT_BASE=0x43000000
-CONFIG_MALLOC_SIZE=0x800000
-CONFIG_BROKEN=y
-CONFIG_LONGHELP=y
-CONFIG_HUSH_FANCY_PROMPT=y
-CONFIG_CMDLINE_EDITING=y
-CONFIG_AUTO_COMPLETE=y
-CONFIG_CONSOLE_ACTIVATE_ALL=y
-CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y
-CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/crystalfontz-cfa10036/env"
-CONFIG_DEBUG_INFO=y
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_SAVEENV=y
-CONFIG_CMD_EXPORT=y
-CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_READLINE=y
-CONFIG_CMD_MENU=y
-CONFIG_CMD_MENU_MANAGEMENT=y
-CONFIG_CMD_ECHO_E=y
-CONFIG_CMD_MTEST=y
-CONFIG_CMD_MTEST_ALTERNATIVE=y
-CONFIG_CMD_BOOTM_SHOW_TYPE=y
-CONFIG_CMD_BOOTM_OFTREE=y
-CONFIG_CMD_RESET=y
-CONFIG_CMD_GO=y
-CONFIG_CMD_OFTREE=y
-CONFIG_CMD_TIMEOUT=y
-CONFIG_CMD_PARTITION=y
-CONFIG_CMD_GPIO=y
-# CONFIG_SPI is not set
-CONFIG_I2C=y
-CONFIG_MCI=y
-CONFIG_MCI_STARTUP=y
-CONFIG_MCI_MXS=y
-CONFIG_FS_EXT4=y
-CONFIG_FS_FAT=y
-CONFIG_FS_FAT_LFN=y

recipes-bsp/barebox/barebox_2013.08.0.bbappend

@@ -1,3 +0,0 @@
-FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}-${PV}:"
-
-COMPATIBLE_MACHINE_cfa10036 = "cfa10036"

recipes-bsp/broadcom-nvram-config/bcm4329-nvram-config.bb

@@ -0,0 +1,8 @@
+DESCRIPTION = "Nvram support for Broadcom BCM4329 wifi/bt device"
+SECTION = "kernel"
+
+include broadcom-nvram-config.inc
+
+CHIP_MODEL = "4329"
+
+COMPATIBLE_MACHINE = "(wandboard|cubox-i)"

recipes-bsp/broadcom-nvram-config/bcm4330-nvram-config.bb

@@ -0,0 +1,8 @@
+DESCRIPTION = "Nvram support for Broadcom BCM4330 wifi/bt device"
+SECTION = "kernel"
+
+include broadcom-nvram-config.inc
+
+CHIP_MODEL = "4330"
+
+COMPATIBLE_MACHINE = "(cubox-i|nitrogen6x-lite|wandboard|imx6sl-warp)"

recipes-bsp/broadcom-nvram-config/bcm4339-nvram-config.bb

@@ -0,0 +1,8 @@
+DESCRIPTION = "Nvram support for Broadcom BCM4339 wifi/bt device"
+SECTION = "kernel"
+
+include broadcom-nvram-config.inc
+
+CHIP_MODEL = "4339"
+
+COMPATIBLE_MACHINE = "(imx7d-pico|imx6ul-pico|imx6qdl-pico)"

recipes-bsp/broadcom-nvram-config/bcm43430-nvram-config.bb

@@ -0,0 +1,8 @@
+DESCRIPTION = "Nvram support for Broadcom 43430 wifi/bt device"
+SECTION = "kernel"
+
+include broadcom-nvram-config.inc
+
+CHIP_MODEL = "43430"
+
+COMPATIBLE_MACHINE = "(imx7s-warp)"

recipes-bsp/broadcom-nvram-config/broadcom-nvram-config.bb

@@ -1,31 +0,0 @@
-DESCRIPTION = "Nvram support for Broadcom wifi chips"
-SECTION = "kernel"
-
-LICENSE = "Proprietary"
-LIC_FILES_CHKSUM = "file://LICENCE.broadcom_bcm43xx;md5=3160c14df7228891b868060e1951dfbc"
-
-SRC_URI = " \
-   file://nvram.txt \
-   file://LICENCE.broadcom_bcm43xx \
-"
-
-S="${WORKDIR}"
-
-do_install() {
-    install -d  ${D}/lib/firmware/brcm
-
-    cp -r ${WORKDIR}/nvram.txt \
-        ${D}/lib/firmware/brcm/brcmfmac-sdio.txt
-}
-
-FILES_${PN} = " \
-  /lib/firmware/brcm/brcmfmac-sdio.txt \
-"
-BROADCOM_FIRMWARE = "INVALID"
-BROADCOM_FIRMWARE_nitrogen6x-lite = "bcm4330"
-BROADCOM_FIRMWARE_wandboard-dual = "bcm4329"
-BROADCOM_FIRMWARE_wandboard-quad = "bcm4329"
-
-RDEPENDS_${PN} = "linux-firmware-${BROADCOM_FIRMWARE}"
-
-COMPATIBLE_MACHINE = "(nitrogen6x-lite|wandboard-dual|wandboard-quad)"

recipes-bsp/broadcom-nvram-config/broadcom-nvram-config.inc

@@ -0,0 +1,31 @@
+LICENSE = "Proprietary"
+LIC_FILES_CHKSUM = "file://LICENCE.broadcom_bcm43xx;md5=3160c14df7228891b868060e1951dfbc"
+
+SRC_URI = " \
+   file://LICENCE.broadcom_bcm43xx \
+"
+
+S = "${UNPACKDIR}"
+BRCM_FWDIR = "${nonarch_base_libdir}/firmware/brcm"
+CHIP_MODEL ?= "Invalid"
+
+do_install() {
+    install -d  ${D}${BRCM_FWDIR}
+
+    cp -r ${UNPACKDIR}/brcmfmac${CHIP_MODEL}-sdio.txt \
+        ${D}${BRCM_FWDIR}
+}
+
+SRC_URI += " \
+   file://brcmfmac${CHIP_MODEL}-sdio.txt \
+"
+
+FILES:${PN} = " \
+  ${BRCM_FWDIR}/brcmfmac${CHIP_MODEL}-sdio.txt \
+"
+
+RDEPENDS:${PN} = " \ 
+  linux-firmware-bcm${CHIP_MODEL} \
+"
+
+PACKAGE_ARCH = "${MACHINE_ARCH}"

recipes-bsp/broadcom-nvram-config/files/cubox-i/brcmfmac4329-sdio.txt

@@ -0,0 +1,70 @@
+# bcm4329 NVRAM
+# $Copyright (C) 2008 Broadcom Corporation$
+# $id$
+
+sromrev=3
+vendid=0x14e4
+devid=0x432f
+boardtype=0x53e
+
+boardrev=0x41
+
+#boardflags=0x1200
+boardflags=0x200
+
+# Specify the xtalfreq if it is otherthan 38.4MHz
+xtalfreq=37400
+
+aa2g=3
+aa5g=0
+
+ag0=255
+#tri2g=0x64
+
+# 11g paparams
+pa0b0=5542,5542,5542
+pa0b1=64244,64244,64244
+pa0b2=65202,65202,65202
+
+pa0itssit=62
+pa0maxpwr=74
+opo=0
+mcs2gpo0=0x6666
+mcs2gpo1=0x6666
+
+# 11g rssi params
+rssismf2g=0xa,0xa,0xa
+rssismc2g=0xb,0xb,0xb
+rssisav2g=0x3,0x3,0x3
+bxa2g=0
+
+# country code
+ccode=ALL
+cctl=0x0
+cckdigfilttype=0
+ofdmdigfilttype=1
+
+rxpo2g=0
+
+boardnum=1
+macaddr=00:90:4c:c5:00:34
+
+# xtal pu and pd time control variable
+# pu time is driver default (0x1501)
+#r13t=0x1501
+
+#######
+nocrc=1
+
+#for mfgc
+otpimagesize=182
+
+# sdio extra configs
+hwhdr=0x05ffff031030031003100000
+
+#This generates empty F1, F2 and F3 tuple chains, and may be used if the host SDIO stack does not require the standard tuples.
+#RAW1=80 02 fe ff
+
+#This includes the standard FUNCID and FUNCE tuples in the F1, F2, F3 and common CIS.
+RAW1=80 32 fe 21 02 0c 00 22 2a 01 01 00 00 c5 0 e6 00 00 00 00 00 40 00 00 ff ff 80 00 00 00 00 00 00 00 00 00 00 c8 00 00 00 00 00 00 00 00 00 00 00 00 00 ff 20 04 D0 2 29 43 21 02 0c 00 22 04 00 20 00 5A
+nvramver=4.218.214.0

recipes-bsp/broadcom-nvram-config/files/cubox-i/brcmfmac4330-sdio.txt

@@ -0,0 +1,118 @@
+manfid=0x2d0
+prodid=0x0532
+vendid=0x14e4
+devid=0x4360
+boardtype=0x0532
+boardrev=0x20
+boardflags=0x10080201
+
+nocrc=1
+xtalfreq=37400
+xtalmode=0x20,0x4,0
+boardnum=22
+macaddr=00:90:4c:c5:12:38
+ag0=252
+ag1=252
+aa2g=1
+aa5g=1
+ccode=EU
+regrev=5
+
+#for BT-coexistence
+btc_params80=0
+btc_params6=10
+btc_params8=10000
+
+sd_gpout=0
+# sd_oobonly=1
+muxenab=0x10
+
+# 2G PA param_B42R 110927
+pa0b0=0x12E4
+pa0b1=0xFE09
+pa0b2=0xFF9A
+#pa0itssit=62
+rssismf2g=0xa
+rssismc2g=0x3
+rssisav2g=0x7
+
+# rssi params for 5GHz B42R_110803
+#rssismf5g=0x4
+rssismf5g=0xa
+rssismc5g=0x7
+rssisav5g=0x1
+#PA parameters for lower band
+pa1lob0=0x144F
+pa1lob1=0xFD6B
+pa1lob2=0xFF3B
+#PA parameters for midband
+pa1b0=0x139C
+pa1b1=0xFD87
+pa1b2=0xFF4F
+#PA parameters for high band
+pa1hib0=0x12CA
+pa1hib1=0xFD9A
+pa1hib2=0xFF4E
+
+# 2G PA offset
+maxp2ga0=64
+sromrev=3
+cckpo=0
+ofdm2gpo=0x66666666
+mcs2gpo0=0xaaaa
+mcs2gpo1=0xaaaa
+
+# 5G PA offset
+maxp5ga0=66
+maxp5gla0=66
+maxp5gha0=66
+ofdm5gpo=0x22222222
+ofdm5glpo=0x11111111
+ofdm5ghpo=0x22222222
+mcs5gpo0=0x6666
+mcs5gpo1=0x6666
+mcs5glpo0=0x5555
+mcs5glpo1=0x5555
+mcs5ghpo0=0x6666
+mcs5ghpo1=0x6666
+
+cckPwrOffset=4
+cckdigfilttype=22
+ofdmdigfilttype=2
+extpagain5g=2
+#wl0id=0x431b
+
+# For 2GHz Tx EVM/SM
+rfreg033=0x19
+rfreg033_cck=0x1d
+pacalidx2g=65
+dacrate2g=160
+txalpfbyp2g=1
+bphyscale=17
+
+# 5GHz LOFT and IQ CAL
+txgaintbl5g=1
+txiqlopapu5g=1
+txiqlopag5g=0x10
+iqlocalidx5g=24
+
+# 5GHz Noise CAL parameter
+noise_cal_po_5g=5
+noise_cal_enable_5g=0
+
+# 2GHz RxPER at low rates
+noise_cal_ref_2g=56
+noise_cal_po_bias_2g=-4
+noise_cal_enable_2g=1
+
+# Max input level on a-band
+triso5g=9
+
+# Tx power control, especially temp.
+tssitime=1
+
+#fc+1.7GHz Spur Elimination
+loidacmode5g=1
+
+swctrlmap_2g=0x84048404, 0x82028202, 0x84048404, 0x010202, 0x1ff
+swctrlmap_5g=0xC040C040, 0xB030A020, 0xA020C040, 0x010A02, 0x2F8

recipes-bsp/broadcom-nvram-config/files/imx6qdl-pico/brcmfmac4339-sdio.txt

@@ -0,0 +1,99 @@
+#AP6335_NVRAM_V1.5_03112014
+NVRAMRev=$Rev: 410316 $
+sromrev=11
+boardrev=0x1203
+boardtype=0x06c5
+boardflags=0x00000c01
+boardflags2=0x00002000
+boardflags3=0x101188
+macaddr=00:90:4c:c5:12:38
+ccode=0
+regrev=0
+antswitch=0
+pdgain2g=7
+pdgain5g=7
+tworangetssi2g=0
+tworangetssi5g=0
+femctrl=7
+pcieingress_war=15
+vendid=0x14e4
+devid=0x43ae
+manfid=0x2d0
+nocrc=1
+otpimagesize=502
+xtalfreq=37400
+extpagain2g=2
+pdetrange2g=2
+extpagain5g=2
+pdetrange5g=2
+rxgains2gelnagaina0=0
+rxgains2gtrisoa0=7
+rxgains2gtrelnabypa0=0
+rxgains5gelnagaina0=0
+rxgains5gtrisoa0=11
+rxgains5gtrelnabypa0=0
+rxchain=1
+txchain=1
+aa2g=1
+aa5g=1
+tssipos5g=0
+tssipos2g=0
+pa2ga0=-161,6269,-723
+pa2gccka0=-116,7568,-852
+pa5ga0=0xFF61,0x163C,0xFD55,0xFF5D,0x1671,0xFD4F,0xFF5F,0x16CA,0xFD45,0xFF60,0x1676,0xFD4D
+pa5gbw40a0=0xFF61,0x163C,0xFD55,0xFF5D,0x1671,0xFD4F,0xFF5F,0x16CA,0xFD45,0xFF60,0x1676,0xFD4D
+pa5gbw80a0=0xFF61,0x163C,0xFD55,0xFF5D,0x1671,0xFD4F,0xFF5F,0x16CA,0xFD45,0xFF60,0x1676,0xFD4D
+pdoffset40ma0=0
+pdoffset80ma0=0
+pdoffsetcckma0=0
+maxp2ga0=75
+maxp5ga0=64,64,72,72
+cckbw202gpo=0x0000
+cckbw20ul2gpo=0x0
+mcsbw202gpo=0x99445533
+mcsbw402gpo=0x99775533
+dot11agofdmhrbw202gpo=0x2233
+ofdmlrbw202gpo=0x0000
+tssifloor2g=500
+mcsbw205glpo=0x66333330
+mcsbw405glpo=0x66665530
+mcsbw805glpo=0xAA555530
+mcsbw1605glpo=0x99555530
+mcsbw205gmpo=0x99BB5530
+mcsbw405gmpo=0x99BB5530
+mcsbw805gmpo=0xEE555530
+mcsbw1605gmpo=0x99555530
+mcsbw205ghpo=0x99995530
+mcsbw405ghpo=0x99BB5530
+mcsbw805ghpo=0xEE555530
+mcsbw1605ghpo=0x99555530
+mcslr5glpo=0x0000
+mcslr5gmpo=0x0000
+mcslr5ghpo=0x0000
+sb20in40hrrpo=0x0
+sb20in80and160hr5glpo=0x0
+sb40and80hr5glpo=0x0
+sb20in80and160hr5gmpo=0x0
+sb40and80hr5gmpo=0x0
+sb20in80and160hr5ghpo=0x0
+sb40and80hr5ghpo=0x0
+sb20in40lrpo=0x0
+sb20in80and160lr5glpo=0x0
+sb40and80lr5glpo=0x0
+sb20in80and160lr5gmpo=0x0
+sb40and80lr5gmpo=0x0
+sb20in80and160lr5ghpo=0x0
+sb40and80lr5ghpo=0x0
+dot11agduphrpo=0x0
+dot11agduplrpo=0x0
+phycal_tempdelta=25
+cckdigfilttype=2
+pacalidx2g=65
+dacrate2g=160
+swctrlmap_5g=0x00000008,0x00000010,0x00000008,0x000000,0x038
+swctrlmap_2g=0x00000001,0x00000002,0x00000001,0x040002,0x0ff
+swctrlmapext_5g=0x00000000,0x00000000,0x00000000,0x000000,0x000
+swctrlmapext_2g=0x00000000,0x00000000,0x00000000,0x000000,0x000
+rssicorrnorm_c0=3,3
+rssicorrnorm5g_c0=2,3,4,2,3,3,0,1,2,0,1,2
+muxenab=0x10

recipes-bsp/broadcom-nvram-config/files/imx6sl-warp/brcmfmac4330-sdio.txt

@@ -0,0 +1,118 @@
+manfid=0x2d0
+prodid=0x0532
+vendid=0x14e4
+devid=0x4360
+boardtype=0x0532
+boardrev=0x20
+boardflags=0x10080201
+
+nocrc=1
+xtalfreq=37400
+xtalmode=0x20,0x4,0
+boardnum=22
+macaddr=00:90:4c:c5:12:38
+ag0=252
+ag1=252
+aa2g=1
+aa5g=1
+ccode=EU
+regrev=5
+
+#for BT-coexistence
+btc_params80=0
+btc_params6=10
+btc_params8=10000
+
+sd_gpout=0
+# sd_oobonly=1
+muxenab=0x10
+
+# 2G PA param_B42R 110927
+pa0b0=0x12E4
+pa0b1=0xFE09
+pa0b2=0xFF9A
+#pa0itssit=62
+rssismf2g=0xa
+rssismc2g=0x3
+rssisav2g=0x7
+
+# rssi params for 5GHz B42R_110803
+#rssismf5g=0x4
+rssismf5g=0xa
+rssismc5g=0x7
+rssisav5g=0x1
+#PA parameters for lower band
+pa1lob0=0x144F
+pa1lob1=0xFD6B
+pa1lob2=0xFF3B
+#PA parameters for midband
+pa1b0=0x139C
+pa1b1=0xFD87
+pa1b2=0xFF4F
+#PA parameters for high band
+pa1hib0=0x12CA
+pa1hib1=0xFD9A
+pa1hib2=0xFF4E
+
+# 2G PA offset
+maxp2ga0=64
+sromrev=3
+cckpo=0
+ofdm2gpo=0x66666666
+mcs2gpo0=0xaaaa
+mcs2gpo1=0xaaaa
+
+# 5G PA offset
+maxp5ga0=66
+maxp5gla0=66
+maxp5gha0=66
+ofdm5gpo=0x22222222
+ofdm5glpo=0x11111111
+ofdm5ghpo=0x22222222
+mcs5gpo0=0x6666
+mcs5gpo1=0x6666
+mcs5glpo0=0x5555
+mcs5glpo1=0x5555
+mcs5ghpo0=0x6666
+mcs5ghpo1=0x6666
+
+cckPwrOffset=4
+cckdigfilttype=22
+ofdmdigfilttype=2
+extpagain5g=2
+#wl0id=0x431b
+
+# For 2GHz Tx EVM/SM
+rfreg033=0x19
+rfreg033_cck=0x1d
+pacalidx2g=65
+dacrate2g=160
+txalpfbyp2g=1
+bphyscale=17
+
+# 5GHz LOFT and IQ CAL
+txgaintbl5g=1
+txiqlopapu5g=1
+txiqlopag5g=0x10
+iqlocalidx5g=24
+
+# 5GHz Noise CAL parameter
+noise_cal_po_5g=5
+noise_cal_enable_5g=0
+
+# 2GHz RxPER at low rates
+noise_cal_ref_2g=56
+noise_cal_po_bias_2g=-4
+noise_cal_enable_2g=1
+
+# Max input level on a-band
+triso5g=9
+
+# Tx power control, especially temp.
+tssitime=1
+
+#fc+1.7GHz Spur Elimination
+loidacmode5g=1
+
+swctrlmap_2g=0x84048404, 0x82028202, 0x84048404, 0x010202, 0x1ff
+swctrlmap_5g=0xC040C040, 0xB030A020, 0xA020C040, 0x010A02, 0x2F8

recipes-bsp/broadcom-nvram-config/files/imx6ul-pico/brcmfmac4339-sdio.txt

@@ -0,0 +1,99 @@
+#AP6335_NVRAM_V1.5_03112014
+NVRAMRev=$Rev: 410316 $
+sromrev=11
+boardrev=0x1203
+boardtype=0x06c5
+boardflags=0x00000c01
+boardflags2=0x00002000
+boardflags3=0x101188
+macaddr=00:90:4c:c5:12:38
+ccode=0
+regrev=0
+antswitch=0
+pdgain2g=7
+pdgain5g=7
+tworangetssi2g=0
+tworangetssi5g=0
+femctrl=7
+pcieingress_war=15
+vendid=0x14e4
+devid=0x43ae
+manfid=0x2d0
+nocrc=1
+otpimagesize=502
+xtalfreq=37400
+extpagain2g=2
+pdetrange2g=2
+extpagain5g=2
+pdetrange5g=2
+rxgains2gelnagaina0=0
+rxgains2gtrisoa0=7
+rxgains2gtrelnabypa0=0
+rxgains5gelnagaina0=0
+rxgains5gtrisoa0=11
+rxgains5gtrelnabypa0=0
+rxchain=1
+txchain=1
+aa2g=1
+aa5g=1
+tssipos5g=0
+tssipos2g=0
+pa2ga0=-161,6269,-723
+pa2gccka0=-116,7568,-852
+pa5ga0=0xFF61,0x163C,0xFD55,0xFF5D,0x1671,0xFD4F,0xFF5F,0x16CA,0xFD45,0xFF60,0x1676,0xFD4D
+pa5gbw40a0=0xFF61,0x163C,0xFD55,0xFF5D,0x1671,0xFD4F,0xFF5F,0x16CA,0xFD45,0xFF60,0x1676,0xFD4D
+pa5gbw80a0=0xFF61,0x163C,0xFD55,0xFF5D,0x1671,0xFD4F,0xFF5F,0x16CA,0xFD45,0xFF60,0x1676,0xFD4D
+pdoffset40ma0=0
+pdoffset80ma0=0
+pdoffsetcckma0=0
+maxp2ga0=75
+maxp5ga0=64,64,72,72
+cckbw202gpo=0x0000
+cckbw20ul2gpo=0x0
+mcsbw202gpo=0x99445533
+mcsbw402gpo=0x99775533
+dot11agofdmhrbw202gpo=0x2233
+ofdmlrbw202gpo=0x0000
+tssifloor2g=500
+mcsbw205glpo=0x66333330
+mcsbw405glpo=0x66665530
+mcsbw805glpo=0xAA555530
+mcsbw1605glpo=0x99555530
+mcsbw205gmpo=0x99BB5530
+mcsbw405gmpo=0x99BB5530
+mcsbw805gmpo=0xEE555530
+mcsbw1605gmpo=0x99555530
+mcsbw205ghpo=0x99995530
+mcsbw405ghpo=0x99BB5530
+mcsbw805ghpo=0xEE555530
+mcsbw1605ghpo=0x99555530
+mcslr5glpo=0x0000
+mcslr5gmpo=0x0000
+mcslr5ghpo=0x0000
+sb20in40hrrpo=0x0
+sb20in80and160hr5glpo=0x0
+sb40and80hr5glpo=0x0
+sb20in80and160hr5gmpo=0x0
+sb40and80hr5gmpo=0x0
+sb20in80and160hr5ghpo=0x0
+sb40and80hr5ghpo=0x0
+sb20in40lrpo=0x0
+sb20in80and160lr5glpo=0x0
+sb40and80lr5glpo=0x0
+sb20in80and160lr5gmpo=0x0
+sb40and80lr5gmpo=0x0
+sb20in80and160lr5ghpo=0x0
+sb40and80lr5ghpo=0x0
+dot11agduphrpo=0x0
+dot11agduplrpo=0x0
+phycal_tempdelta=25
+cckdigfilttype=2
+pacalidx2g=65
+dacrate2g=160
+swctrlmap_5g=0x00000008,0x00000010,0x00000008,0x000000,0x038
+swctrlmap_2g=0x00000001,0x00000002,0x00000001,0x040002,0x0ff
+swctrlmapext_5g=0x00000000,0x00000000,0x00000000,0x000000,0x000
+swctrlmapext_2g=0x00000000,0x00000000,0x00000000,0x000000,0x000
+rssicorrnorm_c0=3,3
+rssicorrnorm5g_c0=2,3,4,2,3,3,0,1,2,0,1,2
+muxenab=0x10

recipes-bsp/broadcom-nvram-config/files/imx7d-pico/brcmfmac4339-sdio.txt

@@ -0,0 +1,99 @@
+#AP6335_NVRAM_V1.5_03112014
+NVRAMRev=$Rev: 410316 $
+sromrev=11
+boardrev=0x1203
+boardtype=0x06c5
+boardflags=0x00000c01
+boardflags2=0x00002000
+boardflags3=0x101188
+macaddr=00:90:4c:c5:12:38
+ccode=0
+regrev=0
+antswitch=0
+pdgain2g=7
+pdgain5g=7
+tworangetssi2g=0
+tworangetssi5g=0
+femctrl=7
+pcieingress_war=15
+vendid=0x14e4
+devid=0x43ae
+manfid=0x2d0
+nocrc=1
+otpimagesize=502
+xtalfreq=37400
+extpagain2g=2
+pdetrange2g=2
+extpagain5g=2
+pdetrange5g=2
+rxgains2gelnagaina0=0
+rxgains2gtrisoa0=7
+rxgains2gtrelnabypa0=0
+rxgains5gelnagaina0=0
+rxgains5gtrisoa0=11
+rxgains5gtrelnabypa0=0
+rxchain=1
+txchain=1
+aa2g=1
+aa5g=1
+tssipos5g=0
+tssipos2g=0
+pa2ga0=-161,6269,-723
+pa2gccka0=-116,7568,-852
+pa5ga0=0xFF61,0x163C,0xFD55,0xFF5D,0x1671,0xFD4F,0xFF5F,0x16CA,0xFD45,0xFF60,0x1676,0xFD4D
+pa5gbw40a0=0xFF61,0x163C,0xFD55,0xFF5D,0x1671,0xFD4F,0xFF5F,0x16CA,0xFD45,0xFF60,0x1676,0xFD4D
+pa5gbw80a0=0xFF61,0x163C,0xFD55,0xFF5D,0x1671,0xFD4F,0xFF5F,0x16CA,0xFD45,0xFF60,0x1676,0xFD4D
+pdoffset40ma0=0
+pdoffset80ma0=0
+pdoffsetcckma0=0
+maxp2ga0=75
+maxp5ga0=64,64,72,72
+cckbw202gpo=0x0000
+cckbw20ul2gpo=0x0
+mcsbw202gpo=0x99445533
+mcsbw402gpo=0x99775533
+dot11agofdmhrbw202gpo=0x2233
+ofdmlrbw202gpo=0x0000
+tssifloor2g=500
+mcsbw205glpo=0x66333330
+mcsbw405glpo=0x66665530
+mcsbw805glpo=0xAA555530
+mcsbw1605glpo=0x99555530
+mcsbw205gmpo=0x99BB5530
+mcsbw405gmpo=0x99BB5530
+mcsbw805gmpo=0xEE555530
+mcsbw1605gmpo=0x99555530
+mcsbw205ghpo=0x99995530
+mcsbw405ghpo=0x99BB5530
+mcsbw805ghpo=0xEE555530
+mcsbw1605ghpo=0x99555530
+mcslr5glpo=0x0000
+mcslr5gmpo=0x0000
+mcslr5ghpo=0x0000
+sb20in40hrrpo=0x0
+sb20in80and160hr5glpo=0x0
+sb40and80hr5glpo=0x0
+sb20in80and160hr5gmpo=0x0
+sb40and80hr5gmpo=0x0
+sb20in80and160hr5ghpo=0x0
+sb40and80hr5ghpo=0x0
+sb20in40lrpo=0x0
+sb20in80and160lr5glpo=0x0
+sb40and80lr5glpo=0x0
+sb20in80and160lr5gmpo=0x0
+sb40and80lr5gmpo=0x0
+sb20in80and160lr5ghpo=0x0
+sb40and80lr5ghpo=0x0
+dot11agduphrpo=0x0
+dot11agduplrpo=0x0
+phycal_tempdelta=25
+cckdigfilttype=2
+pacalidx2g=65
+dacrate2g=160
+swctrlmap_5g=0x00000008,0x00000010,0x00000008,0x000000,0x038
+swctrlmap_2g=0x00000001,0x00000002,0x00000001,0x040002,0x0ff
+swctrlmapext_5g=0x00000000,0x00000000,0x00000000,0x000000,0x000
+swctrlmapext_2g=0x00000000,0x00000000,0x00000000,0x000000,0x000
+rssicorrnorm_c0=3,3
+rssicorrnorm5g_c0=2,3,4,2,3,3,0,1,2,0,1,2
+muxenab=0x10

recipes-bsp/broadcom-nvram-config/files/imx7s-warp/brcmfmac43430-sdio.txt

@@ -0,0 +1,42 @@
+# 2.4 GHz, 20 MHz BW mode
+manfid=0x2d0
+prodid=0x0726
+vendid=0x14e4
+devid=0x43e2
+boardtype=0x0726
+boardrev=0x1202
+boardnum=22
+macaddr=00:90:4c:c5:12:38
+sromrev=11
+boardflags=0x00404201
+boardflags3=0x08000000
+xtalfreq=37400
+nocrc=1
+ag0=0
+aa2g=1
+ccode=ALL
+#pa0itssit=0x20
+extpagain2g=0
+pa2ga0=-168,7161,-820
+AvVmid_c0=0x0,0xc8
+cckpwroffset0=5
+maxp2ga0=90
+#txpwrbckof=6
+cckbw202gpo=0
+legofdmbw202gpo=0x66111111
+mcsbw202gpo=0x77711111
+propbw202gpo=0xdd
+ofdmdigfilttype=18
+ofdmdigfilttypebe=18
+papdmode=1
+papdvalidtest=1
+pacalidx2g=48
+papdepsoffset=-22
+papdendidx=58
+il0macaddr=00:90:4c:c5:12:38
+wl0id=0x431b
+#muxenab=0x10
+#BT COEX deferral limit setting
+#btc_params 8 45000
+#btc_params 10 20000
+#spurconfig=0x3

recipes-bsp/broadcom-nvram-config/files/nitrogen6x-lite/brcmfmac4330-sdio.txt

@@ -77,4 +77,3 @@ noise_cal_ref_2g=53
 noise_cal_po_2g=0
 noise_cal_ref_5g=52
 noise_cal_po_5g=5,0,0
-

recipes-bsp/broadcom-nvram-config/files/wandboard/brcmfmac4330-sdio.txt

@@ -0,0 +1,118 @@
+manfid=0x2d0
+prodid=0x0532
+vendid=0x14e4
+devid=0x4360
+boardtype=0x0532
+boardrev=0x20
+boardflags=0x10080201
+
+nocrc=1
+xtalfreq=37400
+xtalmode=0x20,0x4,0
+boardnum=22
+macaddr=00:90:4c:c5:12:38
+ag0=252
+ag1=252
+aa2g=1
+aa5g=1
+ccode=EU
+regrev=5
+
+#for BT-coexistence
+btc_params80=0
+btc_params6=10
+btc_params8=10000
+
+sd_gpout=0
+# sd_oobonly=1
+muxenab=0x10
+
+# 2G PA param_B42R 110927
+pa0b0=0x12E4
+pa0b1=0xFE09
+pa0b2=0xFF9A
+#pa0itssit=62
+rssismf2g=0xa
+rssismc2g=0x3
+rssisav2g=0x7
+
+# rssi params for 5GHz B42R_110803
+#rssismf5g=0x4
+rssismf5g=0xa
+rssismc5g=0x7
+rssisav5g=0x1
+#PA parameters for lower band
+pa1lob0=0x144F
+pa1lob1=0xFD6B
+pa1lob2=0xFF3B
+#PA parameters for midband
+pa1b0=0x139C
+pa1b1=0xFD87
+pa1b2=0xFF4F
+#PA parameters for high band
+pa1hib0=0x12CA
+pa1hib1=0xFD9A
+pa1hib2=0xFF4E
+
+# 2G PA offset
+maxp2ga0=64
+sromrev=3
+cckpo=0
+ofdm2gpo=0x66666666
+mcs2gpo0=0xaaaa
+mcs2gpo1=0xaaaa
+
+# 5G PA offset
+maxp5ga0=66
+maxp5gla0=66
+maxp5gha0=66
+ofdm5gpo=0x22222222
+ofdm5glpo=0x11111111
+ofdm5ghpo=0x22222222
+mcs5gpo0=0x6666
+mcs5gpo1=0x6666
+mcs5glpo0=0x5555
+mcs5glpo1=0x5555
+mcs5ghpo0=0x6666
+mcs5ghpo1=0x6666
+
+cckPwrOffset=4
+cckdigfilttype=22
+ofdmdigfilttype=2
+extpagain5g=2
+#wl0id=0x431b
+
+# For 2GHz Tx EVM/SM
+rfreg033=0x19
+rfreg033_cck=0x1d
+pacalidx2g=65
+dacrate2g=160
+txalpfbyp2g=1
+bphyscale=17
+
+# 5GHz LOFT and IQ CAL
+txgaintbl5g=1
+txiqlopapu5g=1
+txiqlopag5g=0x10
+iqlocalidx5g=24
+
+# 5GHz Noise CAL parameter
+noise_cal_po_5g=5
+noise_cal_enable_5g=0
+
+# 2GHz RxPER at low rates
+noise_cal_ref_2g=56
+noise_cal_po_bias_2g=-4
+noise_cal_enable_2g=1
+
+# Max input level on a-band
+triso5g=9
+
+# Tx power control, especially temp.
+tssitime=1
+
+#fc+1.7GHz Spur Elimination
+loidacmode5g=1
+
+swctrlmap_2g=0x84048404, 0x82028202, 0x84048404, 0x010202, 0x1ff
+swctrlmap_5g=0xC040C040, 0xB030A020, 0xA020C040, 0x010A02, 0x2F8

recipes-bsp/formfactor/formfactor_0.0.bbappend

@@ -1 +1 @@
-FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}:"
+FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:"

recipes-bsp/imx-atf/imx-atf-boundary_2.8.bb

@@ -0,0 +1,63 @@
+# Copyright (C) 2017-2023 NXP
+
+DESCRIPTION = "i.MX ARM Trusted Firmware"
+SECTION = "BSP"
+LICENSE = "BSD-3-Clause"
+LIC_FILES_CHKSUM = "file://${COREBASE}/meta/files/common-licenses/BSD-3-Clause;md5=550794465ba0ec5312d6919e203a55f9"
+
+PROVIDES = "imx-atf"
+
+PV .= "+git${SRCPV}"
+
+SRCBRANCH = "boundary-lf-6.1.22-2.0.0"
+SRC_URI = "git://github.com/boundarydevices/imx-atf.git;branch=${SRCBRANCH};protocol=https \
+"
+SRCREV = "7e3484cc10bfc9a53c1e64867b3fb99761f7c375"
+
+S = "${WORKDIR}/git"
+
+inherit deploy
+
+BOOT_TOOLS = "imx-boot-tools"
+
+ATF_PLATFORM        ?= "INVALID"
+ATF_PLATFORM:mx8mq-nxp-bsp   = "imx8mq"
+ATF_PLATFORM:mx8mm-nxp-bsp   = "imx8mm"
+ATF_PLATFORM:mx8mn-nxp-bsp   = "imx8mn"
+ATF_PLATFORM:mx8mp-nxp-bsp   = "imx8mp"
+
+EXTRA_OEMAKE += " \
+    CROSS_COMPILE="${TARGET_PREFIX}" \
+    PLAT=${ATF_PLATFORM} \
+"
+
+# Let the Makefile handle setting up the CFLAGS and LDFLAGS as it is a standalone application
+CFLAGS[unexport] = "1"
+LDFLAGS[unexport] = "1"
+AS[unexport] = "1"
+LD[unexport] = "1"
+
+BUILD_OPTEE = "${@bb.utils.contains('MACHINE_FEATURES', 'optee', 'true', 'false', d)}"
+
+do_compile() {
+    # Clear LDFLAGS to avoid the option -Wl recognize issue
+    unset LDFLAGS
+    oe_runmake bl31
+    if ${BUILD_OPTEE}; then
+       oe_runmake clean BUILD_BASE=build-optee
+       oe_runmake BUILD_BASE=build-optee SPD=opteed bl31
+    fi
+}
+
+do_install[noexec] = "1"
+
+do_deploy() {
+    install -Dm 0644 ${S}/build/${ATF_PLATFORM}/release/bl31.bin ${DEPLOYDIR}/bl31-${ATF_PLATFORM}.bin
+    if ${BUILD_OPTEE}; then
+       install -m 0644 ${S}/build-optee/${ATF_PLATFORM}/release/bl31.bin ${DEPLOYDIR}/bl31-${ATF_PLATFORM}.bin-optee
+    fi
+}
+addtask deploy after do_compile
+
+PACKAGE_ARCH = "${MACHINE_SOCARCH}"
+COMPATIBLE_MACHINE = "(nitrogen8m|nitrogen8mm|nitrogen8mn|nitrogen8mp)"

recipes-bsp/imx-bootlets/imx-bootlets/cfa10036-support.patch

@@ -1,271 +0,0 @@
-Add cfa10036 support
-
-Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
-
-diff --git a/Makefile b/Makefile
-index 367738c..a9c5d21 100644
---- a/Makefile
-+++ b/Makefile
-@@ -16,6 +16,9 @@ endif
- ifeq ($(BOARD), iMX28_EVK)
- ARCH = mx28
- endif
-+ifeq ($(BOARD), cfa10036)
-+ARCH = mx28
-+endif
- 
- all: build_prep gen_bootstream
- 
-diff --git a/boot_prep/Makefile b/boot_prep/Makefile
-index 0267ede..86570fc 100644
---- a/boot_prep/Makefile
-+++ b/boot_prep/Makefile
-@@ -23,6 +23,30 @@ MEM_TYPE ?= MEM_DDR1
- CFLAGS 	= -g -Wall -I$(INCLUDEDIR) -I$(INCLUDEDIR)/mach -I./ -O -D$(MEM_TYPE)
- LDFLAGS = -static -nostdlib -T $(BOOT_LAYOUT)
- 
-+# The board defines STMP CPU family and peripherial components
-+# So, set ARCH and HW_OBJS variables for each supported board
-+# separately.
-+ifeq ($(BOARD), stmp37xx_dev)
-+ARCH = 37xx
-+HW_OBJS = $(LRADC_OBJS)
-+CFLAGS += -DSTMP37XX -DBOARD_STMP37XX_DEV
-+endif
-+ifeq ($(BOARD), stmp378x_dev)
-+ARCH = mx23
-+HW_OBJS = $(LRADC_OBJS)
-+CFLAGS += -DSTMP378X -DBOARD_STMP378X_DEV
-+endif
-+ifeq ($(BOARD), iMX28_EVK)
-+ARCH = mx28
-+HW_OBJS = $(LRADC_OBJS)
-+CFLAGS += -DMX28 -DBOARD_MX28_EVK
-+endif
-+ifeq ($(BOARD), cfa10036)
-+ARCH = mx28
-+HW_OBJS = $(LRADC_OBJS)
-+CFLAGS += -DMX28 -DBOARD_CFA10036
-+endif
-+
- # Generic code
- CORE_OBJS = init-$(ARCH).o debug.o
- 
-diff --git a/boot_prep/init-mx28.c b/boot_prep/init-mx28.c
-index a1e4752..480a1c2 100644
---- a/boot_prep/init-mx28.c
-+++ b/boot_prep/init-mx28.c
-@@ -752,17 +752,17 @@ void DDR2EmiController_EDE1116_200MHz(void)
- 	DRAM_REG[24] = 0x00000000;
- 	DRAM_REG[25] = 0x00000000;
- 	DRAM_REG[26] = 0x00010101;
--	DRAM_REG[27] = 0x01010101;
-+	DRAM_REG[27] = 0x01010101; // 0000000 1 0000000 1 0000000 1 0000000 1
- 	DRAM_REG[28] = 0x000f0f01;
--	DRAM_REG[29] = 0x0f02020a;
-+	DRAM_REG[29] = 0x0f02010a; // 0000 1111 00000 010 00000 001 0000 1010
- 	DRAM_REG[30] = 0x00000000;
--	DRAM_REG[31] = 0x00010101;
--	DRAM_REG[32] = 0x00000100;
-+	DRAM_REG[31] = 0x00010101; // 000000000000000 1(8 banks) 0000000 1 0000000 1
-+	DRAM_REG[32] = 0x00000100; // 0000000000000000 0000000 1(REDUC) 0000000 0(REG_DIMM_ENABLE)
- 	DRAM_REG[33] = 0x00000100;
- 	DRAM_REG[34] = 0x00000000;
--	DRAM_REG[35] = 0x00000002;
-+	DRAM_REG[35] = 0x00000002; // 000000000000000 0 0000000 0 0000 0010
- 	DRAM_REG[36] = 0x01010000;
--	DRAM_REG[37] = 0x07080403;
-+	DRAM_REG[37] = 0x07080503; // 0000 0111 0000 1000 00000 101(CAS5) 0000 0011
- 	DRAM_REG[38] = 0x06005003;
- 	DRAM_REG[39] = 0x0a0000c8;
- 	DRAM_REG[40] = 0x02009c40;
-@@ -1300,12 +1300,54 @@ void poweron_vdda()
- 	HW_POWER_VDDACTRL_WR( BF_POWER_VDDACTRL_TRG(0xC) | BF_POWER_VDDACTRL_BO_OFFSET(7)
- 							| BF_POWER_VDDACTRL_LINREG_OFFSET(2) );
- }
-+
-+/*
-+ * Check memory range for valid RAM. A simple memory test determines
-+ * the actually available RAM size between addresses `base' and
-+ * `base + maxsize'.
-+ * Copied and pasted from barebox common/memsize.c file
-+ */
-+long get_ram_size(long *base, long maxsize)
-+{
-+	volatile long *addr;
-+	long           cnt;
-+	long           val;
-+	long           size;
-+	int            i = 0;
-+
-+	for (cnt = (maxsize / sizeof (long)) >> 1; cnt > 0; cnt >>= 1) {
-+		addr = base + cnt;	/* pointer arith! */
-+		*addr = ~cnt;
-+	}
-+
-+	addr = base;
-+	*addr = 0;
-+
-+	for (cnt = 1; cnt < maxsize / sizeof (long); cnt <<= 1) {
-+		addr = base + cnt;	/* pointer arith! */
-+		val = *addr;
-+		if (val != ~cnt) {
-+			size = cnt * sizeof (long);
-+			return (size);
-+		}
-+	}
-+
-+	return (maxsize);
-+}
-+
- int _start(int arg)
- {
- 	unsigned int value;
--	volatile int *pTest = 0x40000000;
--	int i;
--
-+	int memsize;
-+
-+#ifdef BOARD_CFA10036
-+	/* Remove all the previous DUART muxing */
-+	HW_PINCTRL_MUXSEL6_CLR((3 << 4) | (3 << 6));
-+	HW_PINCTRL_MUXSEL7_CLR((3 << 0) | (3 << 2));
-+	HW_PINCTRL_MUXSEL7_CLR((3 << 16) | (3 << 18));
-+	/* Mux only the DUART to pins actually used for this function */
-+	HW_PINCTRL_MUXSEL6_SET((2 << 4) | (2 << 6));
-+#else
- 	//boot rom wrong use debug uart port.
- 	//If fuse burned, the below two line can be removed.
- 	HW_PINCTRL_MUXSEL7_CLR(0xF);
-@@ -1315,6 +1357,7 @@ int _start(int arg)
- 	 * which cause uboot can't input
- 	*/
- 	HW_PINCTRL_MUXSEL7_SET(0x30000);
-+#endif
- 
- #ifdef MEM_MDDR
- 	/* set to mddr mode*/
-@@ -1374,28 +1417,8 @@ int _start(int arg)
- 
- 	change_cpu_freq();
- 
--#if 0
--	for (i = 0; i <= 40; i++) {
--		printf("mem %x - 0x%x\r\n",
--			i, *(volatile int*)(0x800E0000 + i * 4));
--	}
--#endif
--
--	/*Test Memory;*/
--	printf("start test memory accress\r\n");
--	printf("ddr2 0x%x\r\n", pTest);
--	for (i = 0; i < 1000; i++)
--		*pTest++ = i;
--
--	pTest = (volatile int *)0x40000000;
--
--	for (i = 0; i < 1000; i++) {
--		if (*pTest != (i)) {
--			printf("0x%x error value 0x%x\r\n", i, *pTest);
--		}
--		pTest++;
--	}
--	printf("finish simple test\r\n");
-+	memsize = get_ram_size((long *)0x40000000, 0x10000000);
-+	printf("finish simple test memory size = 0x%xMB\r\n", memsize >> 20);
- 	return 0;
- }
- 
-diff --git a/linux_prep/Makefile b/linux_prep/Makefile
-index 19b02a9..b33e4c1 100644
---- a/linux_prep/Makefile
-+++ b/linux_prep/Makefile
-@@ -69,6 +69,11 @@ ARCH = mx28
- HW_OBJS = $(LRADC_OBJS)
- CFLAGS += -DMX28 -DBOARD_MX28_EVK
- endif
-+ifeq ($(BOARD), cfa10036)
-+ARCH = mx28
-+HW_OBJS = $(LRADC_OBJS)
-+CFLAGS += -DMX28 -DBOARD_CFA10036
-+endif
- 
- # Generic code
- CORE_OBJS = entry.o resume.o cmdlines.o setup.o keys.o
-diff --git a/linux_prep/board/cfa10036.c b/linux_prep/board/cfa10036.c
-new file mode 100644
-index 0000000..b084ed4
---- /dev/null
-+++ b/linux_prep/board/cfa10036.c
-@@ -0,0 +1,51 @@
-+/*
-+ * Platform specific data for the  STMP37XX development board
-+ *
-+ * Vladislav Buzov <vbuzov@embeddedalley.com>
-+ *
-+ * Copyright 2008 SigmaTel, Inc
-+ * Copyright 2008 Embedded Alley Solutions, Inc
-+ * Copyright 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved.
-+ *
-+ * This file is licensed under the terms of the GNU General Public License
-+ * version 2.  This program  is licensed "as is" without any warranty of any
-+ * kind, whether express or implied.
-+ */
-+#include <setup.h>
-+#include <keys.h>
-+#include <lradc_buttons.h>
-+
-+/************************************************
-+ *		LRADC keyboard data		*
-+ ************************************************/
-+int lradc_keypad_ch = LRADC_CH1;
-+int lradc_vddio_ch = LRADC_CH10;
-+
-+struct lradc_keycode lradc_keycodes[] = {
-+	{ 100, KEY4 },
-+	{ 306, KEY5 },
-+	{ 626, KEY6 },
-+	{ 932, KEY7 },
-+	{ 1260, KEY8 },
-+	{ 1584, KEY9 },
-+	{ 1757, KEY10 },
-+	{ 2207, KEY11 },
-+	{ 2525, KEY12 },
-+	{ 2831, KEY13 },
-+	{ 3134, KEY14 },
-+	{ -1, 0 },
-+};
-+
-+/************************************************
-+ *	Magic key combinations for Armadillo	*
-+ ************************************************/
-+u32 magic_keys[MAGIC_KEY_NR] = {
-+	[MAGIC_KEY1]	= KEY4,
-+	[MAGIC_KEY2]	= KEY6,
-+	[MAGIC_KEY3]	= KEY10,
-+};
-+
-+/************************************************
-+ *		Default command line		*
-+ ************************************************/
-+char cmdline_def[] = "console=ttyAMA0,115200";
-diff --git a/linux_prep/cmdlines/cfa10036.txt b/linux_prep/cmdlines/cfa10036.txt
-new file mode 100644
-index 0000000..486ffe8
---- /dev/null
-+++ b/linux_prep/cmdlines/cfa10036.txt
-@@ -0,0 +1 @@
-+console=ttyAMA0,115200 root=/dev/mmcblk0p3 rw rootwait
-diff --git a/linux_prep/include/mx28/platform.h b/linux_prep/include/mx28/platform.h
-index d4063f8..3d1f1d7 100644
---- a/linux_prep/include/mx28/platform.h
-+++ b/linux_prep/include/mx28/platform.h
-@@ -19,6 +19,8 @@
- 
- #if defined (BOARD_MX28_EVK)
- #define	MACHINE_ID	2531
-+#elif defined (BOARD_CFA10036)
-+#define	MACHINE_ID	4142
- #else
- #error "Allocate a machine ID for your board"
- #endif

recipes-bsp/imx-bootlets/imx-bootlets_10.12.01.bbappend

@@ -1,4 +0,0 @@
-FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}:"
-
-SRC_URI_append_cfa10036 = " file://cfa10036-support.patch"
-

recipes-bsp/libmcc/libmcc/0001-Makefile-use-oe-ldflags.patch

@@ -0,0 +1,29 @@
+From ba86203da14d21c9c48dcf02595d71901875a263 Mon Sep 17 00:00:00 2001
+From: Max Krummenacher <max.krummenacher@toradex.com>
+Date: Thu, 23 Jun 2022 08:31:46 +0000
+Subject: [PATCH] Makefile: use oe ldflags
+
+Prevents QA error about missing GNU_HASH in the binary.
+
+Upstream-Status: Pending
+Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
+---
+ Makefile | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/Makefile b/Makefile
+index 4482baf..34afbd4 100644
+--- a/Makefile
++++ b/Makefile
+@@ -8,7 +8,7 @@ build/libmcc.a: build/libmcc.o
+ 	$(AR) rcs $@ $<
+ 
+ build/libmcc.so.1.0: build/libmcc.o
+-	$(CC) -shared -Wl,-soname,libmcc.so.1 -o $@ $< -lc
++	$(CC) $(LDFLAGS) -shared -Wl,-soname,libmcc.so.1 -o $@ $< -lc
+ 
+ install:
+ 	mkdir -p $(DESTDIR)/usr/include $(DESTDIR)/usr/lib
+-- 
+2.20.1
+

recipes-bsp/libmcc/libmcc/build-Fix-symlink-generation.patch

@@ -0,0 +1,32 @@
+From adef7a71a3bd40650685183c8a023000423ec880 Mon Sep 17 00:00:00 2001
+From: Otavio Salvador <otavio@ossystems.com.br>
+Date: Tue, 6 Jan 2015 12:03:27 -0200
+Subject: [PATCH] build: Fix symlink generation
+Organization: O.S. Systems Software LTDA.
+
+Upstream-Status: Pending
+
+Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
+---
+ Makefile | 5 ++---
+ 1 file changed, 2 insertions(+), 3 deletions(-)
+
+diff --git a/Makefile b/Makefile
+index ac46f5c..248b2eb 100644
+--- a/Makefile
++++ b/Makefile
+@@ -14,9 +14,8 @@ install:
+ 	mkdir -p $(DESTDIR)/usr/include $(DESTDIR)/usr/lib
+ 	cp -f build/libmcc.so.* build/libmcc.a $(DESTDIR)/usr/lib
+ 	cp -f include/*.h $(DESTDIR)/usr/include
+-	cd $(DESTDIR)/usr/lib/
+-	ln -sf libmcc.so.1.0 libmcc.so.1
+-	ln -sf libmcc.so.1 libmcc.so
++	ln -sf libmcc.so.1.0 $(DESTDIR)/usr/lib/libmcc.so.1
++	ln -sf libmcc.so.1 $(DESTDIR)/usr/lib/libmcc.so
+ 
+ clean:
+ 	rm -rf build
+-- 
+2.1.4
+

recipes-bsp/libmcc/libmcc/build-with-versioned-soname.patch

@@ -0,0 +1,19 @@
+libmcc: build with versioned soname
+
+This adds a versioned soname to the shared library during linking.
+Otherwise an application linked with '-lmcc' needs libmcc.so for execution,
+having libmcc.so.1 would not be enough.
+
+Upstream-Status: Pending
+Signed-off-by: Max Krummenacher <max.oss.09@gmail.com>
+--- a/Makefile	2015-01-07 17:09:13.657675270 +0100
++++ b/Makefile	2015-01-07 17:21:19.457545709 +0100
+@@ -8,7 +8,7 @@
+ 	$(AR) rcs $@ $<
+ 
+ build/libmcc.so.1.0: build/libmcc.o
+-	$(CC) -shared -o $@  $<
++	$(CC) -shared -Wl,-soname,libmcc.so.1 -o $@ $< -lc
+ 
+ install:
+ 	mkdir -p $(DESTDIR)/usr/include $(DESTDIR)/usr/lib

recipes-bsp/libmcc/libmcc_1.05.1.bb

@@ -0,0 +1,30 @@
+# Copyright (C) 2013 Timesys Corporation
+SUMMARY = "Multicore communication Library"
+LICENSE = "GPL-2.0-only | BSD"
+LIC_FILES_CHKSUM = "file://LICENSE;md5=c49712341497d0b5f2e40c30dff2af9d \
+                    file://BSD_LICENSE;md5=10695b8f86532e5e44640acf4d92a2ef"
+
+DEPENDS = "virtual/kernel-module-mcc"
+
+SRC_URI = "http://repository.timesys.com/buildsources/l/libmcc/libmcc-${PV}/libmcc-${PV}.tar.bz2 \
+           file://build-Fix-symlink-generation.patch \
+           file://build-with-versioned-soname.patch \
+           file://0001-Makefile-use-oe-ldflags.patch \
+"
+
+SRC_URI[sha256sum] = "5d6d85f2f17ba1016c24e3a1c1c934a9267021edaed67b63879112151f48562c"
+
+S = "${WORKDIR}/libmcc-${PV}"
+
+CFLAGS += "-I${STAGING_KERNEL_DIR}/include"
+
+RDEPENDS:${PN} = "virtual/kernel-module-mcc"
+
+COMPATIBLE_MACHINE = "(vf-generic-bsp)"
+
+do_install() {
+    oe_runmake 'DESTDIR=${D}' install
+}
+
+RDEPENDS:${PN}-dev += "virtual/kernel-module-mcc-dev"
+PACKAGE_ARCH = "${MACHINE_ARCH}"

recipes-bsp/mc-utils/mc-utils_git.bbappend

@@ -0,0 +1,7 @@
+FILESEXTRAPATHS:append:lx2160acex7 := "${THISDIR}/${PN}-lx2160acex7:"
+
+SRC_URI:append:lx2160acex7 = "\
+	file://0001-lx2160acex7-add-8x10G-dual-40G-and-dual-100G-DPL-DPC.patch \
+"
+
+MC_FLAVOUR:lx2160acex7 = "CEX7"

recipes-bsp/mqxboot/mqxboot/0001-Makefile-use-OE-ldflags.patch

@@ -0,0 +1,29 @@
+From 368ee177806f15194acf352c83f64ba697a613ac Mon Sep 17 00:00:00 2001
+From: Max Krummenacher <max.krummenacher@toradex.com>
+Date: Thu, 23 Jun 2022 08:46:14 +0000
+Subject: [PATCH] Makefile: use OE ldflags
+
+Prevents QA error about missing GNU_HASH in the binary.
+
+Upstream-Status: Pending
+Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
+---
+ Makefile | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/Makefile b/Makefile
+index 37da46f..74cf280 100644
+--- a/Makefile
++++ b/Makefile
+@@ -4,7 +4,7 @@ all: build/mqxboot
+ 
+ build/mqxboot: src/mqxboot.c
+ 	mkdir -p build/
+-	$(CC) $< -o $@ $(CFLAGS)
++	$(CC) $< -o $@ $(CFLAGS) $(LDFLAGS)
+ 
+ install:
+ 	mkdir -p $(INSTALL_PATH)
+-- 
+2.20.1
+

recipes-bsp/mqxboot/mqxboot_1.0.1.bb

@@ -0,0 +1,26 @@
+# Copyright (C) 2013 Timesys Corporation
+SUMMARY = "MQX Image loader - starts an MQX image on the M4"
+LICENSE = "GPL-2.0-only | BSD"
+LIC_FILES_CHKSUM = "file://LICENSE;md5=c49712341497d0b5f2e40c30dff2af9d \
+                    file://BSD_LICENSE;md5=10695b8f86532e5e44640acf4d92a2ef"
+
+DEPENDS = "virtual/kernel-module-mcc"
+
+SRC_URI = " \
+    http://repository.timesys.com/buildsources/m/mqxboot/mqxboot-${PV}/mqxboot-${PV}.tar.bz2 \
+    file://0001-Makefile-use-OE-ldflags.patch \
+"
+
+SRC_URI[sha256sum] = "32444409de5e809b9347e275a3bf78623a89e9ecce3188ebac79318b2b7c39b3"
+
+S = "${WORKDIR}/mqxboot-${PV}"
+
+CFLAGS += "-I${STAGING_KERNEL_DIR}/include"
+
+RDEPENDS:${PN} = "virtual/kernel-module-mcc"
+
+COMPATIBLE_MACHINE = "(vf-generic-bsp)"
+
+do_install() {
+    oe_runmake 'DESTDIR=${D}' install
+}

recipes-bsp/rcw/rcw-lx2160acex7/0001-lx2160acex7-misc-RCW-files.patch

@@ -0,0 +1,640 @@
+From ef5ab1b5a7262a6ef9caf334b0c772b0ebf00fdf Mon Sep 17 00:00:00 2001
+From: Rabeeh Khoury <rabeeh@solid-run.com>
+Date: Sun, 28 Jul 2019 14:43:06 +0300
+Subject: [PATCH] lx2160acex7 misc RCW files
+
+This patch adds support for lx2160a rcw project.
+In general RCW has lots of redundent files and can be restructured
+better as in this patch.
+
+Upstream-Status: Inappropriate [Solid-Run BSP]
+
+Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com>
+---
+ lx2160acex7/Makefile                          |  2 +
+ lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw.orig  | 61 +++++++++++++++++++
+ .../rcw_1900_600_2600_17_4_2.rcw              |  4 ++
+ .../rcw_1900_600_2600_17_4_2_sd.rcw           |  4 ++
+ .../rcw_2000_700_2400_13_5_2_sd.rcw           |  4 ++
+ .../rcw_2000_700_2400_20_5_2_sd.rcw           |  4 ++
+ .../rcw_2000_700_2400_8_5_2_sd.rcw            |  4 ++
+ .../rcw_2000_700_2600_8_5_2_sd.rcw            |  4 ++
+ .../rcw_2000_700_2900_17_4_2_sd.rcw           |  4 ++
+ .../rcw_2000_700_2900_8_5_2_sd.rcw            |  4 ++
+ .../rcw_2000_700_3200_17_4_2_sd.rcw           |  4 ++
+ .../rcw_2000_700_3200_20_5_2_sd.rcw           |  4 ++
+ .../rcw_2000_700_3200_8_5_0_sd.rcw            |  4 ++
+ .../rcw_2000_700_3200_8_5_2_sd.rcw            |  4 ++
+ .../rcw_2000_700_3200_8_5_2_xspi.rcw          |  4 ++
+ .../rcw_2400_700_3200_8_5_2_sd.rcw            |  4 ++
+ .../rcw_2500_700_3200_8_5_2_sd.rcw            |  4 ++
+ .../rcw_2600_700_3200_8_5_2_sd.rcw            |  4 ++
+ .../XGGFF_PP_HHHH_RR_19_5_2/rcw_test_sd.rcw   |  4 ++
+ lx2160acex7/configs/lx2160a_13_5_2.rcwi       |  3 +
+ lx2160acex7/configs/lx2160a_17_4_2.rcwi       |  7 +++
+ .../configs/lx2160a_1900_600_2600.rcwi        | 12 ++++
+ .../configs/lx2160a_2000_700_2400.rcwi        | 12 ++++
+ .../configs/lx2160a_2000_700_2600.rcwi        | 12 ++++
+ .../configs/lx2160a_2000_700_2900.rcwi        | 12 ++++
+ .../configs/lx2160a_2000_700_3200.rcwi        | 12 ++++
+ lx2160acex7/configs/lx2160a_20_5_2.rcwi       |  7 +++
+ .../configs/lx2160a_2400_700_3200.rcwi        | 12 ++++
+ .../configs/lx2160a_2500_700_3200.rcwi        | 12 ++++
+ .../configs/lx2160a_2600_700_3200.rcwi        | 12 ++++
+ lx2160acex7/configs/lx2160a_8_5_0.rcwi        |  7 +++
+ lx2160acex7/configs/lx2160a_8_5_2.rcwi        |  7 +++
+ lx2160acex7/configs/lx2160a_defaults.rcwi     | 19 ++++++
+ lx2160acex7/configs/lx2160a_sdboot.rcwi       | 20 ++++++
+ lx2160acex7/configs/lx2160a_test.rcwi         | 20 ++++++
+ lx2160acex7/configs/lx2160a_xspiboot.rcwi     | 17 ++++++
+ 36 files changed, 334 insertions(+)
+ create mode 100644 lx2160acex7/Makefile
+ create mode 100644 lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw.orig
+ create mode 100644 lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_1900_600_2600_17_4_2.rcw
+ create mode 100644 lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_1900_600_2600_17_4_2_sd.rcw
+ create mode 100644 lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2400_13_5_2_sd.rcw
+ create mode 100644 lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2400_20_5_2_sd.rcw
+ create mode 100644 lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2400_8_5_2_sd.rcw
+ create mode 100644 lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2600_8_5_2_sd.rcw
+ create mode 100644 lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2900_17_4_2_sd.rcw
+ create mode 100644 lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2900_8_5_2_sd.rcw
+ create mode 100644 lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_17_4_2_sd.rcw
+ create mode 100644 lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_20_5_2_sd.rcw
+ create mode 100644 lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_8_5_0_sd.rcw
+ create mode 100644 lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_8_5_2_sd.rcw
+ create mode 100644 lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_8_5_2_xspi.rcw
+ create mode 100644 lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2400_700_3200_8_5_2_sd.rcw
+ create mode 100644 lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2500_700_3200_8_5_2_sd.rcw
+ create mode 100644 lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2600_700_3200_8_5_2_sd.rcw
+ create mode 100644 lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_test_sd.rcw
+ create mode 100644 lx2160acex7/configs/lx2160a_13_5_2.rcwi
+ create mode 100644 lx2160acex7/configs/lx2160a_17_4_2.rcwi
+ create mode 100644 lx2160acex7/configs/lx2160a_1900_600_2600.rcwi
+ create mode 100644 lx2160acex7/configs/lx2160a_2000_700_2400.rcwi
+ create mode 100644 lx2160acex7/configs/lx2160a_2000_700_2600.rcwi
+ create mode 100644 lx2160acex7/configs/lx2160a_2000_700_2900.rcwi
+ create mode 100644 lx2160acex7/configs/lx2160a_2000_700_3200.rcwi
+ create mode 100644 lx2160acex7/configs/lx2160a_20_5_2.rcwi
+ create mode 100644 lx2160acex7/configs/lx2160a_2400_700_3200.rcwi
+ create mode 100644 lx2160acex7/configs/lx2160a_2500_700_3200.rcwi
+ create mode 100644 lx2160acex7/configs/lx2160a_2600_700_3200.rcwi
+ create mode 100644 lx2160acex7/configs/lx2160a_8_5_0.rcwi
+ create mode 100644 lx2160acex7/configs/lx2160a_8_5_2.rcwi
+ create mode 100644 lx2160acex7/configs/lx2160a_defaults.rcwi
+ create mode 100644 lx2160acex7/configs/lx2160a_sdboot.rcwi
+ create mode 100644 lx2160acex7/configs/lx2160a_test.rcwi
+ create mode 100644 lx2160acex7/configs/lx2160a_xspiboot.rcwi
+
+diff --git a/lx2160acex7/Makefile b/lx2160acex7/Makefile
+new file mode 100644
+index 0000000..d7e9447
+--- /dev/null
++++ b/lx2160acex7/Makefile
+@@ -0,0 +1,2 @@
++include ../Makefile.inc
++
+diff --git a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw.orig b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw.orig
+new file mode 100644
+index 0000000..cdb6446
+--- /dev/null
++++ b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw.orig
+@@ -0,0 +1,61 @@
++/*
++ * SerDes Protocol 1 -  19
++ * SerDes Protocol 2 -  5
++ * SerDes Protocol 3 -  2
++ *
++ * Frequencies:
++ * Core     -- 1900 MHz
++ * Platform -- 600  MHz
++ * DDR      -- 2600 MT/s
++ */
++
++#include <../lx2160asi/lx2160a.rcwi>
++
++SYS_PLL_RAT=12
++MEM_PLL_CFG=3
++MEM_PLL_RAT=26
++MEM2_PLL_CFG=3
++MEM2_PLL_RAT=26
++CGA_PLL1_RAT=19
++CGA_PLL2_RAT=19
++CGB_PLL1_RAT=19
++CGB_PLL2_RAT=9
++C5_PLL_SEL=0
++C6_PLL_SEL=0
++C7_PLL_SEL=0
++C8_PLL_SEL=0
++HWA_CGA_M1_CLK_SEL=1
++HWA_CGB_M1_CLK_SEL=7
++BOOT_LOC=26
++SYSCLK_FREQ=600
++IIC2_PMUX=6
++IIC3_PMUX=2
++IIC4_PMUX=2
++USB3_CLK_FSEL=39
++SRDS_PRTCL_S1=19
++SRDS_PRTCL_S2=5
++SRDS_PRTCL_S3=2
++SRDS_PLL_REF_CLK_SEL_S1=2
++SRDS_DIV_PEX_S1=1
++SRDS_DIV_PEX_S2=3
++SRDS_DIV_PEX_S3=1
++
++/* Errata to write on scratch reg for validation */
++#include <../lx2160asi/scratchrw1.rcw>
++
++/* Copy SPL Uboot to Ocram */
++.pbi
++blockcopy 0x08,0x00100000,0x1800a000,0x00020000
++.end
++
++/* Boot Location Pointer */
++#include <../lx2160asi/bootlocptr_sd.rcw>
++
++/* Errata for SATA controller */
++#include <../lx2160asi/a010554.rcw>
++
++/* Modify FlexSPI Clock Divisor value */
++#include <../lx2160asi/flexspi_divisor_24.rcw>
++
++/* common PBI commands */
++#include <../lx2160asi/common.rcw>
+diff --git a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_1900_600_2600_17_4_2.rcw b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_1900_600_2600_17_4_2.rcw
+new file mode 100644
+index 0000000..13ab0b9
+--- /dev/null
++++ b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_1900_600_2600_17_4_2.rcw
+@@ -0,0 +1,4 @@
++#include <configs/lx2160a_defaults.rcwi>
++#include <configs/lx2160a_1900_600_2600.rcwi>
++#include <configs/lx2160a_17_4_2.rcwi>
++#include <configs/lx2160a_xspiboot.rcwi>
+diff --git a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_1900_600_2600_17_4_2_sd.rcw b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_1900_600_2600_17_4_2_sd.rcw
+new file mode 100644
+index 0000000..14fae8c
+--- /dev/null
++++ b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_1900_600_2600_17_4_2_sd.rcw
+@@ -0,0 +1,4 @@
++#include <configs/lx2160a_defaults.rcwi>
++#include <configs/lx2160a_1900_600_2600.rcwi>
++#include <configs/lx2160a_17_4_2.rcwi>
++#include <configs/lx2160a_sdboot.rcwi>
+diff --git a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2400_13_5_2_sd.rcw b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2400_13_5_2_sd.rcw
+new file mode 100644
+index 0000000..2dae5a2
+--- /dev/null
++++ b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2400_13_5_2_sd.rcw
+@@ -0,0 +1,4 @@
++#include <configs/lx2160a_defaults.rcwi>
++#include <configs/lx2160a_2000_700_2400.rcwi>
++#include <configs/lx2160a_13_5_2.rcwi>
++#include <configs/lx2160a_sdboot.rcwi>
+diff --git a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2400_20_5_2_sd.rcw b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2400_20_5_2_sd.rcw
+new file mode 100644
+index 0000000..5335072
+--- /dev/null
++++ b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2400_20_5_2_sd.rcw
+@@ -0,0 +1,4 @@
++#include <configs/lx2160a_defaults.rcwi>
++#include <configs/lx2160a_2000_700_2400.rcwi>
++#include <configs/lx2160a_20_5_2.rcwi>
++#include <configs/lx2160a_sdboot.rcwi>
+diff --git a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2400_8_5_2_sd.rcw b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2400_8_5_2_sd.rcw
+new file mode 100644
+index 0000000..e2a5bd3
+--- /dev/null
++++ b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2400_8_5_2_sd.rcw
+@@ -0,0 +1,4 @@
++#include <configs/lx2160a_defaults.rcwi>
++#include <configs/lx2160a_2000_700_2400.rcwi>
++#include <configs/lx2160a_8_5_2.rcwi>
++#include <configs/lx2160a_sdboot.rcwi>
+diff --git a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2600_8_5_2_sd.rcw b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2600_8_5_2_sd.rcw
+new file mode 100644
+index 0000000..a330bfe
+--- /dev/null
++++ b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2600_8_5_2_sd.rcw
+@@ -0,0 +1,4 @@
++#include <configs/lx2160a_defaults.rcwi>
++#include <configs/lx2160a_2000_700_2600.rcwi>
++#include <configs/lx2160a_8_5_2.rcwi>
++#include <configs/lx2160a_sdboot.rcwi>
+diff --git a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2900_17_4_2_sd.rcw b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2900_17_4_2_sd.rcw
+new file mode 100644
+index 0000000..8535dbd
+--- /dev/null
++++ b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2900_17_4_2_sd.rcw
+@@ -0,0 +1,4 @@
++#include <configs/lx2160a_defaults.rcwi>
++#include <configs/lx2160a_2000_700_2900.rcwi>
++#include <configs/lx2160a_17_4_2.rcwi>
++#include <configs/lx2160a_sdboot.rcwi>
+diff --git a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2900_8_5_2_sd.rcw b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2900_8_5_2_sd.rcw
+new file mode 100644
+index 0000000..698be01
+--- /dev/null
++++ b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2900_8_5_2_sd.rcw
+@@ -0,0 +1,4 @@
++#include <configs/lx2160a_defaults.rcwi>
++#include <configs/lx2160a_2000_700_2900.rcwi>
++#include <configs/lx2160a_8_5_2.rcwi>
++#include <configs/lx2160a_sdboot.rcwi>
+diff --git a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_17_4_2_sd.rcw b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_17_4_2_sd.rcw
+new file mode 100644
+index 0000000..780d8c3
+--- /dev/null
++++ b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_17_4_2_sd.rcw
+@@ -0,0 +1,4 @@
++#include <configs/lx2160a_defaults.rcwi>
++#include <configs/lx2160a_2000_700_3200.rcwi>
++#include <configs/lx2160a_17_4_2.rcwi>
++#include <configs/lx2160a_sdboot.rcwi>
+diff --git a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_20_5_2_sd.rcw b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_20_5_2_sd.rcw
+new file mode 100644
+index 0000000..eb9d240
+--- /dev/null
++++ b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_20_5_2_sd.rcw
+@@ -0,0 +1,4 @@
++#include <configs/lx2160a_defaults.rcwi>
++#include <configs/lx2160a_2000_700_3200.rcwi>
++#include <configs/lx2160a_20_5_2.rcwi>
++#include <configs/lx2160a_sdboot.rcwi>
+diff --git a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_8_5_0_sd.rcw b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_8_5_0_sd.rcw
+new file mode 100644
+index 0000000..ceb53a3
+--- /dev/null
++++ b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_8_5_0_sd.rcw
+@@ -0,0 +1,4 @@
++#include <configs/lx2160a_defaults.rcwi>
++#include <configs/lx2160a_2000_700_3200.rcwi>
++#include <configs/lx2160a_8_5_0.rcwi>
++#include <configs/lx2160a_sdboot.rcwi>
+diff --git a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_8_5_2_sd.rcw b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_8_5_2_sd.rcw
+new file mode 100644
+index 0000000..a220e98
+--- /dev/null
++++ b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_8_5_2_sd.rcw
+@@ -0,0 +1,4 @@
++#include <configs/lx2160a_defaults.rcwi>
++#include <configs/lx2160a_2000_700_3200.rcwi>
++#include <configs/lx2160a_8_5_2.rcwi>
++#include <configs/lx2160a_sdboot.rcwi>
+diff --git a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_8_5_2_xspi.rcw b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_8_5_2_xspi.rcw
+new file mode 100644
+index 0000000..1eabd7d
+--- /dev/null
++++ b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_8_5_2_xspi.rcw
+@@ -0,0 +1,4 @@
++#include <configs/lx2160a_defaults.rcwi>
++#include <configs/lx2160a_2000_700_3200.rcwi>
++#include <configs/lx2160a_8_5_2.rcwi>
++#include <configs/lx2160a_xspiboot.rcwi>
+diff --git a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2400_700_3200_8_5_2_sd.rcw b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2400_700_3200_8_5_2_sd.rcw
+new file mode 100644
+index 0000000..2ac59b1
+--- /dev/null
++++ b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2400_700_3200_8_5_2_sd.rcw
+@@ -0,0 +1,4 @@
++#include <configs/lx2160a_defaults.rcwi>
++#include <configs/lx2160a_2400_700_3200.rcwi>
++#include <configs/lx2160a_8_5_2.rcwi>
++#include <configs/lx2160a_sdboot.rcwi>
+diff --git a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2500_700_3200_8_5_2_sd.rcw b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2500_700_3200_8_5_2_sd.rcw
+new file mode 100644
+index 0000000..e7c08df
+--- /dev/null
++++ b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2500_700_3200_8_5_2_sd.rcw
+@@ -0,0 +1,4 @@
++#include <configs/lx2160a_defaults.rcwi>
++#include <configs/lx2160a_2500_700_3200.rcwi>
++#include <configs/lx2160a_8_5_2.rcwi>
++#include <configs/lx2160a_sdboot.rcwi>
+diff --git a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2600_700_3200_8_5_2_sd.rcw b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2600_700_3200_8_5_2_sd.rcw
+new file mode 100644
+index 0000000..1e7a8f7
+--- /dev/null
++++ b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2600_700_3200_8_5_2_sd.rcw
+@@ -0,0 +1,4 @@
++#include <configs/lx2160a_defaults.rcwi>
++#include <configs/lx2160a_2600_700_3200.rcwi>
++#include <configs/lx2160a_8_5_2.rcwi>
++#include <configs/lx2160a_sdboot.rcwi>
+diff --git a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_test_sd.rcw b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_test_sd.rcw
+new file mode 100644
+index 0000000..86f12f8
+--- /dev/null
++++ b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_test_sd.rcw
+@@ -0,0 +1,4 @@
++#include <configs/lx2160a_defaults.rcwi>
++#include <configs/lx2160a_test.rcwi>
++#include <configs/lx2160a_17_4_2.rcwi>
++#include <configs/lx2160a_sdboot.rcwi>
+diff --git a/lx2160acex7/configs/lx2160a_13_5_2.rcwi b/lx2160acex7/configs/lx2160a_13_5_2.rcwi
+new file mode 100644
+index 0000000..76f44bc
+--- /dev/null
++++ b/lx2160acex7/configs/lx2160a_13_5_2.rcwi
+@@ -0,0 +1,3 @@
++SRDS_PRTCL_S1=13
++SRDS_PRTCL_S2=5
++SRDS_PRTCL_S3=2
+diff --git a/lx2160acex7/configs/lx2160a_17_4_2.rcwi b/lx2160acex7/configs/lx2160a_17_4_2.rcwi
+new file mode 100644
+index 0000000..358972d
+--- /dev/null
++++ b/lx2160acex7/configs/lx2160a_17_4_2.rcwi
+@@ -0,0 +1,7 @@
++SRDS_PRTCL_S1=17
++SRDS_PRTCL_S2=4
++SRDS_PRTCL_S3=2
++
++/*SRDS_INTRA_REF_CLK_S1 = 1*/ /* PLLF used for PLLS */
++/*SRDS_PLL_REF_CLK_SEL_S1=2*/
++
+diff --git a/lx2160acex7/configs/lx2160a_1900_600_2600.rcwi b/lx2160acex7/configs/lx2160a_1900_600_2600.rcwi
+new file mode 100644
+index 0000000..8b61021
+--- /dev/null
++++ b/lx2160acex7/configs/lx2160a_1900_600_2600.rcwi
+@@ -0,0 +1,12 @@
++CGA_PLL1_RAT=19
++CGA_PLL2_RAT=19
++CGB_PLL1_RAT=19
++CGB_PLL2_RAT=9
++
++SYS_PLL_RAT=12
++
++MEM_PLL_RAT=26
++MEM2_PLL_RAT=26
++
++/* Modify FlexSPI Clock Divisor value */
++/* #include <../lx2160asi/flexspi_divisor_24.rcw>*/
+diff --git a/lx2160acex7/configs/lx2160a_2000_700_2400.rcwi b/lx2160acex7/configs/lx2160a_2000_700_2400.rcwi
+new file mode 100644
+index 0000000..6b0b150
+--- /dev/null
++++ b/lx2160acex7/configs/lx2160a_2000_700_2400.rcwi
+@@ -0,0 +1,12 @@
++CGA_PLL1_RAT=20
++CGA_PLL2_RAT=20
++CGB_PLL1_RAT=20
++CGB_PLL2_RAT=9
++
++SYS_PLL_RAT=14
++
++MEM_PLL_RAT=24
++MEM2_PLL_RAT=24
++
++/* Modify FlexSPI Clock Divisor value */
++/* #include <../lx2160asi/flexspi_divisor_28.rcw>*/
+diff --git a/lx2160acex7/configs/lx2160a_2000_700_2600.rcwi b/lx2160acex7/configs/lx2160a_2000_700_2600.rcwi
+new file mode 100644
+index 0000000..21dce67
+--- /dev/null
++++ b/lx2160acex7/configs/lx2160a_2000_700_2600.rcwi
+@@ -0,0 +1,12 @@
++CGA_PLL1_RAT=20
++CGA_PLL2_RAT=20
++CGB_PLL1_RAT=20
++CGB_PLL2_RAT=9
++
++SYS_PLL_RAT=14
++
++MEM_PLL_RAT=26
++MEM2_PLL_RAT=26
++
++/* Modify FlexSPI Clock Divisor value */
++/* #include <../lx2160asi/flexspi_divisor_28.rcw>*/
+diff --git a/lx2160acex7/configs/lx2160a_2000_700_2900.rcwi b/lx2160acex7/configs/lx2160a_2000_700_2900.rcwi
+new file mode 100644
+index 0000000..e6a8e30
+--- /dev/null
++++ b/lx2160acex7/configs/lx2160a_2000_700_2900.rcwi
+@@ -0,0 +1,12 @@
++CGA_PLL1_RAT=20
++CGA_PLL2_RAT=20
++CGB_PLL1_RAT=20
++CGB_PLL2_RAT=9
++
++SYS_PLL_RAT=14
++
++MEM_PLL_RAT=29
++MEM2_PLL_RAT=29
++
++/* Modify FlexSPI Clock Divisor value */
++/* #include <../lx2160asi/flexspi_divisor_28.rcw>*/
+diff --git a/lx2160acex7/configs/lx2160a_2000_700_3200.rcwi b/lx2160acex7/configs/lx2160a_2000_700_3200.rcwi
+new file mode 100644
+index 0000000..27ee377
+--- /dev/null
++++ b/lx2160acex7/configs/lx2160a_2000_700_3200.rcwi
+@@ -0,0 +1,12 @@
++CGA_PLL1_RAT=20
++CGA_PLL2_RAT=20
++CGB_PLL1_RAT=20
++CGB_PLL2_RAT=9
++
++SYS_PLL_RAT=14
++
++MEM_PLL_RAT=32
++MEM2_PLL_RAT=32
++
++/* Modify FlexSPI Clock Divisor value */
++#include <../lx2160asi/flexspi_divisor_28.rcw>
+diff --git a/lx2160acex7/configs/lx2160a_20_5_2.rcwi b/lx2160acex7/configs/lx2160a_20_5_2.rcwi
+new file mode 100644
+index 0000000..c2c7bea
+--- /dev/null
++++ b/lx2160acex7/configs/lx2160a_20_5_2.rcwi
+@@ -0,0 +1,7 @@
++SRDS_PRTCL_S1=20
++SRDS_PRTCL_S2=5
++SRDS_PRTCL_S3=2
++
++SRDS_INTRA_REF_CLK_S1 = 1 /* PLLF used for PLLS */
++SRDS_PLL_REF_CLK_SEL_S1=2
++SRDS_PLL_PD_PLL1=1
+diff --git a/lx2160acex7/configs/lx2160a_2400_700_3200.rcwi b/lx2160acex7/configs/lx2160a_2400_700_3200.rcwi
+new file mode 100644
+index 0000000..fc0fd6c
+--- /dev/null
++++ b/lx2160acex7/configs/lx2160a_2400_700_3200.rcwi
+@@ -0,0 +1,12 @@
++CGA_PLL1_RAT=24
++CGA_PLL2_RAT=24
++CGB_PLL1_RAT=24
++CGB_PLL2_RAT=9
++
++SYS_PLL_RAT=14
++
++MEM_PLL_RAT=32
++MEM2_PLL_RAT=32
++
++/* Modify FlexSPI Clock Divisor value */
++#include <../lx2160asi/flexspi_divisor_28.rcw>
+diff --git a/lx2160acex7/configs/lx2160a_2500_700_3200.rcwi b/lx2160acex7/configs/lx2160a_2500_700_3200.rcwi
+new file mode 100644
+index 0000000..62d9069
+--- /dev/null
++++ b/lx2160acex7/configs/lx2160a_2500_700_3200.rcwi
+@@ -0,0 +1,12 @@
++CGA_PLL1_RAT=25
++CGA_PLL2_RAT=25
++CGB_PLL1_RAT=25
++CGB_PLL2_RAT=9
++
++SYS_PLL_RAT=14
++
++MEM_PLL_RAT=32
++MEM2_PLL_RAT=32
++
++/* Modify FlexSPI Clock Divisor value */
++#include <../lx2160asi/flexspi_divisor_28.rcw>
+diff --git a/lx2160acex7/configs/lx2160a_2600_700_3200.rcwi b/lx2160acex7/configs/lx2160a_2600_700_3200.rcwi
+new file mode 100644
+index 0000000..e244917
+--- /dev/null
++++ b/lx2160acex7/configs/lx2160a_2600_700_3200.rcwi
+@@ -0,0 +1,12 @@
++CGA_PLL1_RAT=26
++CGA_PLL2_RAT=26
++CGB_PLL1_RAT=26
++CGB_PLL2_RAT=9
++
++SYS_PLL_RAT=14
++
++MEM_PLL_RAT=32
++MEM2_PLL_RAT=32
++
++/* Modify FlexSPI Clock Divisor value */
++#include <../lx2160asi/flexspi_divisor_28.rcw>
+diff --git a/lx2160acex7/configs/lx2160a_8_5_0.rcwi b/lx2160acex7/configs/lx2160a_8_5_0.rcwi
+new file mode 100644
+index 0000000..62ff153
+--- /dev/null
++++ b/lx2160acex7/configs/lx2160a_8_5_0.rcwi
+@@ -0,0 +1,7 @@
++SRDS_PRTCL_S1=8 /* should be 8 */
++SRDS_PRTCL_S2=5
++SRDS_PRTCL_S3=0
++
++SRDS_INTRA_REF_CLK_S1 = 1 /* PLLF used for PLLS */
++SRDS_PLL_REF_CLK_SEL_S1=2
++SRDS_PLL_PD_PLL1=1
+diff --git a/lx2160acex7/configs/lx2160a_8_5_2.rcwi b/lx2160acex7/configs/lx2160a_8_5_2.rcwi
+new file mode 100644
+index 0000000..d7d707a
+--- /dev/null
++++ b/lx2160acex7/configs/lx2160a_8_5_2.rcwi
+@@ -0,0 +1,7 @@
++SRDS_PRTCL_S1=8 /* should be 8 */
++SRDS_PRTCL_S2=5
++SRDS_PRTCL_S3=2
++
++SRDS_INTRA_REF_CLK_S1 = 1 /* PLLF used for PLLS */
++SRDS_PLL_REF_CLK_SEL_S1=2
++SRDS_PLL_PD_PLL1=1
+diff --git a/lx2160acex7/configs/lx2160a_defaults.rcwi b/lx2160acex7/configs/lx2160a_defaults.rcwi
+new file mode 100644
+index 0000000..6fd65ec
+--- /dev/null
++++ b/lx2160acex7/configs/lx2160a_defaults.rcwi
+@@ -0,0 +1,19 @@
++#include <../lx2160asi/lx2160a.rcwi>
++MEM_PLL_CFG=3
++MEM2_PLL_CFG=3
++C5_PLL_SEL=0
++C6_PLL_SEL=0
++C7_PLL_SEL=0
++C8_PLL_SEL=0
++HWA_CGA_M1_CLK_SEL=1
++HWA_CGB_M1_CLK_SEL=7
++BOOT_LOC=26
++SYSCLK_FREQ=600
++IIC2_PMUX=6
++IIC3_PMUX=0
++IIC4_PMUX=2
++USB3_CLK_FSEL=39
++SRDS_DIV_PEX_S1=1
++SRDS_DIV_PEX_S2=3
++SRDS_DIV_PEX_S3=1
++
+diff --git a/lx2160acex7/configs/lx2160a_sdboot.rcwi b/lx2160acex7/configs/lx2160a_sdboot.rcwi
+new file mode 100644
+index 0000000..d537ea5
+--- /dev/null
++++ b/lx2160acex7/configs/lx2160a_sdboot.rcwi
+@@ -0,0 +1,20 @@
++/* Errata to write on scratch reg for validation */
++#include <../lx2160asi/scratchrw1.rcw>
++
++/* Copy SPL Uboot to Ocram */
++.pbi
++blockcopy 0x08,0x00100000,0x1800a000,0x00020000
++.end
++
++/* Boot Location Pointer */
++#include <../lx2160asi/bootlocptr_sd.rcw>
++
++/* Errata for SATA controller */
++#include <../lx2160asi/a010554.rcw>
++
++/* Errata for PCIe controller */
++#include <../lx2160asi/a011270.rcw>
++
++/* common PBI commands */
++#include <../lx2160asi/common.rcw>
++
+diff --git a/lx2160acex7/configs/lx2160a_test.rcwi b/lx2160acex7/configs/lx2160a_test.rcwi
+new file mode 100644
+index 0000000..a223be1
+--- /dev/null
++++ b/lx2160acex7/configs/lx2160a_test.rcwi
+@@ -0,0 +1,20 @@
++CGA_PLL1_RAT=20
++CGA_PLL2_RAT=20
++CGB_PLL1_RAT=20
++CGB_PLL2_RAT=8
++
++SYS_PLL_RAT=12
++
++MEM_PLL_RAT=32
++MEM2_PLL_RAT=32
++
++/* Modify FlexSPI Clock Divisor value */
++/* #include <../lx2160asi/flexspi_divisor_24.rcw> */
++
++SRDS_PLL_PD_PLL1=1
++SRDS_PLL_PD_PLL2=1
++SRDS_PLL_PD_PLL3=1
++SRDS_PLL_PD_PLL4=1
++SRDS_PLL_PD_PLL5=1
++SRDS_PLL_PD_PLL6=1
++
+diff --git a/lx2160acex7/configs/lx2160a_xspiboot.rcwi b/lx2160acex7/configs/lx2160a_xspiboot.rcwi
+new file mode 100644
+index 0000000..eecc314
+--- /dev/null
++++ b/lx2160acex7/configs/lx2160a_xspiboot.rcwi
+@@ -0,0 +1,17 @@
++/* Errata to write on scratch reg for validation */
++#include <../lx2160asi/scratchrw1.rcw>
++
++/* Boot Location Pointer */
++#include <../lx2160asi/bootlocptr_nor.rcw>
++
++/* Errata for SATA controller */
++#include <../lx2160asi/a010554.rcw>
++
++/* Errata for PCIe controller */
++#include <../lx2160asi/a011270.rcw>
++
++/* common PBI commands */
++#include <../lx2160asi/common.rcw>
++
++/* Modify FlexSPI Clock Divisor value */
++#include <../lx2160asi/flexspi_divisor_24.rcw>
+-- 
+2.17.1
+

recipes-bsp/rcw/rcw-lx2160acex7/0002-Set-io-pads-as-GPIO.patch

@@ -0,0 +1,38 @@
+From b184697cff85d8f98e765014309b97444ff1c5b7 Mon Sep 17 00:00:00 2001
+From: Rabeeh Khoury <rabeeh@solid-run.com>
+Date: Wed, 30 Oct 2019 11:43:37 +0200
+Subject: [PATCH 2/2] Set io pads as GPIO
+
+Upstream-Status: Inappropriate [Solid-Run BSP]
+
+Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com>
+---
+ lx2160acex7/configs/lx2160a_defaults.rcwi | 9 +++++++--
+ 1 file changed, 7 insertions(+), 2 deletions(-)
+
+diff --git a/lx2160acex7/configs/lx2160a_defaults.rcwi b/lx2160acex7/configs/lx2160a_defaults.rcwi
+index 6fd65ec..dbc843f 100644
+--- a/lx2160acex7/configs/lx2160a_defaults.rcwi
++++ b/lx2160acex7/configs/lx2160a_defaults.rcwi
+@@ -9,11 +9,16 @@ HWA_CGA_M1_CLK_SEL=1
+ HWA_CGB_M1_CLK_SEL=7
+ BOOT_LOC=26
+ SYSCLK_FREQ=600
+-IIC2_PMUX=6
++IIC2_PMUX=1
+ IIC3_PMUX=0
+ IIC4_PMUX=2
+ USB3_CLK_FSEL=39
+ SRDS_DIV_PEX_S1=1
+ SRDS_DIV_PEX_S2=3
+ SRDS_DIV_PEX_S3=1
+-
++SDHC1_DIR_PMUX=1
++IRQ03_00_PMUX=1
++IRQ07_04_PMUX=1
++IRQ11_08_PMUX=1
++EVT20_PMUX=1
++EVT43_PMUX=1
+-- 
+2.17.1
+

recipes-bsp/rcw/rcw-lx2160acex7/0003-S2-enable-gen3-xspi-increase-divisor-to-28.patch

@@ -0,0 +1,42 @@
+From 3b0e8b6e242549c2ed992d7556d7966a77b6da86 Mon Sep 17 00:00:00 2001
+From: Rabeeh Khoury <rabeeh@solid-run.com>
+Date: Tue, 5 Nov 2019 10:35:32 +0200
+Subject: [PATCH] S2 - enable gen3, xspi increase divisor to 28
+
+Serdes group 2 enable PCIe gen 3
+XSPI increase divisor to 28 - this fixes UEFI SPI flash detection.
+
+Upstream-Status: Inappropriate [Solid-Run BSP]
+
+Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com>
+---
+ lx2160acex7/configs/lx2160a_defaults.rcwi | 2 +-
+ lx2160acex7/configs/lx2160a_xspiboot.rcwi | 2 +-
+ 2 files changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/lx2160acex7/configs/lx2160a_defaults.rcwi b/lx2160acex7/configs/lx2160a_defaults.rcwi
+index dbc843f..3ea7683 100644
+--- a/lx2160acex7/configs/lx2160a_defaults.rcwi
++++ b/lx2160acex7/configs/lx2160a_defaults.rcwi
+@@ -14,7 +14,7 @@ IIC3_PMUX=0
+ IIC4_PMUX=2
+ USB3_CLK_FSEL=39
+ SRDS_DIV_PEX_S1=1
+-SRDS_DIV_PEX_S2=3
++SRDS_DIV_PEX_S2=1
+ SRDS_DIV_PEX_S3=1
+ SDHC1_DIR_PMUX=1
+ IRQ03_00_PMUX=1
+diff --git a/lx2160acex7/configs/lx2160a_xspiboot.rcwi b/lx2160acex7/configs/lx2160a_xspiboot.rcwi
+index eecc314..28310c9 100644
+--- a/lx2160acex7/configs/lx2160a_xspiboot.rcwi
++++ b/lx2160acex7/configs/lx2160a_xspiboot.rcwi
+@@ -14,4 +14,4 @@
+ #include <../lx2160asi/common.rcw>
+ 
+ /* Modify FlexSPI Clock Divisor value */
+-#include <../lx2160asi/flexspi_divisor_24.rcw>
++#include <../lx2160asi/flexspi_divisor_28.rcw>
+-- 
+2.17.1
+

recipes-bsp/rcw/rcw-lx2160acex7/0004-refactor-a009531-a008851-and-a011270.patch

@@ -0,0 +1,181 @@
+From c7c3ed47f1de7c20de348a6ca5fe0d5a18912f4b Mon Sep 17 00:00:00 2001
+From: Rabeeh Khoury <rabeeh@solid-run.com>
+Date: Mon, 23 Mar 2020 12:16:13 +0200
+Subject: [PATCH 4/4] refactor a009531, a008851 and a011270
+
+1. Add 'load conditional', 'jump condidional' and 'jump' to PBI
+instructions.
+2. Use SVR register to execute the PCIe workarounds on the relevant rev
+of the device.
+
+Upstream-Status: Inappropriate [Solid-Run BSP]
+
+Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com>
+---
+ lx2160asi/a009531_a008851.rcw | 96 +++++++++++++++++++++++++++++++++++
+ lx2160asi/a011270.rcw         |  6 +++
+ rcw.py                        | 28 ++++++++++
+ 3 files changed, 130 insertions(+)
+ create mode 100644 lx2160asi/a009531_a008851.rcw
+
+diff --git a/lx2160asi/a009531_a008851.rcw b/lx2160asi/a009531_a008851.rcw
+new file mode 100644
+index 0000000..0eb7051
+--- /dev/null
++++ b/lx2160asi/a009531_a008851.rcw
+@@ -0,0 +1,96 @@
++/*
++ * Work-around for erratum A-009531
++ *
++ * Description:
++ * As defined in section 2.2.6.4, Relaxed Ordering and ID-Based Ordering (IDO)
++ * Attributes of the PCI Express Base Specification Rev 3.1, “A Completer
++ * is permitted to set IDO only if the IDO Completion Enable bit in the Device
++ * Control 2 Register is set. It is not required to copy the value of IDO from
++ * the Request into the Completion(s) for that Request".
++ *
++ * However, the PCI Express controller as the completer sets the IDO bit in the
++ * completion packet header, in response to non-posted requests (memory read) with
++ * IDO bit set in the packet header, even if the IDO Completion Enable bit in the
++ * Device Control 2 Register is not set.
++ *
++ * Impact:
++ * The PCI Express controller as the completer sends completion packets with IDO
++ * bit set in packet header even when the IDO Completion Enable bit is cleared in
++ * the controller’s Device Control 2 Register.
++ * Applicable for SNP PCIe controller
++ */
++
++/*
++ * Work-around for erratum A-008851
++ *
++ * Invalid transmitter/receiver preset values are used in Gen3 equalization
++ * phases during link training for RC mode
++ * This errata is valid only for PCI gen3.
++ * Workaround:
++ *  write 0x00000001 to MISC_CONTROL_1_OFF
++ *  write 0x4747 to Lane Equalization Control register for each lane
++ * Applicable for SNP PCIe controller
++ */
++
++.pbi
++/* Load condition SVR register mask major ID */
++loadc 0x01e000a4,0x000000f0
++
++/* If it is rev 2, skip the following jump command */
++jumpc 0x00000014,0x00000020
++
++/* Jump all the below instructions */
++jump 0x190 /* All instruction below including the jump are 0x190 bytes */
++
++loadc 0x01ea1080,0x70000000
++jumpc 0x00000034,0x00000000 
++write 0x03400098,0x00000000
++write 0x034008bc,0x00000001
++write 0x03400154,0x47474747
++write 0x03400158,0x47474747
++write 0x034008bc,0x00000000
++
++loadc 0x01ea1080,0x00700000
++jumpc 0x00000034,0x00000000 
++write 0x03500098,0x00000000
++write 0x035008bc,0x00000001
++write 0x03500154,0x47474747
++write 0x03500158,0x47474747
++write 0x035008bc,0x00000000
++
++loadc 0x01eb1080,0x70000000
++jumpc 0x00000044,0x00000000 
++write 0x03600098,0x00000000
++write 0x036008bc,0x00000001
++write 0x03600164,0x47474747
++write 0x03600168,0x47474747
++write 0x0360016c,0x47474747
++write 0x03600170,0x47474747
++write 0x036008bc,0x00000000
++
++loadc 0x01eb1080,0x00700000
++jumpc 0x00000034,0x00000000 
++write 0x03700098,0x00000000
++write 0x037008bc,0x00000001
++write 0x03700154,0x47474747
++write 0x03700158,0x47474747
++write 0x037008bc,0x00000000
++
++loadc 0x01ec1080,0x70000000
++jumpc 0x00000044,0x00000000 
++write 0x03800098,0x00000000
++write 0x038008bc,0x00000001
++write 0x03800164,0x47474747
++write 0x03800168,0x47474747
++write 0x0380016c,0x47474747
++write 0x03800170,0x47474747
++write 0x038008bc,0x00000000
++
++loadc 0x01ec1080,0x00700000
++jumpc 0x00000034,0x00000000 
++write 0x03900098,0x00000000
++write 0x039008bc,0x00000001
++write 0x03900154,0x47474747
++write 0x03900158,0x47474747
++write 0x039008bc,0x00000000
++.end
+diff --git a/lx2160asi/a011270.rcw b/lx2160asi/a011270.rcw
+index 0dc774d..5bd5558 100644
+--- a/lx2160asi/a011270.rcw
++++ b/lx2160asi/a011270.rcw
+@@ -4,6 +4,12 @@
+  */
+ 
+ .pbi
++/* Load condition SVR register mask major ID */
++loadc 0x01e000a4,0x000000f0
++/* If it is rev 1, skip the following jump command */
++jumpc 0x00000014,0x00000010
++/* Skip the following instructions by jumping to the end */
++jump  0x38
+ write 0x03400688,0x00000001
+ write 0x03500688,0x00000001
+ write 0x03600688,0x00000001
+diff --git a/rcw.py b/rcw.py
+index 863f755..c2d06f6 100755
+--- a/rcw.py
++++ b/rcw.py
+@@ -328,6 +328,34 @@ def build_pbi(lines):
+             v2 = struct.pack(endianess + 'L', p2)
+             subsection += v1
+             subsection += v2
++        elif op == 'loadc':
++            if p1 == None or p2 == None:
++                print('Error: "loadc" instruction requires two parameters')
++                return ''
++            v1 = struct.pack(endianess + 'L', 0x80140000)
++            v2 = struct.pack(endianess + 'L', p1)
++            v3 = struct.pack(endianess + 'L', p2)
++            subsection += v1
++            subsection += v2
++            subsection += v3
++        elif op == 'jumpc':
++            if p1 == None or p2 == None:
++                print('Error: "jumpc" instruction requires two parameters')
++                return ''
++            v1 = struct.pack(endianess + 'L', 0x80850000)
++            v2 = struct.pack(endianess + 'L', p1)
++            v3 = struct.pack(endianess + 'L', p2)
++            subsection += v1
++            subsection += v2
++            subsection += v3
++        elif op == 'jump':
++            if p1 == None:
++                print('Error: "jump" instruction requires a parameter')
++                return ''
++            v1 = struct.pack(endianess + 'L', 0x80840000)
++            v2 = struct.pack(endianess + 'L', p1)
++            subsection += v1
++            subsection += v2
+         elif op == 'awrite':
+             if p1 == None or p2 == None:
+                 print('Error: "awrite" instruction requires two parameters')
+-- 
+2.17.1
+

recipes-bsp/rcw/rcw-lx2160acex7/0006-lx2160a-add-SVR-check-for-a050234-to-apply-only-on-r.patch

@@ -0,0 +1,32 @@
+From 2ebdb6a46e6db66cc0b09c51260a90ea8abc4713 Mon Sep 17 00:00:00 2001
+From: Rabeeh Khoury <rabeeh@solid-run.com>
+Date: Mon, 23 Mar 2020 12:35:04 +0200
+Subject: [PATCH 6/8] lx2160a: add SVR check for a050234 to apply only on rev1
+
+Upstream-Status: Inappropriate [Solid-Run BSP]
+
+Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com>
+---
+ lx2160asi/a050234.rcw | 6 ++++++
+ 1 file changed, 6 insertions(+)
+
+diff --git a/lx2160asi/a050234.rcw b/lx2160asi/a050234.rcw
+index 72a40e4..2130709 100644
+--- a/lx2160asi/a050234.rcw
++++ b/lx2160asi/a050234.rcw
+@@ -4,6 +4,12 @@
+  */
+ 
+ .pbi
++/* Load condition SVR register mask major ID */
++loadc 0x01e000a4,0x000000f0
++/* If it is rev 1, skip the following jump command */
++jumpc 0x00000014,0x00000010
++/* Skip the following instructions by jumping to the end */
++jump  0xc8
+ write 0x1ea1200,0x20081004
+ write 0x1ea1240,0x20081004
+ write 0x1ea1280,0x20081004
+-- 
+2.17.1
+

recipes-bsp/rcw/rcw-lx2160acex7/0007-lx2160acex7-pcie-workarounds-and-fan-full-speed.patch

@@ -0,0 +1,95 @@
+From 6d634d64528e5ba510c369a2ae19c337ae7d692e Mon Sep 17 00:00:00 2001
+From: Rabeeh Khoury <rabeeh@solid-run.com>
+Date: Mon, 23 Mar 2020 12:36:20 +0200
+Subject: [PATCH 7/8] lx2160acex7 - pcie workarounds and fan full speed
+
+1. Moves calling the workarounds to the _defaults.rcwi
+2. Toggle fan-full-speed GPIO. The fan controller starts throttling when
+a driver exists (i.e. kernel); in order to avoid overheating until then
+enable full speed.
+3. Run a050234.rcw on rev1 - fixes some issues observed when using Mellanox
+ConnectX-5 NICs
+4. Run a009531 and a00885 on rev2.
+
+Upstream-Status: Inappropriate [Solid-Run BSP]
+
+Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com>
+---
+ lx2160acex7/configs/lx2160a_defaults.rcwi | 21 +++++++++++++++++----
+ lx2160acex7/configs/lx2160a_sdboot.rcwi   |  6 ------
+ lx2160acex7/configs/lx2160a_xspiboot.rcwi |  6 ------
+ 3 files changed, 17 insertions(+), 16 deletions(-)
+
+diff --git a/lx2160acex7/configs/lx2160a_defaults.rcwi b/lx2160acex7/configs/lx2160a_defaults.rcwi
+index 3ea7683..7af1f5b 100644
+--- a/lx2160acex7/configs/lx2160a_defaults.rcwi
++++ b/lx2160acex7/configs/lx2160a_defaults.rcwi
+@@ -1,10 +1,6 @@
+ #include <../lx2160asi/lx2160a.rcwi>
+ MEM_PLL_CFG=3
+ MEM2_PLL_CFG=3
+-C5_PLL_SEL=0
+-C6_PLL_SEL=0
+-C7_PLL_SEL=0
+-C8_PLL_SEL=0
+ HWA_CGA_M1_CLK_SEL=1
+ HWA_CGB_M1_CLK_SEL=7
+ BOOT_LOC=26
+@@ -22,3 +18,20 @@ IRQ07_04_PMUX=1
+ IRQ11_08_PMUX=1
+ EVT20_PMUX=1
+ EVT43_PMUX=1
++
++/* Drive the fan full speed pin */
++.pbi
++write 0x2320000,0x20000000
++.end
++
++/* Errata for SATA controller */
++#include <../lx2160asi/a010554.rcw>
++
++/* Errata for rev 1 PCIe controller */
++#include <../lx2160asi/a011270.rcw>
++
++/* Errata a050234 - fix elastic buffer threshold in rev 1 */
++#include <../lx2160asi/a050234.rcw>
++
++/* LX2 rev 2 PCIe Errata A-009531 and A-008851*/
++#include <../lx2160asi/a009531_a008851.rcw>
+diff --git a/lx2160acex7/configs/lx2160a_sdboot.rcwi b/lx2160acex7/configs/lx2160a_sdboot.rcwi
+index d537ea5..9086ffc 100644
+--- a/lx2160acex7/configs/lx2160a_sdboot.rcwi
++++ b/lx2160acex7/configs/lx2160a_sdboot.rcwi
+@@ -9,12 +9,6 @@ blockcopy 0x08,0x00100000,0x1800a000,0x00020000
+ /* Boot Location Pointer */
+ #include <../lx2160asi/bootlocptr_sd.rcw>
+ 
+-/* Errata for SATA controller */
+-#include <../lx2160asi/a010554.rcw>
+-
+-/* Errata for PCIe controller */
+-#include <../lx2160asi/a011270.rcw>
+-
+ /* common PBI commands */
+ #include <../lx2160asi/common.rcw>
+ 
+diff --git a/lx2160acex7/configs/lx2160a_xspiboot.rcwi b/lx2160acex7/configs/lx2160a_xspiboot.rcwi
+index 28310c9..fa092c9 100644
+--- a/lx2160acex7/configs/lx2160a_xspiboot.rcwi
++++ b/lx2160acex7/configs/lx2160a_xspiboot.rcwi
+@@ -4,12 +4,6 @@
+ /* Boot Location Pointer */
+ #include <../lx2160asi/bootlocptr_nor.rcw>
+ 
+-/* Errata for SATA controller */
+-#include <../lx2160asi/a010554.rcw>
+-
+-/* Errata for PCIe controller */
+-#include <../lx2160asi/a011270.rcw>
+-
+ /* common PBI commands */
+ #include <../lx2160asi/common.rcw>
+ 
+-- 
+2.17.1
+

recipes-bsp/rcw/rcw-lx2160acex7/0008-lx2160a-add-generic-bootloc-section.patch

@@ -0,0 +1,113 @@
+From f7f0ad5e568862f7dc70fbd0f790845ee576734d Mon Sep 17 00:00:00 2001
+From: Rabeeh Khoury <rabeeh@solid-run.com>
+Date: Tue, 24 Mar 2020 03:42:14 +0200
+Subject: [PATCH 8/8] lx2160a: add generic bootloc section
+
+The generic bootloc section does conditional blockcopy from SD/eMMC and
+SPI with some predefined addresses.
+Later on if ATF is used; those addresses are modified with ATF's
+create_pbl.c
+
+With this method a single boot image is unified for all the 3 different
+boot methods.
+
+Upstream-Status: Inappropriate [Solid-Run BSP]
+
+Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com>
+---
+ lx2160acex7/configs/lx2160a_defaults.rcwi | 12 +++++
+ lx2160asi/bootlocptr.rcw                  | 62 +++++++++++++++++++++++
+ 2 files changed, 74 insertions(+)
+ create mode 100644 lx2160asi/bootlocptr.rcw
+
+diff --git a/lx2160acex7/configs/lx2160a_defaults.rcwi b/lx2160acex7/configs/lx2160a_defaults.rcwi
+index 7af1f5b..7997d49 100644
+--- a/lx2160acex7/configs/lx2160a_defaults.rcwi
++++ b/lx2160acex7/configs/lx2160a_defaults.rcwi
+@@ -35,3 +35,15 @@ write 0x2320000,0x20000000
+ 
+ /* LX2 rev 2 PCIe Errata A-009531 and A-008851*/
+ #include <../lx2160asi/a009531_a008851.rcw>
++
++/* Unified boot location copy */
++#include <../lx2160asi/bootlocptr.rcw>
++
++/* Errata to write on scratch reg for validation */
++#include <../lx2160asi/scratchrw1.rcw>
++
++/* common PBI commands */
++#include <../lx2160asi/common.rcw>
++
++/* Modify FlexSPI Clock Divisor value - for now keep it fixed value but using loadc/jumpc/jump it can be calculated on the fly */
++#include <../lx2160asi/flexspi_divisor_28.rcw>
+diff --git a/lx2160asi/bootlocptr.rcw b/lx2160asi/bootlocptr.rcw
+new file mode 100644
+index 0000000..645182f
+--- /dev/null
++++ b/lx2160asi/bootlocptr.rcw
+@@ -0,0 +1,62 @@
++/*
++ * Generic code for auto booting.
++ * For each section blockcopy followed by write to bootlocl then bootloch must
++ * be followed in each section since when using ATF with create_pbl script in
++ * auto mode; it counts on the sequence of to be in that order.
++ */
++
++/* Boot from SD - copy SPL Uboot to Ocram */
++.pbi
++/* Load condition PORSR1 and mask RCW_SRC */
++loadc 0x01e00000,0x07800000
++
++/* If it is 0x8 << 23 then skip the following jump command */
++jumpc 0x00000014,0x04000000
++
++/* Jump all the below instructions */
++jump 0x28 /* All instruction below including the jump are 40 bytes */
++
++/* blockcopy must be followed by two writes to bootlocl and bootloch */
++blockcopy 0x08,0x00100000,0x1800a000,0x00020000
++write 0x01e00400,0x1800a000
++write 0x01e00404,0x00000000
++.end
++
++/* Boot from eMMC - copy SPL Uboot to Ocram */
++.pbi
++/* Load condition PORSR1 and mask RCW_SRC */
++loadc 0x01e00000,0x07800000
++
++/* If it is 0x9 << 23 then skip the following jump command */
++jumpc 0x00000014,0x04800000
++
++/* Jump all the below instructions */
++jump 0x28 /* All instruction below including the jump are 40 bytes */
++
++/* blockcopy must be followed by two writes to bootlocl and bootloch */
++blockcopy 0x09,0x00100000,0x1800a000,0x00020000
++write 0x01e00400,0x1800a000
++write 0x01e00404,0x00000000
++.end
++
++/* XSPI boot Location Pointer */
++/*
++ * Set the boot location pointer to the NOR flash boot area.
++ */
++
++.pbi
++/* Load condition PORSR1 and mask RCW_SRC */
++loadc 0x01e00000,0x07800000
++
++/* If it is 0xf << 23 then skip the following jump command */
++jumpc 0x00000014,0x07800000
++
++/* Jump all the below instructions */
++jump 0x28 /* All instruction below including the jump are 0x190 bytes */
++
++/* blockcopy must be followed by two writes to bootlocl and bootloch */
++blockcopy 0x0f,0x00100000,0x1800a000,0x00020000
++write 0x01e00400,0x20100000
++write 0x01e00404,0x00000000
++.end
++
+-- 
+2.17.1
+

recipes-bsp/rcw/rcw-lx2160acex7/0009-lx2160acex7-remove-all-predefined-RCW-files.patch

@@ -0,0 +1,301 @@
+From 151f650f383fc5ddd9c405cf96bc189c2eaf13bd Mon Sep 17 00:00:00 2001
+From: Rabeeh Khoury <rabeeh@solid-run.com>
+Date: Tue, 24 Mar 2020 03:51:28 +0200
+Subject: [PATCH 9/9] lx2160acex7: remove all predefined RCW files
+
+Remove all predefined RCW files and use on-the-fly created RCW from
+external script.
+For instance when using lx2160a_build repo; the runme.sh file creates
+lx2160acex7/RCW/template.rcw file the gets compiled.
+The creation is done using a simple bash script -
+
+cd $ROOTDIR/build/rcw/lx2160acex7
+mkdir -p RCW
+echo "#include <configs/lx2160a_defaults.rcwi>" > RCW/template.rcw
+echo "#include <configs/lx2160a_${SPEED}.rcwi>" >> RCW/template.rcw
+echo "#include <configs/lx2160a_${SERDES}.rcwi>" >> RCW/template.rcw
+make clean
+make -j${PARALLEL}
+
+Upstream-Status: Inappropriate [Solid-Run BSP]
+
+Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com>
+---
+ lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw.orig  | 61 -------------------
+ .../rcw_1900_600_2600_17_4_2.rcw              |  4 --
+ .../rcw_1900_600_2600_17_4_2_sd.rcw           |  4 --
+ .../rcw_2000_700_2400_13_5_2_sd.rcw           |  4 --
+ .../rcw_2000_700_2400_20_5_2_sd.rcw           |  4 --
+ .../rcw_2000_700_2400_8_5_2_sd.rcw            |  4 --
+ .../rcw_2000_700_2600_8_5_2_sd.rcw            |  4 --
+ .../rcw_2000_700_2900_17_4_2_sd.rcw           |  4 --
+ .../rcw_2000_700_2900_8_5_2_sd.rcw            |  4 --
+ .../rcw_2000_700_3200_17_4_2_sd.rcw           |  4 --
+ .../rcw_2000_700_3200_20_5_2_sd.rcw           |  4 --
+ .../rcw_2000_700_3200_8_5_0_sd.rcw            |  4 --
+ .../rcw_2000_700_3200_8_5_2_sd.rcw            |  4 --
+ .../rcw_2000_700_3200_8_5_2_xspi.rcw          |  4 --
+ .../rcw_2400_700_3200_8_5_2_sd.rcw            |  4 --
+ .../rcw_2500_700_3200_8_5_2_sd.rcw            |  4 --
+ .../rcw_2600_700_3200_8_5_2_sd.rcw            |  4 --
+ .../XGGFF_PP_HHHH_RR_19_5_2/rcw_test_sd.rcw   |  4 --
+ 18 files changed, 129 deletions(-)
+ delete mode 100644 lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw.orig
+ delete mode 100644 lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_1900_600_2600_17_4_2.rcw
+ delete mode 100644 lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_1900_600_2600_17_4_2_sd.rcw
+ delete mode 100644 lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2400_13_5_2_sd.rcw
+ delete mode 100644 lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2400_20_5_2_sd.rcw
+ delete mode 100644 lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2400_8_5_2_sd.rcw
+ delete mode 100644 lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2600_8_5_2_sd.rcw
+ delete mode 100644 lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2900_17_4_2_sd.rcw
+ delete mode 100644 lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2900_8_5_2_sd.rcw
+ delete mode 100644 lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_17_4_2_sd.rcw
+ delete mode 100644 lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_20_5_2_sd.rcw
+ delete mode 100644 lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_8_5_0_sd.rcw
+ delete mode 100644 lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_8_5_2_sd.rcw
+ delete mode 100644 lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_8_5_2_xspi.rcw
+ delete mode 100644 lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2400_700_3200_8_5_2_sd.rcw
+ delete mode 100644 lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2500_700_3200_8_5_2_sd.rcw
+ delete mode 100644 lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2600_700_3200_8_5_2_sd.rcw
+ delete mode 100644 lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_test_sd.rcw
+
+diff --git a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw.orig b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw.orig
+deleted file mode 100644
+index cdb6446..0000000
+--- a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw.orig
++++ /dev/null
+@@ -1,61 +0,0 @@
+-/*
+- * SerDes Protocol 1 -  19
+- * SerDes Protocol 2 -  5
+- * SerDes Protocol 3 -  2
+- *
+- * Frequencies:
+- * Core     -- 1900 MHz
+- * Platform -- 600  MHz
+- * DDR      -- 2600 MT/s
+- */
+-
+-#include <../lx2160asi/lx2160a.rcwi>
+-
+-SYS_PLL_RAT=12
+-MEM_PLL_CFG=3
+-MEM_PLL_RAT=26
+-MEM2_PLL_CFG=3
+-MEM2_PLL_RAT=26
+-CGA_PLL1_RAT=19
+-CGA_PLL2_RAT=19
+-CGB_PLL1_RAT=19
+-CGB_PLL2_RAT=9
+-C5_PLL_SEL=0
+-C6_PLL_SEL=0
+-C7_PLL_SEL=0
+-C8_PLL_SEL=0
+-HWA_CGA_M1_CLK_SEL=1
+-HWA_CGB_M1_CLK_SEL=7
+-BOOT_LOC=26
+-SYSCLK_FREQ=600
+-IIC2_PMUX=6
+-IIC3_PMUX=2
+-IIC4_PMUX=2
+-USB3_CLK_FSEL=39
+-SRDS_PRTCL_S1=19
+-SRDS_PRTCL_S2=5
+-SRDS_PRTCL_S3=2
+-SRDS_PLL_REF_CLK_SEL_S1=2
+-SRDS_DIV_PEX_S1=1
+-SRDS_DIV_PEX_S2=3
+-SRDS_DIV_PEX_S3=1
+-
+-/* Errata to write on scratch reg for validation */
+-#include <../lx2160asi/scratchrw1.rcw>
+-
+-/* Copy SPL Uboot to Ocram */
+-.pbi
+-blockcopy 0x08,0x00100000,0x1800a000,0x00020000
+-.end
+-
+-/* Boot Location Pointer */
+-#include <../lx2160asi/bootlocptr_sd.rcw>
+-
+-/* Errata for SATA controller */
+-#include <../lx2160asi/a010554.rcw>
+-
+-/* Modify FlexSPI Clock Divisor value */
+-#include <../lx2160asi/flexspi_divisor_24.rcw>
+-
+-/* common PBI commands */
+-#include <../lx2160asi/common.rcw>
+diff --git a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_1900_600_2600_17_4_2.rcw b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_1900_600_2600_17_4_2.rcw
+deleted file mode 100644
+index 13ab0b9..0000000
+--- a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_1900_600_2600_17_4_2.rcw
++++ /dev/null
+@@ -1,4 +0,0 @@
+-#include <configs/lx2160a_defaults.rcwi>
+-#include <configs/lx2160a_1900_600_2600.rcwi>
+-#include <configs/lx2160a_17_4_2.rcwi>
+-#include <configs/lx2160a_xspiboot.rcwi>
+diff --git a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_1900_600_2600_17_4_2_sd.rcw b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_1900_600_2600_17_4_2_sd.rcw
+deleted file mode 100644
+index 14fae8c..0000000
+--- a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_1900_600_2600_17_4_2_sd.rcw
++++ /dev/null
+@@ -1,4 +0,0 @@
+-#include <configs/lx2160a_defaults.rcwi>
+-#include <configs/lx2160a_1900_600_2600.rcwi>
+-#include <configs/lx2160a_17_4_2.rcwi>
+-#include <configs/lx2160a_sdboot.rcwi>
+diff --git a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2400_13_5_2_sd.rcw b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2400_13_5_2_sd.rcw
+deleted file mode 100644
+index 2dae5a2..0000000
+--- a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2400_13_5_2_sd.rcw
++++ /dev/null
+@@ -1,4 +0,0 @@
+-#include <configs/lx2160a_defaults.rcwi>
+-#include <configs/lx2160a_2000_700_2400.rcwi>
+-#include <configs/lx2160a_13_5_2.rcwi>
+-#include <configs/lx2160a_sdboot.rcwi>
+diff --git a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2400_20_5_2_sd.rcw b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2400_20_5_2_sd.rcw
+deleted file mode 100644
+index 5335072..0000000
+--- a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2400_20_5_2_sd.rcw
++++ /dev/null
+@@ -1,4 +0,0 @@
+-#include <configs/lx2160a_defaults.rcwi>
+-#include <configs/lx2160a_2000_700_2400.rcwi>
+-#include <configs/lx2160a_20_5_2.rcwi>
+-#include <configs/lx2160a_sdboot.rcwi>
+diff --git a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2400_8_5_2_sd.rcw b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2400_8_5_2_sd.rcw
+deleted file mode 100644
+index e2a5bd3..0000000
+--- a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2400_8_5_2_sd.rcw
++++ /dev/null
+@@ -1,4 +0,0 @@
+-#include <configs/lx2160a_defaults.rcwi>
+-#include <configs/lx2160a_2000_700_2400.rcwi>
+-#include <configs/lx2160a_8_5_2.rcwi>
+-#include <configs/lx2160a_sdboot.rcwi>
+diff --git a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2600_8_5_2_sd.rcw b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2600_8_5_2_sd.rcw
+deleted file mode 100644
+index a330bfe..0000000
+--- a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2600_8_5_2_sd.rcw
++++ /dev/null
+@@ -1,4 +0,0 @@
+-#include <configs/lx2160a_defaults.rcwi>
+-#include <configs/lx2160a_2000_700_2600.rcwi>
+-#include <configs/lx2160a_8_5_2.rcwi>
+-#include <configs/lx2160a_sdboot.rcwi>
+diff --git a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2900_17_4_2_sd.rcw b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2900_17_4_2_sd.rcw
+deleted file mode 100644
+index 8535dbd..0000000
+--- a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2900_17_4_2_sd.rcw
++++ /dev/null
+@@ -1,4 +0,0 @@
+-#include <configs/lx2160a_defaults.rcwi>
+-#include <configs/lx2160a_2000_700_2900.rcwi>
+-#include <configs/lx2160a_17_4_2.rcwi>
+-#include <configs/lx2160a_sdboot.rcwi>
+diff --git a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2900_8_5_2_sd.rcw b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2900_8_5_2_sd.rcw
+deleted file mode 100644
+index 698be01..0000000
+--- a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2900_8_5_2_sd.rcw
++++ /dev/null
+@@ -1,4 +0,0 @@
+-#include <configs/lx2160a_defaults.rcwi>
+-#include <configs/lx2160a_2000_700_2900.rcwi>
+-#include <configs/lx2160a_8_5_2.rcwi>
+-#include <configs/lx2160a_sdboot.rcwi>
+diff --git a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_17_4_2_sd.rcw b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_17_4_2_sd.rcw
+deleted file mode 100644
+index 780d8c3..0000000
+--- a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_17_4_2_sd.rcw
++++ /dev/null
+@@ -1,4 +0,0 @@
+-#include <configs/lx2160a_defaults.rcwi>
+-#include <configs/lx2160a_2000_700_3200.rcwi>
+-#include <configs/lx2160a_17_4_2.rcwi>
+-#include <configs/lx2160a_sdboot.rcwi>
+diff --git a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_20_5_2_sd.rcw b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_20_5_2_sd.rcw
+deleted file mode 100644
+index eb9d240..0000000
+--- a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_20_5_2_sd.rcw
++++ /dev/null
+@@ -1,4 +0,0 @@
+-#include <configs/lx2160a_defaults.rcwi>
+-#include <configs/lx2160a_2000_700_3200.rcwi>
+-#include <configs/lx2160a_20_5_2.rcwi>
+-#include <configs/lx2160a_sdboot.rcwi>
+diff --git a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_8_5_0_sd.rcw b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_8_5_0_sd.rcw
+deleted file mode 100644
+index ceb53a3..0000000
+--- a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_8_5_0_sd.rcw
++++ /dev/null
+@@ -1,4 +0,0 @@
+-#include <configs/lx2160a_defaults.rcwi>
+-#include <configs/lx2160a_2000_700_3200.rcwi>
+-#include <configs/lx2160a_8_5_0.rcwi>
+-#include <configs/lx2160a_sdboot.rcwi>
+diff --git a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_8_5_2_sd.rcw b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_8_5_2_sd.rcw
+deleted file mode 100644
+index a220e98..0000000
+--- a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_8_5_2_sd.rcw
++++ /dev/null
+@@ -1,4 +0,0 @@
+-#include <configs/lx2160a_defaults.rcwi>
+-#include <configs/lx2160a_2000_700_3200.rcwi>
+-#include <configs/lx2160a_8_5_2.rcwi>
+-#include <configs/lx2160a_sdboot.rcwi>
+diff --git a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_8_5_2_xspi.rcw b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_8_5_2_xspi.rcw
+deleted file mode 100644
+index 1eabd7d..0000000
+--- a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_3200_8_5_2_xspi.rcw
++++ /dev/null
+@@ -1,4 +0,0 @@
+-#include <configs/lx2160a_defaults.rcwi>
+-#include <configs/lx2160a_2000_700_3200.rcwi>
+-#include <configs/lx2160a_8_5_2.rcwi>
+-#include <configs/lx2160a_xspiboot.rcwi>
+diff --git a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2400_700_3200_8_5_2_sd.rcw b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2400_700_3200_8_5_2_sd.rcw
+deleted file mode 100644
+index 2ac59b1..0000000
+--- a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2400_700_3200_8_5_2_sd.rcw
++++ /dev/null
+@@ -1,4 +0,0 @@
+-#include <configs/lx2160a_defaults.rcwi>
+-#include <configs/lx2160a_2400_700_3200.rcwi>
+-#include <configs/lx2160a_8_5_2.rcwi>
+-#include <configs/lx2160a_sdboot.rcwi>
+diff --git a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2500_700_3200_8_5_2_sd.rcw b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2500_700_3200_8_5_2_sd.rcw
+deleted file mode 100644
+index e7c08df..0000000
+--- a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2500_700_3200_8_5_2_sd.rcw
++++ /dev/null
+@@ -1,4 +0,0 @@
+-#include <configs/lx2160a_defaults.rcwi>
+-#include <configs/lx2160a_2500_700_3200.rcwi>
+-#include <configs/lx2160a_8_5_2.rcwi>
+-#include <configs/lx2160a_sdboot.rcwi>
+diff --git a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2600_700_3200_8_5_2_sd.rcw b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2600_700_3200_8_5_2_sd.rcw
+deleted file mode 100644
+index 1e7a8f7..0000000
+--- a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_2600_700_3200_8_5_2_sd.rcw
++++ /dev/null
+@@ -1,4 +0,0 @@
+-#include <configs/lx2160a_defaults.rcwi>
+-#include <configs/lx2160a_2600_700_3200.rcwi>
+-#include <configs/lx2160a_8_5_2.rcwi>
+-#include <configs/lx2160a_sdboot.rcwi>
+diff --git a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_test_sd.rcw b/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_test_sd.rcw
+deleted file mode 100644
+index 86f12f8..0000000
+--- a/lx2160acex7/XGGFF_PP_HHHH_RR_19_5_2/rcw_test_sd.rcw
++++ /dev/null
+@@ -1,4 +0,0 @@
+-#include <configs/lx2160a_defaults.rcwi>
+-#include <configs/lx2160a_test.rcwi>
+-#include <configs/lx2160a_17_4_2.rcwi>
+-#include <configs/lx2160a_sdboot.rcwi>
+-- 
+2.17.1
+

recipes-bsp/rcw/rcw_git.bbappend

@@ -0,0 +1,29 @@
+FILESEXTRAPATHS:append:lx2160acex7 := "${THISDIR}/${PN}-lx2160acex7:"
+
+SRC_URI:append:lx2160acex7 = "\
+	file://0001-lx2160acex7-misc-RCW-files.patch \
+	file://0002-Set-io-pads-as-GPIO.patch \
+	file://0003-S2-enable-gen3-xspi-increase-divisor-to-28.patch \
+	file://0004-refactor-a009531-a008851-and-a011270.patch \
+	file://0006-lx2160a-add-SVR-check-for-a050234-to-apply-only-on-r.patch \
+	file://0007-lx2160acex7-pcie-workarounds-and-fan-full-speed.patch \
+	file://0008-lx2160a-add-generic-bootloc-section.patch \
+	file://0009-lx2160acex7-remove-all-predefined-RCW-files.patch \
+"
+
+do_configure:prepend:lx2160acex7 () {
+    for BT in ${BOARD_TARGETS}
+    do
+	mkdir -p ${S}/${BOARD_TARGETS}/${SERDES}
+	cat <<EOF >${S}/${BOARD_TARGETS}/README
+The RCW directories for lx2160acex7 are created based on existing SERDES
+configuration. Currently created automatically - later maybe by building
+cross product of serdes & ddr speeds in a final commit.
+EOF
+	cat <<EOF >${S}/${BOARD_TARGETS}/${SERDES}/${SPEED}.rcw
+#include <configs/lx2160a_defaults.rcwi>
+#include <configs/lx2160a_${SPEED}.rcwi>
+#include <configs/lx2160a_${SERDES}.rcwi>
+EOF
+    done
+}

recipes-bsp/u-boot/u-boot-boundary-common_2022.04.inc

@@ -0,0 +1,13 @@
+DESCRIPTION = "U-Boot for Boundary Devices boards"
+LICENSE = "GPL-2.0-or-later"
+LIC_FILES_CHKSUM = "file://Licenses/README;md5=5a7450c57ffe5ae63fd732446b988025"
+
+PV = "v2022.04+git${SRCPV}"
+
+SRCREV = "1c69998957efb2a9dcde024f33e9b73b84226560"
+SRCBRANCH = "boundary-v2022.04"
+SRC_URI = "git://github.com/boundarydevices/u-boot.git;branch=${SRCBRANCH};protocol=https"
+
+S = "${WORKDIR}/git"
+B = "${WORKDIR}/build"
+PACKAGE_ARCH = "${MACHINE_ARCH}"